coreboot June 2009

coreboot@coreboot.org

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500 discussions

[flashrom] r620 - trunk
by svn＠coreboot.org 22 Jun '09

22 Jun '09

Author: hailfinger Date: 2009-06-22 12:09:07 +0200 (Mon, 22 Jun 2009) New Revision: 620 Modified: trunk/flashchips.c Log: Mark ST M25P80 as completely supported. Thanks to Harald Gutmann for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-06-22 10:06:28 UTC (rev 619) +++ trunk/flashchips.c 2009-06-22 10:09:07 UTC (rev 620) @@ -2321,7 +2321,7 @@ .model_id = ST_M25P80, .total_size = 1024, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .erase = spi_chip_erase_c7,

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[flashrom] r619 - trunk
by svn＠coreboot.org 22 Jun '09

22 Jun '09

Author: hailfinger Date: 2009-06-22 12:06:28 +0200 (Mon, 22 Jun 2009) New Revision: 619 Modified: trunk/flashchips.c Log: Eon EN25F40: Probe is tested. Thanks to Wangji for testing and pointing out that EN25* chips were unsupported, which was handled in r580 and r592. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-06-22 01:37:06 UTC (rev 618) +++ trunk/flashchips.c 2009-06-22 10:06:28 UTC (rev 619) @@ -993,7 +993,7 @@ .model_id = EN_25F40, .total_size = 512, .page_size = 256, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .erase = spi_chip_erase_60_c7,

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Re: [coreboot] Flashrom support for EPIA-N(L) - patch for review
by Luc Verhaegen 22 Jun '09

22 Jun '09

On Fri, Jun 19, 2009 at 12:06:51PM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote: > Received and understood, then the basic issue is that at this point my > coreboot build is still broken and will not boot, so there are no > tables. (I had not realised the tables were read from RAM rather than > the ROM image) > > The upshot is that the flashrom ids are required to allow development > from the original bios.... for the time being. > > Once the build is booting properly and flashrom can autodetect I will > remove the ids. In the mean time I'm hoping that having this early > flashrom support will help others to help in the effort for the > CN400/epia-n(l)/Luke. > > If this is still all to immature for general release then fair enough, > it can wait until things are working better. > > Thanks, > Jon No, this is reasonable, i will add an extra comment and commit. Plus, i think that we need to track down some badly filled out boards, pciid wise, so that we can change behaviour around the ids a bit. Make it a bit tighter: * require 2 main ids, always. * don't allow -m when a valid subsystem id is there. But that's a discussion for some other time, and anyway, it has a rather tough prerequisite. Luc Verhaegen.

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Gigabyte EX58-UD4P support in flashrom
by Warren Turkal 22 Jun '09

22 Jun '09

Considering that flashrom seems to work with my Gigabyte EX58-UD4P, should an entry be put into the Flashrom wiki page for supported motherboards? I'd do it myself except that I don't have a wiki account. Thanks, wt

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I try to follow.... $ ./configure --cc=gcc-3.4 --target-list=i386-softmmu && make
by Rick Ant 22 Jun '09

22 Jun '09

I try to follow the instruction at Build_qemu tutorial,=== Create an empty disk image: $ qemu-img create -f raw disk.img 200M === I can't find the qemu-image... I have done $ ./configure --cc=gcc-3.4 --target-list=i386-softmmu && make Using Gcc 4.0... What should I do then..? Any help is appreciated... thanks

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FW: #131: New flashrom motherboard support
by Gregg C Levine 22 Jun '09

22 Jun '09

Hello! Careful folks, according to Google Mail that tracker number sits on top of a <Deleted!> load of attempts to spam the tracker functions. Obviously they do get deleted as soon as one of us sees them, but I thought I would bring it to the attention of the list. -- Gregg C Levine hansolofalcon(a)worldnet.att.net "The Force will be with you always." Obi-Wan Kenobi -----Original Message----- From: coreboot-bounces(a)coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of coreboot Sent: Sunday, June 21, 2009 9:57 PM Cc: opensuse(a)sukimashita.com; coreboot(a)coreboot.org Subject: Re: [coreboot] #131: New flashrom motherboard support #131: New flashrom motherboard support ---------------------------------+------------------------------------------ Reporter: anonymous | Owner: somebody Type: enhancement | Status: new Priority: trivial | Milestone: flashrom v1.0 Component: flashrom | Version: Keywords: flashrom asus | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ Changes (by uwe): * version: v2 => * milestone: Going mainstream => flashrom v1.0 Comment: Please post 'flashrom -V' output from the latest flashrom svn version, and 'lspci -tvnn' output, we'll know more after that. Thanks! Feel free to join #coreboot on IRC for realtime help and debugging. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/131#comment:1> coreboot <http://www.coreboot.org/> -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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[flashrom] r618 - trunk
by svn＠coreboot.org 22 Jun '09

22 Jun '09

Author: uwe Date: 2009-06-22 03:37:06 +0200 (Mon, 22 Jun 2009) New Revision: 618 Modified: trunk/board_enable.c trunk/print.c Log: Turns out that the GIGABYTE GA-7ZM _does_ work fine if you disable the BIOS flash protection option _and_ remove jumper JP9 on the board (d'oh!). This board can decode 512 KB chips just fine (not just 256 KB). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-21 20:50:22 UTC (rev 617) +++ trunk/board_enable.c 2009-06-22 01:37:06 UTC (rev 618) @@ -907,6 +907,7 @@ { "GIGABYTE", "GA-6BXC", }, { "GIGABYTE", "GA-6BXDU", }, { "GIGABYTE", "GA-6ZMA", }, + { "GIGABYTE", "GA-7ZM", }, { "Intel", "EP80759", }, { "Jetway", "J7F4K1G5D-PB", }, { "MSI", "MS-6570 (K7N2)", }, @@ -969,7 +970,6 @@ { "Boser", "HS-6637", }, { "DFI", "855GME-MGF", }, { "FIC", "VA-502", }, - { "GIGABYTE", "GA-7ZM", }, { "MSI", "MS-6178", }, { "MSI", "MS-7260 (K9N Neo)", }, { "PCCHIPS", "M537DMA33", }, Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-06-21 20:50:22 UTC (rev 617) +++ trunk/print.c 2009-06-22 01:37:06 UTC (rev 618) @@ -451,6 +451,7 @@ { "ASUS", "A8V-E SE", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html." }, { "ASUS", "M2A-VM", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html." }, { "BCOM", "WinNET100", "Used in the IGEL-316 thin client." }, + { "GIGABYTE", "GA-7ZM", "Works fine iff you remove jumper JP9 on the board and disable the flash protection BIOS option." }, /* Verified working boards that DO need write-enables. */ { "Acer", "Aspire One", "See http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html." },

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coreboot initialization problems
by Leandro Dorileo 22 Jun '09

22 Jun '09

Hi I`m running coreboot with an asus a8v-e Deluxe, my processor is an athlon 64 3000+ with 512Mb of RAM. When initializing coreboot I get the following output in the serial debug output. Talking to Carl-Daniel he found weird the like stating "INIT detected", he says it looks really suspicious and he gets this kind of log message only "if something is really horribly wrong". Log message as follows: coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009 starting... now booting... fallback coreboot-2.0.0-r4368M.0Normal Dom Jun 21 19:41:47 AMT 2009 starting... now booting... real_main INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} --- Issuing SOFT_RESET... soft reset coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009 starting... now booting... fallback coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009 starting... now booting... real_main Enabling routing table for node 00 done. Enabling UP settings Disabling read/write/fill probes for UP... done. coherent_ht_finalize done core0 started: now booting... Core0 started started ap apicid: SBLink=00 NC node|link=00 entering optimize_link_incoherent_ht sysinfo->link_pair_num=0x1 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8075 pos=0x8a, filtered freq_cap=0x35 pos=0x6e, unfiltered freq_cap=0x75 pos=0x6e, filtered freq_cap=0x75 freq_cap1=0x35, freq_cap2=0x75 dev1 old_freq=0x6, freq=0x5, needs_reset=0x1 dev2 old_freq=0x6, freq=0x5, needs_reset=0x1 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 0, reset_needed=0x1 after optimize_link_read_pointers_chain, reset_needed=0x1 K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 ht reset - soft reset coreboot-2.0.0-r4368M.0Fallback Dom Jun 21 19:42:04 AMT 2009 starting... now booting... fallback coreboot-2.0.0-r4368M.0Normal Dom Jun 21 19:41:47 AMT 2009 starting... now booting... real_main Enabling routing table for node 00 done. Enabling UP settings Disabling read/write/fill probes for UP... done. coherent_ht_finalize done core0 started: now booting... Core0 started started ap apicid: SBLink=00 NC node|link=00 entering optimize_link_incoherent_ht sysinfo->link_pair_num=0x1 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8075 pos=0x8a, filtered freq_cap=0x35 pos=0x6e, unfiltered freq_cap=0x75 pos=0x6e, filtered freq_cap=0x75 freq_cap1=0x35, freq_cap2=0x75 dev1 old_freq=0x5, freq=0x5, needs_reset=0x0 dev2 old_freq=0x5, freq=0x5, needs_reset=0x0 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 after ht_optimize_link for link pair 0, reset_needed=0x0 after optimize_link_read_pointers_chain, reset_needed=0x0 K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 Current fid_cur: 0xa, fid_max: 0xa Requested fid_new: 0xa Ram1.00 setting up CPU00 northbridge registers done. Ram2.00 Device error Device error Device error Unbuffered 200Mhz Interleaved RAM end at 0x00080000 kB Lower RAM end at 0x00080000 kB Ram3 Initializing memory: done Ram4 v_esp=000cee78 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Regards.... -- (°= Leandro Dorileo //\ ldorileo(a)gmail.com - http://www.dorilex.net V_/ Software is a matter of freedom.

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Re: [coreboot] [flashrom] r617 - trunk
by Uwe Hermann 21 Jun '09

21 Jun '09

On Sun, Jun 21, 2009 at 10:50:22PM +0200, svn(a)coreboot.org wrote: > + {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", it8705f_write_enable_2e}, Here's the lspci for future reference. $ lspci -vvvxxxnnn 00:00.0 Host bridge [0600]: VIA Technologies, Inc. VT8366/A/7 [Apollo KT266/A/333] [1106:3099] Subsystem: VIA Technologies, Inc. VT8366/A/7 [Apollo KT266/A/333] [1106:3099] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Region 0: Memory at e0000000 (32-bit, prefetchable) [size=128M] Capabilities: [a0] AGP version 2.0 Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3- Rate=x1,x2 Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP- GART64- 64bit- FW- Rate=<none> Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: agpgart-via Kernel modules: via-agp 00: 06 11 99 30 06 00 30 22 00 00 00 06 00 00 00 00 10: 08 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 99 30 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 18 88 80 82 44 01 04 18 99 88 80 82 44 00 00 50: 16 f4 6b ea 00 05 10 10 00 e0 00 00 00 00 10 10 60: 20 fa 00 20 e4 99 40 16 5f cd 54 d0 40 5b 00 00 70: 82 c8 00 01 01 01 10 00 01 00 00 00 00 00 00 12 80: 0f 00 00 00 80 00 00 00 03 00 1a 0e 00 00 00 00 90: 16 f4 6b ea 4f 1c f1 59 21 ff 00 00 61 32 74 00 a0: 02 c0 20 00 03 02 00 1f 00 00 00 00 2f 08 00 b2 b0: ff b2 1a 00 40 00 00 00 68 00 00 00 00 00 00 8c c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 9a 77 00 9a 00 9a 00 00 f0: 00 00 00 00 00 94 94 00 00 00 00 00 00 00 00 00 00:01.0 PCI bridge [0604]: VIA Technologies, Inc. VT8366/A/7 [Apollo KT266/A/333 AGP] [1106:b099] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: fff00000-000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel modules: shpchp 00: 06 11 99 b0 07 01 30 22 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 00 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 04 00 40: 81 40 80 44 24 72 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:10.0 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI]) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 21 Region 4: I/O ports at d400 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: uhci_hcd Kernel modules: uhci-hcd 00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d4 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 01 00 00 40: 40 12 07 00 00 00 00 00 00 0b 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.1 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI]) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin B routed to IRQ 21 Region 4: I/O ports at d800 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: uhci_hcd Kernel modules: uhci-hcd 00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d8 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00 40: 40 12 07 00 00 00 00 00 00 0b 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.2 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI]) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin C routed to IRQ 21 Region 4: I/O ports at dc00 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: uhci_hcd Kernel modules: uhci-hcd 00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 dc 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 03 00 00 40: 40 10 03 00 00 00 00 00 00 0b 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.3 USB Controller [0c03]: VIA Technologies, Inc. USB 2.0 [1106:3104] (rev 82) (prog-if 20 [EHCI]) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 64 bytes Interrupt: pin D routed to IRQ 21 Region 0: Memory at e9021000 (32-bit, non-prefetchable) [size=256] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ehci_hcd Kernel modules: ehci-hcd 00: 06 11 04 31 17 00 10 02 82 20 03 0c 10 20 00 00 10: 00 10 02 e9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 80 00 00 00 00 00 00 00 05 04 00 00 40: 00 00 03 00 00 00 00 00 80 10 00 09 00 00 00 00 50: 00 5a 00 80 00 00 00 00 04 0b 88 88 53 88 00 00 60: 20 20 01 00 00 00 00 00 01 00 00 00 00 00 08 c0 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:11.0 ISA bridge [0601]: VIA Technologies, Inc. VT8235 ISA Bridge [1106:3177] Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel modules: via-ircc, i2c-viapro 00: 06 11 77 31 87 00 10 02 00 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 54 7f f0 00 00 00 00 00 0c 20 00 00 04 00 0a 08 50: 81 1d 09 00 00 20 22 20 43 80 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 04 00 00 00 00 00 00 00 00 70: 19 10 96 09 00 00 00 00 00 00 00 00 20 00 00 00 80: 20 84 59 00 fa 30 00 00 01 40 00 00 da 00 00 00 90: 00 a6 81 88 90 40 01 00 00 07 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 50 01 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 1c 08 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00:11.1 IDE interface [0101]: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE [1106:0571] (rev 06) (prog-if 8a [Master SecP PriP]) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Interrupt: pin A routed to IRQ 20 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at e000 [size=16] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: VIA_IDE Kernel modules: via82cxxx 00: 06 11 71 05 07 00 90 02 06 8a 01 01 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e0 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 c0 00 00 00 00 00 00 00 ff 01 00 00 40: 0b f2 09 05 18 1c c0 00 a8 a8 a8 33 ff 00 b6 91 50: 07 07 07 e6 0c 03 00 00 a8 a8 a8 a8 00 00 00 00 60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 70: 02 01 00 00 00 00 00 00 82 01 00 00 00 00 00 00 80: 00 d0 88 0f 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 06 00 71 05 19 10 96 09 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 07 00 00 00 00 00 00 00 00 00 00:11.5 Multimedia audio controller [0401]: VIA Technologies, Inc. VT8233/A/8235/8237 AC97 Audio Controller [1106:3059] (rev 50) Subsystem: Elitegroup Computer Systems Device [1019:0996] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin C routed to IRQ 22 Region 0: I/O ports at e400 [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: VIA 82xx Audio Kernel modules: snd-via82xx 00: 06 11 59 30 01 00 10 02 50 00 01 04 00 00 00 00 10: 01 e4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 19 10 96 09 30: 00 00 00 00 c0 00 00 00 00 00 00 00 0a 03 00 00 40: 01 cc 00 00 00 00 00 00 00 00 00 00 06 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 06 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 06 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:12.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6102 [Rhine-II] [1106:3065] (rev 74) Subsystem: VIA Technologies, Inc. VT6102 [Rhine II] Embeded Ethernet Controller on VT8235 [1106:0102] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (750ns min, 2000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 23 Region 0: I/O ports at ec00 [size=256] Region 1: Memory at e9022000 (32-bit, non-prefetchable) [size=256] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: via-rhine Kernel modules: via-rhine 00: 06 11 65 30 07 00 10 02 74 00 00 02 08 20 00 00 10: 01 ec 00 00 00 20 02 e9 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 02 01 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 03 08 40: 01 00 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

1 0

Support of S4881 (K8QW)
by Hans-Juergen Lange 21 Jun '09

21 Jun '09

Hello, does anyone used coreboot to boot a Tyan S4881 ? Where to get Hardware-Detail information? Will Tyan help in specific problems? BR Hans-Juergen Lange

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coreboot June 2009