coreboot May 2009

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571 discussions

[flashrom] r536 - trunk
by svn＠coreboot.org 19 May '09

19 May '09

Author: uwe Date: 2009-05-19 23:03:31 +0200 (Tue, 19 May 2009) New Revision: 536 Modified: trunk/satasii.c Log: Mark the Silicon Image PCI0680 Ultra ATA-133 controller as working. I tested identify, read, write, erase, verify successfully, HOWEVER, this will only work (at least on my card) after de-soldering the soldered-on PLCC32 one-time programmable (OTP) chip (Holtek HT27C010) and soldering on a (re-)programmable flash ROM chip or a socket. Example: http://www.coreboot.org/File:Sii_controller1.jpg http://www.coreboot.org/File:Sii_controller2.jpg The OTP chip which came on my card does not react to the standard JEDEC identify/read/write/erase commands anymore, so if all other such PCI0680 controllers which are around also have the same OTP chip (that's not necessarily the case), they cannot be used as "external programmer" in flashrom without the above mentioned modifications. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/satasii.c =================================================================== --- trunk/satasii.c 2009-05-19 14:14:21 UTC (rev 535) +++ trunk/satasii.c 2009-05-19 21:03:31 UTC (rev 536) @@ -34,7 +34,7 @@ uint16_t id; struct pcidev_status satas_sii[] = { - {0x1095, 0x0680, PCI_NT, "Silicon Image", "PCI0680 Ultra ATA-133 Host Controller"}, + {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Controller"}, {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] Serial ATA Controller"}, {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X Serial ATA Controller"}, {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 Serial ATA Raid II Controller"},

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10th anniversary
by ron minnich 19 May '09

19 May '09

OK, I am not sure when the 10th anniversary actually is. I only know that it happens this year sometime, and I started work on the idea sometime in the late summer/early fall, after fighting a cluster on intel mobos that didn't get out of POST for 5 minutes. For lack of a better guess, I'm going to pick 9/9/9, because: 1. it works to the same date in the US usage (mmddyy) and EU usage (DDMMYY). 2. It's our last chance to have a single-digit date like this for quite some time. 3. it's a friends birthday anyway. So, all we need to work out now is where to have the party. ron

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build service results for r4292
by coreboot information 19 May '09

19 May '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "myles" checked in revision 4292 to the coreboot repository. This caused the following changes: Change Log: Trivial update of Config-lab.lb so that it works again. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of asus:mew-am is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4292&device=mew-am&vendor=… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[BuildROM] r266 - buildrom-devel/config/platforms
by svn＠coreboot.org 19 May '09

19 May '09

Author: myles Date: 2009-05-19 20:18:45 +0200 (Tue, 19 May 2009) New Revision: 266 Modified: buildrom-devel/config/platforms/tyan-s2891.conf buildrom-devel/config/platforms/tyan-s2892.conf buildrom-devel/config/platforms/tyan-s2895.conf Log: Bump coreboot revision for Tyan s2895, s2892, s2891. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: buildrom-devel/config/platforms/tyan-s2891.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2891.conf 2009-05-03 14:27:08 UTC (rev 265) +++ buildrom-devel/config/platforms/tyan-s2891.conf 2009-05-19 18:18:45 UTC (rev 266) @@ -30,4 +30,4 @@ COREBOOT_VENDOR=tyan COREBOOT_BOARD=s2891 CBV2_TDIR=s2891 -CBV2_TAG=3259 +CBV2_TAG=4292 Modified: buildrom-devel/config/platforms/tyan-s2892.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2892.conf 2009-05-03 14:27:08 UTC (rev 265) +++ buildrom-devel/config/platforms/tyan-s2892.conf 2009-05-19 18:18:45 UTC (rev 266) @@ -28,4 +28,4 @@ COREBOOT_VENDOR=tyan COREBOOT_BOARD=s2892 CBV2_TDIR=s2892 -CBV2_TAG=3259 +CBV2_TAG=4292 Modified: buildrom-devel/config/platforms/tyan-s2895.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2895.conf 2009-05-03 14:27:08 UTC (rev 265) +++ buildrom-devel/config/platforms/tyan-s2895.conf 2009-05-19 18:18:45 UTC (rev 266) @@ -28,4 +28,4 @@ COREBOOT_VENDOR=tyan COREBOOT_BOARD=s2895 CBV2_TDIR=s2895 -CBV2_TAG=3259 +CBV2_TAG=4292

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[v2] r4292 - trunk/coreboot-v2/targets/tyan/s2895
by svn＠coreboot.org 19 May '09

19 May '09

Author: myles Date: 2009-05-19 20:15:49 +0200 (Tue, 19 May 2009) New Revision: 4292 Modified: trunk/coreboot-v2/targets/tyan/s2895/Config-lab.lb Log: Trivial update of Config-lab.lb so that it works again. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/targets/tyan/s2895/Config-lab.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2895/Config-lab.lb 2009-05-17 20:36:45 UTC (rev 4291) +++ trunk/coreboot-v2/targets/tyan/s2895/Config-lab.lb 2009-05-19 18:15:49 UTC (rev 4292) @@ -1,21 +1,23 @@ # Sample config file for -# the Tyan s2892 -# This will make a target directory of ./s2892 +# the Tyan s2895 +# This will make a target directory of ./s2895 target s2895 mainboard tyan/s2895 -option ROM_SIZE = 1024*1024 +option ROM_SIZE = 512*1024 option CONFIG_CONSOLE_SERIAL8250 = 1 option CONFIG_CONSOLE_VGA = 1 option XIP_ROM_SIZE = 0x20000 option ROM_IMAGE_SIZE = 0x18000 +option HAVE_FAILOVER_BOOT = 0 +option FAILOVER_SIZE = 0 option FALLBACK_SIZE = ROM_SIZE +option CONFIG_COMPRESSED_PAYLOAD_LZMA = 1 +option CONFIG_PRECOMPRESSED_PAYLOAD = 1 # Tyan s2895 romimage "fallback" - option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 - option CONFIG_PRECOMPRESSED_PAYLOAD=1 option USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" payload ../payload.elf.lzma

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Failover images
by Myles Watson 19 May '09

19 May '09

I've never understood the need for failover images. Why wouldn't we just have a shell for the fallback payload? I saw a comment in the code somewhere that failover should go away. Will it? I've never gotten failover to work with Tyan s2895. It compiles fine but won't boot. Thanks, Myles

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[flashrom] r535 - trunk
by svn＠coreboot.org 19 May '09

19 May '09

Author: uwe Date: 2009-05-19 16:14:21 +0200 (Tue, 19 May 2009) New Revision: 535 Modified: trunk/README trunk/flashrom.8 trunk/flashrom.c trunk/nic3com.c Log: Documentation improvements and small code/whitespace fixes (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/README =================================================================== --- trunk/README 2009-05-18 22:27:53 UTC (rev 534) +++ trunk/README 2009-05-19 14:14:21 UTC (rev 535) @@ -3,7 +3,10 @@ ------------------------------------------------------------------------------- flashrom is a utility for reading, writing, verifying and erasing flash ROM -chips. It's often used to flash BIOS/coreboot/firmware images. +chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system +using a supported mainboard, but it also supports flashing of network +cards (NICs), SATA controller cards, and other external devices which can +program flash chips. It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash, @@ -80,7 +83,7 @@ --------------------------------------------- Please check the output of 'flashrom -L' for the list of supported -flash chips, chipsets/southbridges, and mainboards. +flash chips, chipsets/southbridges, mainboards, and flash programmers. See also http://coreboot.org/Flashrom for more details. Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-05-18 22:27:53 UTC (rev 534) +++ trunk/flashrom.8 2009-05-19 14:14:21 UTC (rev 535) @@ -132,11 +132,18 @@ .sp .BR "* internal" " (default, for in-system flashing in the mainboard)" .sp +.BR "* dummy" " (just prints all operations and accesses)" +.sp .BR "* nic3com" " (for flash ROMs on 3COM network cards)" .sp -If you have multiple supported NICs in your system, you must use -.B "flashrom -p nic3com=bb:dd.f" -to explicitly select one of them, where +.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)" +.sp +If you have multiple supported PCI cards which can program flash chips +(NICs, SATA/IDE controllers, etc.) in your system, you must use the +.B "flashrom -p xxxx=bb:dd.f" +syntax to explicitly select one of them, where +.B xxxx +is the name of the programmer .B bb is the PCI bus number, .B dd @@ -147,9 +154,9 @@ Example: .B "flashrom -p nic3com=05:04.0" .sp -.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controller cards)" -.sp -.BR "* dummy" " (just prints all operations and accesses)" +Currently the following programmers support this mechanism: +.BR nic3com , +.BR satasii . .TP .B "\-h, \-\-help" Show a help text and exit. Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-05-18 22:27:53 UTC (rev 534) +++ trunk/flashrom.c 2009-05-19 14:14:21 UTC (rev 535) @@ -3,7 +3,7 @@ * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2004 Tyan Corp <yhlu(a)tyan.com> - * Copyright (C) 2005-2008 coresystems GmbH + * Copyright (C) 2005-2008 coresystems GmbH * Copyright (C) 2008,2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify @@ -367,13 +367,15 @@ void usage(const char *name) { - printf("usage: %s [-rwvEVfLhR] [-c chipname] [-s exclude_start]\n", + printf("usage: %s [-EVfLhR] [-r file] [-w file] [-v file] [-c chipname] [-s addr]\n" + " [-e addr] [-m [vendor:]part] [-l file] [-i image] [-p programmer] [file]", name); - printf(" [-e exclude_end] [-m [vendor:]part] [-l file.layout] [-i imagename] [file]\n"); - printf("Please note that the command line interface for flashrom will " - "change before flashrom 1.0. Do not use flashrom in scripts or " - "other automated tools without checking that your flashrom " + + printf("\n\nPlease note that the command line interface for flashrom will " + "change before flashrom 1.0.\nDo not use flashrom in scripts or " + "other automated tools without checking that your flashrom\n" "version won't interpret them in a totally different way.\n\n"); + printf (" -r | --read: read flash and save into file\n" " -w | --write: write file into flash\n" @@ -389,9 +391,10 @@ " -i | --image <name>: only flash image name from flash layout\n" " -L | --list-supported: print supported devices\n" " -p | --programmer <name>: specify the programmer device\n" + " (internal, dummy, nic3com, satasii)\n" " -h | --help: print this help text\n" " -R | --version: print the version (release)\n" - "\n" " If no file is specified, then all that happens" + "\nIf no file is specified, then all that happens" " is that flash info is dumped.\n\n"); exit(1); } Modified: trunk/nic3com.c =================================================================== --- trunk/nic3com.c 2009-05-18 22:27:53 UTC (rev 534) +++ trunk/nic3com.c 2009-05-19 14:14:21 UTC (rev 535) @@ -110,10 +110,6 @@ uint8_t nic3com_chip_readb(const chipaddr addr) { - uint8_t val; - OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); - val = INB(io_base_addr + BIOS_ROM_DATA); - - return val; + return INB(io_base_addr + BIOS_ROM_DATA); }

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[PATCH] flashrom: List supported/nonsupported boards
by Uwe Hermann 19 May '09

19 May '09

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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On the topic of flash
by Peter Stuge 19 May '09

19 May '09

Maybe we'll see this take over in a year or two. http://www.numonyx.com/en-US/About/PressRoom/Releases/Pages/IntelSTDeliverF… NOR, NAND and RAM all in one. //Peter

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[flashrom] r534 - trunk
by svn＠coreboot.org 19 May '09

19 May '09

Author: uwe Date: 2009-05-19 00:27:53 +0200 (Tue, 19 May 2009) New Revision: 534 Modified: trunk/board_enable.c Log: Add detection support and write-enable for the GIGABYTE GA-MA78GM-S2H. Thanks Michael Heimann for reporting. The board was misidentified as a GIGABYTE GA-MA78G-DS3H though, as the old PCI IDs and subsystem IDs of match. Thus, use differing ones for both boards, which is not so easy. The only usable-looking difference is in the SATA controller subsystem IDs. This should allow us to properly detect both boards. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-05-18 21:56:16 UTC (rev 533) +++ trunk/board_enable.c 2009-05-18 22:27:53 UTC (rev 534) @@ -679,7 +679,8 @@ {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", board_biostar_p4m80_m4}, {0x10de, 0x0360, 0, 0, 0, 0, 0, 0, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, "gigabyte", "m61p", "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb002, NULL, NULL, "GIGABYTE", "GA-MA78GM-S2H", it87xx_probe_spi_flash}, /* SB600 LPC, RD790 North. Neither are specific to the GA-MA790FX-DQ6. The coreboot ID is here to be able to trigger the board enable more easily. */ {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, "gigabyte", "ma790fx-dq6", "GIGABYTE", "GA-MA790FX-DQ6", it87xx_probe_spi_flash}, {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP", "DL145 G3", board_hp_dl145_g3_enable},

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coreboot May 2009