coreboot March 2009

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r3973 - trunk/util/flashrom
by svn＠coreboot.org 06 Mar '09

06 Mar '09

Author: hailfinger Date: 2009-03-06 01:40:25 +0100 (Fri, 06 Mar 2009) New Revision: 3973 Modified: trunk/util/flashrom/sst28sf040.c Log: During the conversion of flash chip accesses to helper functions, I spotted assignments to volatile variables which were neither placed inside the mmapped ROM area nor were they counters. Due to the use of accessor functions, volatile usage can be reduced significantly because the accessor functions take care of actually performing the reads/writes correctly. The following semantic patch spotted them (linebreak in python string for readability reasons, please remove before usage): @r exists@ expression b; typedef uint8_t; volatile uint8_t a; position p1; @@ a@p1 = readb(b); @script:python@ p1 << r.p1; a << r.a; b << r.b; @@ print "* file: %s line %s has assignment to unnecessarily volatile variable: %s = readb(%s);" % (p1[0].file, p1[0].line, a, b) Result was: HANDLING: sst28sf040.c * file: sst28sf040.c line 44 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 43 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 42 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 41 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 40 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 39 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 38 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 58 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 57 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 56 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 55 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 54 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 53 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 52 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); The following semantic patch uses the spatch builtin match printing functionality by prepending a "*" to the line with the pattern: @@ expression b; typedef uint8_t; volatile uint8_t a; @@ * a = readb(b); Result is: HANDLING: sst28sf040.c diff = --- sst28sf040.c 2009-03-06 01:04:49.000000000 +0100 @@ -35,13 +35,6 @@ static __inline__ void protect_28sf040(v /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = readb(bios + 0x1823); - tmp = readb(bios + 0x1820); - tmp = readb(bios + 0x1822); - tmp = readb(bios + 0x0418); - tmp = readb(bios + 0x041B); - tmp = readb(bios + 0x0419); - tmp = readb(bios + 0x040A); } static __inline__ void unprotect_28sf040(volatile uint8_t *bios) @@ -49,13 +42,6 @@ static __inline__ void unprotect_28sf040 /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = readb(bios + 0x1823); - tmp = readb(bios + 0x1820); - tmp = readb(bios + 0x1822); - tmp = readb(bios + 0x0418); - tmp = readb(bios + 0x041B); - tmp = readb(bios + 0x0419); - tmp = readb(bios + 0x041A); } static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, It's arguably a bit easier to read if you get used to the leading "-" for matching lines. This patch was enabled by Coccinelle: http://www.emn.fr/x-info/coccinelle/ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Joseph Smith <joe(a)settoplinux.org> -- http://www.hailfinger.org/ Modified: trunk/util/flashrom/sst28sf040.c =================================================================== --- trunk/util/flashrom/sst28sf040.c 2009-03-05 19:33:12 UTC (rev 3972) +++ trunk/util/flashrom/sst28sf040.c 2009-03-06 00:40:25 UTC (rev 3973) @@ -32,8 +32,7 @@ static __inline__ void protect_28sf040(volatile uint8_t *bios) { - /* ask compiler not to optimize this */ - volatile uint8_t tmp; + uint8_t tmp; tmp = readb(bios + 0x1823); tmp = readb(bios + 0x1820); @@ -46,8 +45,7 @@ static __inline__ void unprotect_28sf040(volatile uint8_t *bios) { - /* ask compiler not to optimize this */ - volatile uint8_t tmp; + uint8_t tmp; tmp = readb(bios + 0x1823); tmp = readb(bios + 0x1820);

1 0

[PATCH] flashrom: Use helper functions to access flash chips
by Carl-Daniel Hailfinger 05 Mar '09

05 Mar '09

flashrom: Use helper functions to access flash chips. Right now we perform direct pointer manipulation without any abstraction to read from and write to memory mapped flash chips. That makes it impossible to drive any flasher which does not mmap the whole chip. Using helper functions readb() and writeb() allows a driver for external flash programmers like Paraflasher to replace readb and writeb with calls to its own chip access routines. This patch has the additional advantage of removing lots of unnecessary casts to volatile uint8_t * and now-superfluous parentheses which caused poor readability. Please note that this patch works, but the conversion is not complete yet (reads outside assignments are not converted). I used the semantic patcher Coccinelle to create this patch. The semantic patch follows: @@ expression a; typedef uint8_t; volatile uint8_t *b; @@ - *b = a; + writeb(a, b); @@ expression a; volatile uint8_t *b; @@ - a = *b; + a = readb(b); @@ type T; T b; expression a; @@ writeb(a, -(T) b); @@ type T; T b; expression a; @@ a = readb( -(T) b); @@ expression a, b; @@ writeb(a, -( b -) ); @@ expression a, b; @@ a = readb( -( b -) ); Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-inband_chipaccess_helper_functions/flash.h =================================================================== --- flashrom-inband_chipaccess_helper_functions/flash.h (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/flash.h (Arbeitskopie) @@ -58,6 +58,36 @@ #define INL inl #endif +static inline void writeb(uint8_t b, volatile void *addr) +{ + *(volatile uint8_t *) addr = b; +} + +static inline void writew(uint16_t b, volatile void *addr) +{ + *(volatile uint16_t *) addr = b; +} + +static inline void writel(uint32_t b, volatile void *addr) +{ + *(volatile uint32_t *) addr = b; +} + +static inline uint8_t readb(const volatile void *addr) +{ + return *(volatile uint8_t *) addr; +} + +static inline uint16_t readw(const volatile void *addr) +{ + return *(volatile uint16_t *) addr; +} + +static inline uint32_t readl(const volatile void *addr) +{ + return *(volatile uint32_t *) addr; +} + #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) struct flashchip { Index: flashrom-inband_chipaccess_helper_functions/pm49fl00x.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/pm49fl00x.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/pm49fl00x.c (Arbeitskopie) @@ -35,7 +35,7 @@ if (block_size == 16384 && i % 2) continue; - *(bios + (i * block_size) + 2) = bits; + writeb(bits, bios + (i * block_size) + 2); } } Index: flashrom-inband_chipaccess_helper_functions/en29f002a.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/en29f002a.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/en29f002a.c (Arbeitskopie) @@ -35,19 +35,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -68,19 +68,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -107,10 +107,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst); Index: flashrom-inband_chipaccess_helper_functions/jedec.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/jedec.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/jedec.c (Arbeitskopie) @@ -68,21 +68,21 @@ void unprotect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x20; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x20, bios + 0x5555); usleep(200); } void protect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -94,40 +94,40 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ myusec_delay(10000); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); @@ -143,18 +143,18 @@ int erase_sector_jedec(volatile uint8_t *bios, unsigned int page) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + page) = 0x30; + writeb(0x30, bios + page); myusec_delay(10); /* wait for Toggle bit ready */ @@ -166,18 +166,18 @@ int erase_block_jedec(volatile uint8_t *bios, unsigned int block) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + block) = 0x50; + writeb(0x50, bios + block); myusec_delay(10); /* wait for Toggle bit ready */ @@ -191,18 +191,18 @@ volatile uint8_t *bios = flash->virtual_memory; /* Issue the JEDEC Chip Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x10; + writeb(0x10, bios + 0x5555); myusec_delay(10); toggle_ready_jedec(bios); @@ -219,15 +219,15 @@ retry: /* Issue JEDEC Data Unprotect comand */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ for (i = start_index; i < page_size; i++) { /* If the data is 0xFF, don't program it */ if (*src != 0xFF) - *dst = *src; + writeb(*src, dst); dst++; src++; } @@ -269,12 +269,12 @@ retry: /* Issue JEDEC Byte Program command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); toggle_ready_jedec(bios); if (*dst != *src && tried++ < MAX_REFLASH_TRIES) { Index: flashrom-inband_chipaccess_helper_functions/w29ee011.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w29ee011.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w29ee011.c (Arbeitskopie) @@ -37,29 +37,29 @@ } /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x60; + writeb(0x60, bios + 0x5555); myusec_delay(10); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Index: flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c (Arbeitskopie) @@ -50,20 +50,20 @@ //printf("bios=0x%08lx\n", (unsigned long)bios); for (i = 0; left > 65536; i++, left -= 65536) { //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) ); - *(bios + (i * 65536) + 2) = bits; + writeb(bits, bios + (i * 65536) + 2); } address = i * 65536; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 32768; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); return 0; } @@ -73,14 +73,14 @@ { unsigned char status; - *bios = SECTOR_ERASE; - *(bios + address) = ERASE; + writeb(SECTOR_ERASE, bios); + writeb(ERASE, bios + address); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -96,7 +96,7 @@ int i; unsigned char status; - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ if (*src == 0xFF) { @@ -105,14 +105,14 @@ continue; } /*issue AUTO PROGRAM command */ - *bios = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, bios); + writeb(*src++, dst++); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -127,13 +127,13 @@ uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); - *bios = READ_ID; - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + writeb(READ_ID, bios); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -157,7 +157,7 @@ if (erase_sector_49lfxxxc(bios, i) != 0) return (-1); - *bios = RESET; + writeb(RESET, bios); return 0; } @@ -183,7 +183,7 @@ } printf("\n"); - *bios = RESET; + writeb(RESET, bios); return 0; } Index: flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c (Arbeitskopie) @@ -46,18 +46,18 @@ *(volatile uint8_t *)(bios + 0x5555) = 0x90; #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -76,25 +76,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -106,19 +106,19 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf("Erase at %p\n", bios); status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); // clear write protect printf("write protect is at %p\n", (wrprotect)); printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; + writeb(0, wrprotect); printf("write protect is 0x%x\n", *(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); @@ -149,8 +149,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_lhf00l04(bios); } } Index: flashrom-inband_chipaccess_helper_functions/m29f002.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/m29f002.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/m29f002.c (Arbeitskopie) @@ -22,12 +22,12 @@ int erase_m29f002(struct flashchip *flash) { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x10; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); return 0; @@ -35,21 +35,21 @@ static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) { /* erase */ - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *dst = 0x30; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); /* program */ while (size--) { - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xa0; - *dst = *src; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0xa0, bios + 0x555); + writeb(*src, dst); toggle_ready_jedec(dst); dst++; src++; Index: flashrom-inband_chipaccess_helper_functions/w39v040c.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w39v040c.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w39v040c.c (Arbeitskopie) @@ -26,22 +26,22 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2, lock; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 1); - lock = *(volatile uint8_t *)(bios + 0xfff2); + id1 = readb(bios); + id2 = readb(bios + 1); + lock = readb(bios + 0xfff2); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); Index: flashrom-inband_chipaccess_helper_functions/sst28sf040.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst28sf040.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst28sf040.c (Arbeitskopie) @@ -35,13 +35,13 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x040A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x040A); } static __inline__ void unprotect_28sf040(volatile uint8_t *bios) @@ -49,20 +49,20 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x041A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x041A); } static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, unsigned long address) { - *bios = AUTO_PG_ERASE1; - *(bios + address) = AUTO_PG_ERASE2; + writeb(AUTO_PG_ERASE1, bios); + writeb(AUTO_PG_ERASE2, bios + address); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -85,8 +85,8 @@ continue; } /*issue AUTO PROGRAM command */ - *dst = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, dst); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -100,16 +100,16 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); - *bios = READ_ID; + writeb(READ_ID, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); myusec_delay(10); - id2 = *(volatile uint8_t *)(bios + 0x01); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -124,8 +124,8 @@ volatile uint8_t *bios = flash->virtual_memory; unprotect_28sf040(bios); - *bios = CHIP_ERASE; - *bios = CHIP_ERASE; + writeb(CHIP_ERASE, bios); + writeb(CHIP_ERASE, bios); protect_28sf040(bios); myusec_delay(10); Index: flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c (Arbeitskopie) @@ -33,9 +33,9 @@ void protect_stm50flw0x0x(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -47,37 +47,37 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(40); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, @@ -96,21 +96,21 @@ uint8_t id1; // id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); } /* @@ -142,7 +142,7 @@ // unlock each 4k-sector for (j = 0; j < 0x10000; j += 0x1000) { printf_debug("unlocking at 0x%x\n", offset + j); - *(flash_addr + offset + j) = unlock_sector; + writeb(unlock_sector, flash_addr + offset + j); if (*(flash_addr + offset + j) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset + j); @@ -151,7 +151,7 @@ } } else { printf_debug("unlocking at 0x%x\n", offset); - *(flash_addr + offset) = unlock_sector; + writeb(unlock_sector, flash_addr + offset); if (*(flash_addr + offset) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset); return -1; @@ -167,11 +167,11 @@ int j; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf_debug("Erase at %p\n", bios); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); wait_stm50flw0x0x(flash->virtual_memory); @@ -197,8 +197,8 @@ /* transfer data from source to destination */ for (i = 0; i < page_size; i++) { - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_stm50flw0x0x(bios); } Index: flashrom-inband_chipaccess_helper_functions/am29f040b.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/am29f040b.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/am29f040b.c (Arbeitskopie) @@ -25,12 +25,12 @@ static __inline__ int erase_sector_29f040b(volatile uint8_t *bios, unsigned long address) { - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + address) = 0x30; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x30, bios + address); sleep(2); @@ -52,10 +52,10 @@ printf("0x%08lx", (unsigned long)dst - (unsigned long)bios); - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0xA0; - *dst++ = *src++; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xA0, bios + 0x555); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -72,14 +72,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); - id1 = *bios; - id2 = *(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -94,12 +94,12 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/sst_fwhub.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst_fwhub.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst_fwhub.c (Arbeitskopie) @@ -51,7 +51,7 @@ volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; // clear write protect - *(wrprotect) = 0; + writeb(0, wrprotect); erase_block_jedec(flash->virtual_memory, offset); toggle_ready_jedec(flash->virtual_memory); Index: flashrom-inband_chipaccess_helper_functions/w39v080fa.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w39v080fa.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w39v080fa.c (Arbeitskopie) @@ -27,19 +27,19 @@ uint8_t vid, did; /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read product ID */ - vid = *(volatile uint8_t *)bios; - did = *(volatile uint8_t *)(bios + 0x01); + vid = readb(bios); + did = readb(bios + 0x01); /* Product Identifixation Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did); @@ -60,14 +60,14 @@ printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, *wrprotect); - locking = *wrprotect; + locking = readb(wrprotect); switch (locking & 0x7) { case 0: printf_debug("Full Access.\n"); return 0; case 1: printf_debug("Write Lock (Default State).\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 2: printf_debug("Locked Open (Full Access, Lock Down).\n"); @@ -77,11 +77,11 @@ return -1; case 4: printf_debug("Read Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 5: printf_debug("Read/Write Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 6: fprintf(stderr, "Error: Read Lock, Locked Down.\n"); @@ -106,18 +106,18 @@ */ /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read Hardware Lock Bits */ - locking = *(volatile uint8_t *)(bios + 0xffff2); + locking = readb(bios + 0xffff2); /* Product Identification Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("Lockout bits:\n"); @@ -151,13 +151,13 @@ printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); /* Sector Erase */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + sector) = 0x30; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x30, bios + sector); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/82802ab.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/82802ab.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/82802ab.c (Arbeitskopie) @@ -49,23 +49,23 @@ uint8_t id1, id2; #if 0 - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -84,25 +84,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -115,17 +115,17 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); //printf("Erase at %p\n", bios); // clear write protect //printf("write protect is at %p\n", (wrprotect)); //printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; + writeb(0, wrprotect); //printf("write protect is 0x%x\n", *(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); @@ -162,8 +162,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_82802ab(bios); } } Index: flashrom-inband_chipaccess_helper_functions/m29f400bt.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/m29f400bt.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/m29f400bt.c (Arbeitskopie) @@ -22,9 +22,9 @@ void protect_m29f400bt(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); usleep(200); } @@ -35,12 +35,12 @@ int i; for (i = 0; i < page_size; i++) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); //*(volatile char *) (bios) = 0xF0; //usleep(5); toggle_ready_jedec(dst); @@ -57,21 +57,21 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x90; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x90, bios + 0xAAA); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in * flash.h does not match. It should be possible to use JEDEC probe. */ - id2 = *(volatile uint8_t *)(bios + 0x02); + id2 = readb(bios + 0x02); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xF0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xF0, bios + 0xAAA); myusec_delay(10); @@ -87,13 +87,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x10; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x10, bios + 0xAAA); myusec_delay(10); toggle_ready_jedec(bios); @@ -104,14 +104,14 @@ int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); //*(volatile uint8_t *) (bios + 0xAAA) = 0x10; - *dst = 0x30; + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/mx29f002.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/mx29f002.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/mx29f002.c (Arbeitskopie) @@ -27,14 +27,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -49,13 +49,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xF0; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xF0, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(100); toggle_ready_jedec(bios); @@ -83,7 +83,7 @@ volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *dst = bios; - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); erase_29f002(flash); //*bios = 0xF0; @@ -93,10 +93,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst); -- http://www.hailfinger.org/ Index: flashrom-inband_chipaccess_helper_functions/flash.h =================================================================== --- flashrom-inband_chipaccess_helper_functions/flash.h (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/flash.h (Arbeitskopie) @@ -58,6 +58,36 @@ #define INL inl #endif +static inline void writeb(uint8_t b, volatile void *addr) +{ + *(volatile uint8_t *) addr = b; +} + +static inline void writew(uint16_t b, volatile void *addr) +{ + *(volatile uint16_t *) addr = b; +} + +static inline void writel(uint32_t b, volatile void *addr) +{ + *(volatile uint32_t *) addr = b; +} + +static inline uint8_t readb(const volatile void *addr) +{ + return *(volatile uint8_t *) addr; +} + +static inline uint16_t readw(const volatile void *addr) +{ + return *(volatile uint16_t *) addr; +} + +static inline uint32_t readl(const volatile void *addr) +{ + return *(volatile uint32_t *) addr; +} + #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) struct flashchip { Index: flashrom-inband_chipaccess_helper_functions/pm49fl00x.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/pm49fl00x.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/pm49fl00x.c (Arbeitskopie) @@ -35,7 +35,7 @@ if (block_size == 16384 && i % 2) continue; - *(bios + (i * block_size) + 2) = bits; + writeb(bits, bios + (i * block_size) + 2); } } Index: flashrom-inband_chipaccess_helper_functions/en29f002a.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/en29f002a.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/en29f002a.c (Arbeitskopie) @@ -35,19 +35,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -68,19 +68,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -107,10 +107,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst); Index: flashrom-inband_chipaccess_helper_functions/jedec.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/jedec.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/jedec.c (Arbeitskopie) @@ -68,21 +68,21 @@ void unprotect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x20; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x20, bios + 0x5555); usleep(200); } void protect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -94,40 +94,40 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ myusec_delay(10000); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); @@ -143,18 +143,18 @@ int erase_sector_jedec(volatile uint8_t *bios, unsigned int page) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + page) = 0x30; + writeb(0x30, bios + page); myusec_delay(10); /* wait for Toggle bit ready */ @@ -166,18 +166,18 @@ int erase_block_jedec(volatile uint8_t *bios, unsigned int block) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + block) = 0x50; + writeb(0x50, bios + block); myusec_delay(10); /* wait for Toggle bit ready */ @@ -191,18 +191,18 @@ volatile uint8_t *bios = flash->virtual_memory; /* Issue the JEDEC Chip Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x10; + writeb(0x10, bios + 0x5555); myusec_delay(10); toggle_ready_jedec(bios); @@ -219,15 +219,15 @@ retry: /* Issue JEDEC Data Unprotect comand */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ for (i = start_index; i < page_size; i++) { /* If the data is 0xFF, don't program it */ if (*src != 0xFF) - *dst = *src; + writeb(*src, dst); dst++; src++; } @@ -269,12 +269,12 @@ retry: /* Issue JEDEC Byte Program command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); toggle_ready_jedec(bios); if (*dst != *src && tried++ < MAX_REFLASH_TRIES) { Index: flashrom-inband_chipaccess_helper_functions/w29ee011.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w29ee011.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w29ee011.c (Arbeitskopie) @@ -37,29 +37,29 @@ } /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x60; + writeb(0x60, bios + 0x5555); myusec_delay(10); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Index: flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst49lfxxxc.c (Arbeitskopie) @@ -50,20 +50,20 @@ //printf("bios=0x%08lx\n", (unsigned long)bios); for (i = 0; left > 65536; i++, left -= 65536) { //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) ); - *(bios + (i * 65536) + 2) = bits; + writeb(bits, bios + (i * 65536) + 2); } address = i * 65536; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 32768; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); return 0; } @@ -73,14 +73,14 @@ { unsigned char status; - *bios = SECTOR_ERASE; - *(bios + address) = ERASE; + writeb(SECTOR_ERASE, bios); + writeb(ERASE, bios + address); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -96,7 +96,7 @@ int i; unsigned char status; - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ if (*src == 0xFF) { @@ -105,14 +105,14 @@ continue; } /*issue AUTO PROGRAM command */ - *bios = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, bios); + writeb(*src++, dst++); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -127,13 +127,13 @@ uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); - *bios = READ_ID; - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + writeb(READ_ID, bios); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -157,7 +157,7 @@ if (erase_sector_49lfxxxc(bios, i) != 0) return (-1); - *bios = RESET; + writeb(RESET, bios); return 0; } @@ -183,7 +183,7 @@ } printf("\n"); - *bios = RESET; + writeb(RESET, bios); return 0; } Index: flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sharplhf00l04.c (Arbeitskopie) @@ -46,18 +46,18 @@ *(volatile uint8_t *)(bios + 0x5555) = 0x90; #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -76,25 +76,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -106,19 +106,19 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf("Erase at %p\n", bios); status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); // clear write protect printf("write protect is at %p\n", (wrprotect)); printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; + writeb(0, wrprotect); printf("write protect is 0x%x\n", *(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); @@ -149,8 +149,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_lhf00l04(bios); } } Index: flashrom-inband_chipaccess_helper_functions/m29f002.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/m29f002.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/m29f002.c (Arbeitskopie) @@ -22,12 +22,12 @@ int erase_m29f002(struct flashchip *flash) { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x10; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); return 0; @@ -35,21 +35,21 @@ static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) { /* erase */ - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *dst = 0x30; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); /* program */ while (size--) { - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xa0; - *dst = *src; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0xa0, bios + 0x555); + writeb(*src, dst); toggle_ready_jedec(dst); dst++; src++; Index: flashrom-inband_chipaccess_helper_functions/w39v040c.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w39v040c.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w39v040c.c (Arbeitskopie) @@ -26,22 +26,22 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2, lock; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 1); - lock = *(volatile uint8_t *)(bios + 0xfff2); + id1 = readb(bios); + id2 = readb(bios + 1); + lock = readb(bios + 0xfff2); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); Index: flashrom-inband_chipaccess_helper_functions/sst28sf040.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst28sf040.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst28sf040.c (Arbeitskopie) @@ -35,13 +35,13 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x040A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x040A); } static __inline__ void unprotect_28sf040(volatile uint8_t *bios) @@ -49,20 +49,20 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x041A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x041A); } static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, unsigned long address) { - *bios = AUTO_PG_ERASE1; - *(bios + address) = AUTO_PG_ERASE2; + writeb(AUTO_PG_ERASE1, bios); + writeb(AUTO_PG_ERASE2, bios + address); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -85,8 +85,8 @@ continue; } /*issue AUTO PROGRAM command */ - *dst = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, dst); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -100,16 +100,16 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); - *bios = READ_ID; + writeb(READ_ID, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); myusec_delay(10); - id2 = *(volatile uint8_t *)(bios + 0x01); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -124,8 +124,8 @@ volatile uint8_t *bios = flash->virtual_memory; unprotect_28sf040(bios); - *bios = CHIP_ERASE; - *bios = CHIP_ERASE; + writeb(CHIP_ERASE, bios); + writeb(CHIP_ERASE, bios); protect_28sf040(bios); myusec_delay(10); Index: flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/stm50flw0x0x.c (Arbeitskopie) @@ -33,9 +33,9 @@ void protect_stm50flw0x0x(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -47,37 +47,37 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(40); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, @@ -96,21 +96,21 @@ uint8_t id1; // id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); } /* @@ -142,7 +142,7 @@ // unlock each 4k-sector for (j = 0; j < 0x10000; j += 0x1000) { printf_debug("unlocking at 0x%x\n", offset + j); - *(flash_addr + offset + j) = unlock_sector; + writeb(unlock_sector, flash_addr + offset + j); if (*(flash_addr + offset + j) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset + j); @@ -151,7 +151,7 @@ } } else { printf_debug("unlocking at 0x%x\n", offset); - *(flash_addr + offset) = unlock_sector; + writeb(unlock_sector, flash_addr + offset); if (*(flash_addr + offset) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset); return -1; @@ -167,11 +167,11 @@ int j; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf_debug("Erase at %p\n", bios); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); wait_stm50flw0x0x(flash->virtual_memory); @@ -197,8 +197,8 @@ /* transfer data from source to destination */ for (i = 0; i < page_size; i++) { - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_stm50flw0x0x(bios); } Index: flashrom-inband_chipaccess_helper_functions/am29f040b.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/am29f040b.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/am29f040b.c (Arbeitskopie) @@ -25,12 +25,12 @@ static __inline__ int erase_sector_29f040b(volatile uint8_t *bios, unsigned long address) { - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + address) = 0x30; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x30, bios + address); sleep(2); @@ -52,10 +52,10 @@ printf("0x%08lx", (unsigned long)dst - (unsigned long)bios); - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0xA0; - *dst++ = *src++; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xA0, bios + 0x555); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -72,14 +72,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); - id1 = *bios; - id2 = *(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -94,12 +94,12 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/sst_fwhub.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/sst_fwhub.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/sst_fwhub.c (Arbeitskopie) @@ -51,7 +51,7 @@ volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; // clear write protect - *(wrprotect) = 0; + writeb(0, wrprotect); erase_block_jedec(flash->virtual_memory, offset); toggle_ready_jedec(flash->virtual_memory); Index: flashrom-inband_chipaccess_helper_functions/w39v080fa.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/w39v080fa.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/w39v080fa.c (Arbeitskopie) @@ -27,19 +27,19 @@ uint8_t vid, did; /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read product ID */ - vid = *(volatile uint8_t *)bios; - did = *(volatile uint8_t *)(bios + 0x01); + vid = readb(bios); + did = readb(bios + 0x01); /* Product Identifixation Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did); @@ -60,14 +60,14 @@ printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, *wrprotect); - locking = *wrprotect; + locking = readb(wrprotect); switch (locking & 0x7) { case 0: printf_debug("Full Access.\n"); return 0; case 1: printf_debug("Write Lock (Default State).\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 2: printf_debug("Locked Open (Full Access, Lock Down).\n"); @@ -77,11 +77,11 @@ return -1; case 4: printf_debug("Read Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 5: printf_debug("Read/Write Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 6: fprintf(stderr, "Error: Read Lock, Locked Down.\n"); @@ -106,18 +106,18 @@ */ /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read Hardware Lock Bits */ - locking = *(volatile uint8_t *)(bios + 0xffff2); + locking = readb(bios + 0xffff2); /* Product Identification Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("Lockout bits:\n"); @@ -151,13 +151,13 @@ printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); /* Sector Erase */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + sector) = 0x30; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x30, bios + sector); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/82802ab.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/82802ab.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/82802ab.c (Arbeitskopie) @@ -49,23 +49,23 @@ uint8_t id1, id2; #if 0 - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -84,25 +84,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; + writeb(0x70, bios); if ((*bios & 0x80) == 0) { // it's busy while ((*bios & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -115,17 +115,17 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); //printf("Erase at %p\n", bios); // clear write protect //printf("write protect is at %p\n", (wrprotect)); //printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; + writeb(0, wrprotect); //printf("write protect is 0x%x\n", *(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); @@ -162,8 +162,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_82802ab(bios); } } Index: flashrom-inband_chipaccess_helper_functions/m29f400bt.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/m29f400bt.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/m29f400bt.c (Arbeitskopie) @@ -22,9 +22,9 @@ void protect_m29f400bt(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); usleep(200); } @@ -35,12 +35,12 @@ int i; for (i = 0; i < page_size; i++) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); //*(volatile char *) (bios) = 0xF0; //usleep(5); toggle_ready_jedec(dst); @@ -57,21 +57,21 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x90; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x90, bios + 0xAAA); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in * flash.h does not match. It should be possible to use JEDEC probe. */ - id2 = *(volatile uint8_t *)(bios + 0x02); + id2 = readb(bios + 0x02); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xF0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xF0, bios + 0xAAA); myusec_delay(10); @@ -87,13 +87,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x10; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x10, bios + 0xAAA); myusec_delay(10); toggle_ready_jedec(bios); @@ -104,14 +104,14 @@ int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); //*(volatile uint8_t *) (bios + 0xAAA) = 0x10; - *dst = 0x30; + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); Index: flashrom-inband_chipaccess_helper_functions/mx29f002.c =================================================================== --- flashrom-inband_chipaccess_helper_functions/mx29f002.c (Revision 3970) +++ flashrom-inband_chipaccess_helper_functions/mx29f002.c (Arbeitskopie) @@ -27,14 +27,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -49,13 +49,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xF0; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xF0, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(100); toggle_ready_jedec(bios); @@ -83,7 +83,7 @@ volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *dst = bios; - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); erase_29f002(flash); //*bios = 0xF0; @@ -93,10 +93,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst);

3 4

r1144 - coreboot-v3/util/x86emu/yabel
by svn＠coreboot.org 05 Mar '09

05 Mar '09

Author: phueper Date: 2009-03-05 22:28:56 +0100 (Thu, 05 Mar 2009) New Revision: 1144 Modified: coreboot-v3/util/x86emu/yabel/io.c Log: YABEL: fix 32bit cf8/cfc PCI Config accesses Signed-off-by: Pattrick Hueper <phueper(a)hueper.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: coreboot-v3/util/x86emu/yabel/io.c =================================================================== --- coreboot-v3/util/x86emu/yabel/io.c 2009-03-05 05:48:43 UTC (rev 1143) +++ coreboot-v3/util/x86emu/yabel/io.c 2009-03-05 21:28:56 UTC (rev 1144) @@ -348,7 +348,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size) { u32 rval = 0xFFFFFFFF; - if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) { + if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset // later read from 0xCFC-0xCFF returns the value... @@ -404,7 +404,7 @@ void pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size) { - if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) { + if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) { // PCI Configuration Mechanism 1 step 1 // write to 0xCF8, sets bus, device, function and Config Space offset // later write to 0xCFC-0xCFF sets the value...

1 0

[PATCH] Don't loop endlessly in get_pbus
by Carl-Daniel Hailfinger 05 Mar '09

05 Mar '09

If get_pbus() is called for a device which has no parent/ancestor bus with nonzero PCI bus operations, get_pbus() will get stuck in a silent endless loop. Detect the endless loop and break out with an error message. Such a situation can happen if the device tree is not yet initialized/walked completely. This fixes the unexplainable hang if pci_{read,write}_config{8,16,32}was used in early mainboard code for the AMD DBM690T. Instead, the code will now die() with a meaningful error message. Thanks to Ward Vandewege for testing my patches to track down that bug. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c (Revision 3967) +++ LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c (Arbeitskopie) @@ -28,6 +28,12 @@ { struct bus *pbus = dev->bus; while(pbus && pbus->dev && !ops_pci_bus(pbus)) { + if (pbus == pbus->dev->bus) { + printk_alert("%s in endless loop looking for a parent " + "bus with ops_pci_bus for %s, breaking out\n", + __func__, dev_path(dev)); + break; + } pbus = pbus->dev->bus; } if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) { -- http://www.hailfinger.org/ Index: LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c (Revision 3967) +++ LinuxBIOSv2-asus_m2a-vm/src/devices/pci_ops.c (Arbeitskopie) @@ -28,6 +28,12 @@ { struct bus *pbus = dev->bus; while(pbus && pbus->dev && !ops_pci_bus(pbus)) { + if (pbus == pbus->dev->bus) { + printk_alert("%s in endless loop looking for a parent " + "bus with ops_pci_bus for %s, breaking out\n", + __func__, dev_path(dev)); + break; + } pbus = pbus->dev->bus; } if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) {

2 2

r3972 - trunk/coreboot-v2/src/devices
by svn＠coreboot.org 05 Mar '09

05 Mar '09

Author: hailfinger Date: 2009-03-05 20:33:12 +0100 (Thu, 05 Mar 2009) New Revision: 3972 Modified: trunk/coreboot-v2/src/devices/pci_ops.c Log: If get_pbus() is called for a device which has no parent/ancestor bus with nonzero PCI bus operations, get_pbus() will get stuck in a silent endless loop. Detect the endless loop and break out with an error message. Such a situation can happen if the device tree is not yet initialized/walked completely. This fixes the unexplainable hang if pci_{read,write}_config{8,16,32}was used in early mainboard code for the AMD DBM690T. Instead, the code will now die() with a meaningful error message. Thanks to Ward Vandewege for testing my patches to track down that bug. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Marc Jones <marcj303(a)gmail.com> Modified: trunk/coreboot-v2/src/devices/pci_ops.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_ops.c 2009-03-05 19:24:22 UTC (rev 3971) +++ trunk/coreboot-v2/src/devices/pci_ops.c 2009-03-05 19:33:12 UTC (rev 3972) @@ -28,6 +28,12 @@ { struct bus *pbus = dev->bus; while(pbus && pbus->dev && !ops_pci_bus(pbus)) { + if (pbus == pbus->dev->bus) { + printk_alert("%s in endless loop looking for a parent " + "bus with ops_pci_bus for %s, breaking out\n", + __func__, dev_path(dev)); + break; + } pbus = pbus->dev->bus; } if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) {

1 0

r3971 - trunk/util/flashrom
by svn＠coreboot.org 05 Mar '09

05 Mar '09

Author: hailfinger Date: 2009-03-05 20:24:22 +0100 (Thu, 05 Mar 2009) New Revision: 3971 Modified: trunk/util/flashrom/82802ab.c trunk/util/flashrom/am29f040b.c trunk/util/flashrom/en29f002a.c trunk/util/flashrom/flash.h trunk/util/flashrom/jedec.c trunk/util/flashrom/m29f002.c trunk/util/flashrom/m29f400bt.c trunk/util/flashrom/mx29f002.c trunk/util/flashrom/pm49fl00x.c trunk/util/flashrom/sharplhf00l04.c trunk/util/flashrom/sst28sf040.c trunk/util/flashrom/sst49lfxxxc.c trunk/util/flashrom/sst_fwhub.c trunk/util/flashrom/stm50flw0x0x.c trunk/util/flashrom/w29ee011.c trunk/util/flashrom/w39v040c.c trunk/util/flashrom/w39v080fa.c Log: flashrom: Use helper functions to access flash chips. Right now we perform direct pointer manipulation without any abstraction to read from and write to memory mapped flash chips. That makes it impossible to drive any flasher which does not mmap the whole chip. Using helper functions readb() and writeb() allows a driver for external flash programmers like Paraflasher to replace readb and writeb with calls to its own chip access routines. This patch has the additional advantage of removing lots of unnecessary casts to volatile uint8_t * and now-superfluous parentheses which caused poor readability. I used the semantic patcher Coccinelle to create this patch. The semantic patch follows: @@ expression a; typedef uint8_t; volatile uint8_t *b; @@ - *(b) = (a); + writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + readb(b) @@ type T; T b; @@ ( readb | writeb ) (..., - (T) - (b) + b ) In contrast to a sed script, the semantic patch performs type checking before converting anything. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: FENG Yu Ning <fengyuning1984(a)gmail.com> Tested-by: Joe Julian Modified: trunk/util/flashrom/82802ab.c =================================================================== --- trunk/util/flashrom/82802ab.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/82802ab.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -49,23 +49,23 @@ uint8_t id1, id2; #if 0 - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -84,25 +84,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; - if ((*bios & 0x80) == 0) { // it's busy - while ((*bios & 0x80) == 0) ; + writeb(0x70, bios); + if ((readb(bios) & 0x80) == 0) { // it's busy + while ((readb(bios) & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -115,23 +115,23 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); //printf("Erase at %p\n", bios); // clear write protect //printf("write protect is at %p\n", (wrprotect)); //printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; + writeb(0, wrprotect); //printf("write protect is 0x%x\n", *(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); //print_82802ab_status(status); for (j = 0; j < flash->page_size; j++) { - if (*(bios + j) != 0xFF) { + if (readb(bios + j) != 0xFF) { printf("BLOCK ERASE failed at 0x%x\n", offset); return -1; } @@ -162,8 +162,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_82802ab(bios); } } Modified: trunk/util/flashrom/am29f040b.c =================================================================== --- trunk/util/flashrom/am29f040b.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/am29f040b.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -25,12 +25,12 @@ static __inline__ int erase_sector_29f040b(volatile uint8_t *bios, unsigned long address) { - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + address) = 0x30; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x30, bios + address); sleep(2); @@ -52,10 +52,10 @@ printf("0x%08lx", (unsigned long)dst - (unsigned long)bios); - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0xA0; - *dst++ = *src++; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xA0, bios + 0x555); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -72,14 +72,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); - id1 = *bios; - id2 = *(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -94,12 +94,12 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); Modified: trunk/util/flashrom/en29f002a.c =================================================================== --- trunk/util/flashrom/en29f002a.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/en29f002a.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -35,19 +35,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -68,19 +68,19 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x90; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0x90, bios + 0x555); myusec_delay(10); - id1 = *(volatile uint8_t *)(bios + 0x100); - id2 = *(volatile uint8_t *)(bios + 0x101); + id1 = readb(bios + 0x100); + id2 = readb(bios + 0x101); /* exit by writing F0 anywhere? or the code below */ - *(volatile uint8_t *)(bios + 0x555) = 0xAA; - *(volatile uint8_t *)(bios + 0xAAA) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xF0; + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0xAAA); + writeb(0xF0, bios + 0x555); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -107,10 +107,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst); Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/flash.h 2009-03-05 19:24:22 UTC (rev 3971) @@ -58,6 +58,36 @@ #define INL inl #endif +static inline void writeb(uint8_t b, volatile void *addr) +{ + *(volatile uint8_t *) addr = b; +} + +static inline void writew(uint16_t b, volatile void *addr) +{ + *(volatile uint16_t *) addr = b; +} + +static inline void writel(uint32_t b, volatile void *addr) +{ + *(volatile uint32_t *) addr = b; +} + +static inline uint8_t readb(const volatile void *addr) +{ + return *(volatile uint8_t *) addr; +} + +static inline uint16_t readw(const volatile void *addr) +{ + return *(volatile uint16_t *) addr; +} + +static inline uint32_t readl(const volatile void *addr) +{ + return *(volatile uint32_t *) addr; +} + #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) struct flashchip { Modified: trunk/util/flashrom/jedec.c =================================================================== --- trunk/util/flashrom/jedec.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/jedec.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -40,10 +40,10 @@ unsigned int i = 0; uint8_t tmp1, tmp2; - tmp1 = *dst & 0x40; + tmp1 = readb(dst) & 0x40; while (i++ < 0xFFFFFFF) { - tmp2 = *dst & 0x40; + tmp2 = readb(dst) & 0x40; if (tmp1 == tmp2) { break; } @@ -59,7 +59,7 @@ data &= 0x80; while (i++ < 0xFFFFFFF) { - tmp = *dst & 0x80; + tmp = readb(dst) & 0x80; if (tmp == data) { break; } @@ -68,21 +68,21 @@ void unprotect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x20; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x20, bios + 0x5555); usleep(200); } void protect_jedec(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -94,40 +94,40 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ myusec_delay(10000); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); @@ -143,18 +143,18 @@ int erase_sector_jedec(volatile uint8_t *bios, unsigned int page) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + page) = 0x30; + writeb(0x30, bios + page); myusec_delay(10); /* wait for Toggle bit ready */ @@ -166,18 +166,18 @@ int erase_block_jedec(volatile uint8_t *bios, unsigned int block) { /* Issue the Sector Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + block) = 0x50; + writeb(0x50, bios + block); myusec_delay(10); /* wait for Toggle bit ready */ @@ -191,18 +191,18 @@ volatile uint8_t *bios = flash->virtual_memory; /* Issue the JEDEC Chip Erase command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x10; + writeb(0x10, bios + 0x5555); myusec_delay(10); toggle_ready_jedec(bios); @@ -219,15 +219,15 @@ retry: /* Issue JEDEC Data Unprotect comand */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ for (i = start_index; i < page_size; i++) { /* If the data is 0xFF, don't program it */ if (*src != 0xFF) - *dst = *src; + writeb(*src, dst); dst++; src++; } @@ -238,7 +238,7 @@ src = s; ok = 1; for (i = 0; i < page_size; i++) { - if (*dst != *src) { + if (readb(dst) != *src) { ok = 0; break; } @@ -269,15 +269,15 @@ retry: /* Issue JEDEC Byte Program command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); toggle_ready_jedec(bios); - if (*dst != *src && tried++ < MAX_REFLASH_TRIES) { + if (readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) { goto retry; } Modified: trunk/util/flashrom/m29f002.c =================================================================== --- trunk/util/flashrom/m29f002.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/m29f002.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -22,12 +22,12 @@ int erase_m29f002(struct flashchip *flash) { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x10; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x10, bios + 0x555); myusec_delay(10); toggle_ready_jedec(bios); return 0; @@ -35,21 +35,21 @@ static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) { /* erase */ - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0x80; - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *dst = 0x30; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x80, bios + 0x555); + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); /* program */ while (size--) { - *(volatile uint8_t *)(bios + 0x555) = 0xaa; - *(volatile uint8_t *)(bios + 0xaaa) = 0x55; - *(volatile uint8_t *)(bios + 0x555) = 0xa0; - *dst = *src; + writeb(0xaa, bios + 0x555); + writeb(0x55, bios + 0xaaa); + writeb(0xa0, bios + 0x555); + writeb(*src, dst); toggle_ready_jedec(dst); dst++; src++; Modified: trunk/util/flashrom/m29f400bt.c =================================================================== --- trunk/util/flashrom/m29f400bt.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/m29f400bt.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -22,9 +22,9 @@ void protect_m29f400bt(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); usleep(200); } @@ -35,18 +35,18 @@ int i; for (i = 0; i < page_size; i++) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xA0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xA0, bios + 0xAAA); /* transfer data from source to destination */ - *dst = *src; + writeb(*src, dst); //*(volatile char *) (bios) = 0xF0; //usleep(5); toggle_ready_jedec(dst); printf ("Value in the flash at address %p = %#x, want %#x\n", - (uint8_t *) (dst - bios), *dst, *src); + (uint8_t *) (dst - bios), readb(dst), *src); dst++; src++; } @@ -57,21 +57,21 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x90; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x90, bios + 0xAAA); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in * flash.h does not match. It should be possible to use JEDEC probe. */ - id2 = *(volatile uint8_t *)(bios + 0x02); + id2 = readb(bios + 0x02); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0xF0; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0xF0, bios + 0xAAA); myusec_delay(10); @@ -87,13 +87,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x10; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x10, bios + 0xAAA); myusec_delay(10); toggle_ready_jedec(bios); @@ -104,14 +104,14 @@ int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst) { - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; - *(volatile uint8_t *)(bios + 0xAAA) = 0x80; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); + writeb(0x80, bios + 0xAAA); - *(volatile uint8_t *)(bios + 0xAAA) = 0xAA; - *(volatile uint8_t *)(bios + 0x555) = 0x55; + writeb(0xAA, bios + 0xAAA); + writeb(0x55, bios + 0x555); //*(volatile uint8_t *) (bios + 0xAAA) = 0x10; - *dst = 0x30; + writeb(0x30, dst); myusec_delay(10); toggle_ready_jedec(bios); Modified: trunk/util/flashrom/mx29f002.c =================================================================== --- trunk/util/flashrom/mx29f002.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/mx29f002.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -27,14 +27,14 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); @@ -49,13 +49,13 @@ { volatile uint8_t *bios = flash->virtual_memory; - *(bios + 0x555) = 0xF0; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x80; - *(bios + 0x555) = 0xAA; - *(bios + 0x2AA) = 0x55; - *(bios + 0x555) = 0x10; + writeb(0xF0, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x80, bios + 0x555); + writeb(0xAA, bios + 0x555); + writeb(0x55, bios + 0x2AA); + writeb(0x10, bios + 0x555); myusec_delay(100); toggle_ready_jedec(bios); @@ -65,12 +65,12 @@ #if 0 toggle_ready_jedec(bios); - *(bios + 0x0ffff) = 0x30; - *(bios + 0x1ffff) = 0x30; - *(bios + 0x2ffff) = 0x30; - *(bios + 0x37fff) = 0x30; - *(bios + 0x39fff) = 0x30; - *(bios + 0x3bfff) = 0x30; + writeb(0x30, bios + 0x0ffff); + writeb(0x30, bios + 0x1ffff); + writeb(0x30, bios + 0x2ffff); + writeb(0x30, bios + 0x37fff); + writeb(0x30, bios + 0x39fff); + writeb(0x30, bios + 0x3bfff); #endif return 0; @@ -83,7 +83,7 @@ volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *dst = bios; - *bios = 0xF0; + writeb(0xF0, bios); myusec_delay(10); erase_29f002(flash); //*bios = 0xF0; @@ -93,10 +93,10 @@ /* write to the sector */ if ((i & 0xfff) == 0) printf("address: 0x%08lx", (unsigned long)i); - *(bios + 0x5555) = 0xAA; - *(bios + 0x2AAA) = 0x55; - *(bios + 0x5555) = 0xA0; - *dst++ = *buf++; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); + writeb(*buf++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(dst); Modified: trunk/util/flashrom/pm49fl00x.c =================================================================== --- trunk/util/flashrom/pm49fl00x.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/pm49fl00x.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -35,7 +35,7 @@ if (block_size == 16384 && i % 2) continue; - *(bios + (i * block_size) + 2) = bits; + writeb(bits, bios + (i * block_size) + 2); } } Modified: trunk/util/flashrom/sharplhf00l04.c =================================================================== --- trunk/util/flashrom/sharplhf00l04.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/sharplhf00l04.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -41,23 +41,23 @@ #if 0 /* Enter ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); #endif - *bios = 0xff; + writeb(0xff, bios); myusec_delay(10); - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Leave ID mode */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); @@ -76,25 +76,25 @@ uint8_t status; uint8_t id1, id2; - *bios = 0x70; - if ((*bios & 0x80) == 0) { // it's busy - while ((*bios & 0x80) == 0) ; + writeb(0x70, bios); + if ((readb(bios) & 0x80) == 0) { // it's busy + while ((readb(bios) & 0x80) == 0) ; } - status = *bios; + status = readb(bios); // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); return status; } @@ -106,19 +106,19 @@ uint8_t status; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf("Erase at %p\n", bios); status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); // clear write protect printf("write protect is at %p\n", (wrprotect)); - printf("write protect is 0x%x\n", *(wrprotect)); - *(wrprotect) = 0; - printf("write protect is 0x%x\n", *(wrprotect)); + printf("write protect is 0x%x\n", readb(wrprotect)); + writeb(0, wrprotect); + printf("write protect is 0x%x\n", readb(wrprotect)); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); @@ -149,8 +149,8 @@ for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_lhf00l04(bios); } } @@ -163,7 +163,7 @@ volatile uint8_t *bios = flash->virtual_memory; erase_lhf00l04(flash); - if (*bios != 0xff) { + if (readb(bios) != 0xff) { printf("ERASE FAILED!\n"); return -1; } Modified: trunk/util/flashrom/sst28sf040.c =================================================================== --- trunk/util/flashrom/sst28sf040.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/sst28sf040.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -35,13 +35,13 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x040A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x040A); } static __inline__ void unprotect_28sf040(volatile uint8_t *bios) @@ -49,20 +49,20 @@ /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = *(volatile uint8_t *)(bios + 0x1823); - tmp = *(volatile uint8_t *)(bios + 0x1820); - tmp = *(volatile uint8_t *)(bios + 0x1822); - tmp = *(volatile uint8_t *)(bios + 0x0418); - tmp = *(volatile uint8_t *)(bios + 0x041B); - tmp = *(volatile uint8_t *)(bios + 0x0419); - tmp = *(volatile uint8_t *)(bios + 0x041A); + tmp = readb(bios + 0x1823); + tmp = readb(bios + 0x1820); + tmp = readb(bios + 0x1822); + tmp = readb(bios + 0x0418); + tmp = readb(bios + 0x041B); + tmp = readb(bios + 0x0419); + tmp = readb(bios + 0x041A); } static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, unsigned long address) { - *bios = AUTO_PG_ERASE1; - *(bios + address) = AUTO_PG_ERASE2; + writeb(AUTO_PG_ERASE1, bios); + writeb(AUTO_PG_ERASE2, bios + address); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -85,8 +85,8 @@ continue; } /*issue AUTO PROGRAM command */ - *dst = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, dst); + writeb(*src++, dst++); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -100,16 +100,16 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); - *bios = READ_ID; + writeb(READ_ID, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); myusec_delay(10); - id2 = *(volatile uint8_t *)(bios + 0x01); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -124,8 +124,8 @@ volatile uint8_t *bios = flash->virtual_memory; unprotect_28sf040(bios); - *bios = CHIP_ERASE; - *bios = CHIP_ERASE; + writeb(CHIP_ERASE, bios); + writeb(CHIP_ERASE, bios); protect_28sf040(bios); myusec_delay(10); Modified: trunk/util/flashrom/sst49lfxxxc.c =================================================================== --- trunk/util/flashrom/sst49lfxxxc.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/sst49lfxxxc.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -50,20 +50,20 @@ //printf("bios=0x%08lx\n", (unsigned long)bios); for (i = 0; left > 65536; i++, left -= 65536) { //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) ); - *(bios + (i * 65536) + 2) = bits; + writeb(bits, bios + (i * 65536) + 2); } address = i * 65536; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 32768; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); address += 8192; //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); - *(bios + address + 2) = bits; + writeb(bits, bios + address + 2); return 0; } @@ -73,14 +73,14 @@ { unsigned char status; - *bios = SECTOR_ERASE; - *(bios + address) = ERASE; + writeb(SECTOR_ERASE, bios); + writeb(ERASE, bios + address); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -96,7 +96,7 @@ int i; unsigned char status; - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); for (i = 0; i < page_size; i++) { /* transfer data from source to destination */ if (*src == 0xFF) { @@ -105,14 +105,14 @@ continue; } /*issue AUTO PROGRAM command */ - *bios = AUTO_PGRM; - *dst++ = *src++; + writeb(AUTO_PGRM, bios); + writeb(*src++, dst++); do { - status = *bios; + status = readb(bios); if (status & (STATUS_ESS | STATUS_BPS)) { printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status); - *bios = CLEAR_STATUS; + writeb(CLEAR_STATUS, bios); return (-1); } } while (!(status & STATUS_WSMS)); @@ -127,13 +127,13 @@ uint8_t id1, id2; - *bios = RESET; + writeb(RESET, bios); - *bios = READ_ID; - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + writeb(READ_ID, bios); + id1 = readb(bios); + id2 = readb(bios + 0x01); - *bios = RESET; + writeb(RESET, bios); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -157,7 +157,7 @@ if (erase_sector_49lfxxxc(bios, i) != 0) return (-1); - *bios = RESET; + writeb(RESET, bios); return 0; } @@ -183,7 +183,7 @@ } printf("\n"); - *bios = RESET; + writeb(RESET, bios); return 0; } Modified: trunk/util/flashrom/sst_fwhub.c =================================================================== --- trunk/util/flashrom/sst_fwhub.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/sst_fwhub.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -51,7 +51,7 @@ volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; // clear write protect - *(wrprotect) = 0; + writeb(0, wrprotect); erase_block_jedec(flash->virtual_memory, offset); toggle_ready_jedec(flash->virtual_memory); Modified: trunk/util/flashrom/stm50flw0x0x.c =================================================================== --- trunk/util/flashrom/stm50flw0x0x.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/stm50flw0x0x.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -33,9 +33,9 @@ void protect_stm50flw0x0x(volatile uint8_t *bios) { - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xA0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xA0, bios + 0x5555); usleep(200); } @@ -47,37 +47,37 @@ uint32_t largeid1, largeid2; /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(40); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); largeid1 = id1; largeid2 = id2; /* Check if it is a continuation ID, this should be a while loop. */ if (id1 == 0x7F) { largeid1 <<= 8; - id1 = *(volatile uint8_t *)(bios + 0x100); + id1 = readb(bios + 0x100); largeid1 |= id1; } if (id2 == 0x7F) { largeid2 <<= 8; - id2 = *(volatile uint8_t *)(bios + 0x101); + id2 = readb(bios + 0x101); largeid2 |= id2; } /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, @@ -96,21 +96,21 @@ uint8_t id1; // id2; - *bios = 0x70; - if ((*bios & 0x80) == 0) { // it's busy - while ((*bios & 0x80) == 0) ; + writeb(0x70, bios); + if ((readb(bios) & 0x80) == 0) { // it's busy + while ((readb(bios) & 0x80) == 0) ; } // put another command to get out of status register mode - *bios = 0x90; + writeb(0x90, bios); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; + id1 = readb(bios); // this is needed to jam it out of "read id" mode - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); } /* @@ -142,8 +142,8 @@ // unlock each 4k-sector for (j = 0; j < 0x10000; j += 0x1000) { printf_debug("unlocking at 0x%x\n", offset + j); - *(flash_addr + offset + j) = unlock_sector; - if (*(flash_addr + offset + j) != unlock_sector) { + writeb(unlock_sector, flash_addr + offset + j); + if (readb(flash_addr + offset + j) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset + j); return -1; @@ -151,8 +151,8 @@ } } else { printf_debug("unlocking at 0x%x\n", offset); - *(flash_addr + offset) = unlock_sector; - if (*(flash_addr + offset) != unlock_sector) { + writeb(unlock_sector, flash_addr + offset); + if (readb(flash_addr + offset) != unlock_sector) { printf("Cannot unlock sector @ 0x%x\n", offset); return -1; } @@ -167,17 +167,17 @@ int j; // clear status register - *bios = 0x50; + writeb(0x50, bios); printf_debug("Erase at %p\n", bios); // now start it - *(volatile uint8_t *)(bios) = 0x20; - *(volatile uint8_t *)(bios) = 0xd0; + writeb(0x20, bios); + writeb(0xd0, bios); myusec_delay(10); wait_stm50flw0x0x(flash->virtual_memory); for (j = 0; j < flash->page_size; j++) { - if (*(bios + j) != 0xFF) { + if (readb(bios + j) != 0xFF) { printf("Erase failed at 0x%x\n", offset + j); return -1; } @@ -197,8 +197,8 @@ /* transfer data from source to destination */ for (i = 0; i < page_size; i++) { - *dst = 0x40; - *dst++ = *src++; + writeb(0x40, dst); + writeb(*src++, dst++); wait_stm50flw0x0x(bios); } @@ -210,7 +210,7 @@ dst = d; src = s; for (i = 0; i < page_size; i++) { - if (*dst != *src) { + if (readb(dst) != *src) { rc = -1; break; } Modified: trunk/util/flashrom/w29ee011.c =================================================================== --- trunk/util/flashrom/w29ee011.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/w29ee011.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -37,29 +37,29 @@ } /* Issue JEDEC Product ID Entry command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0x80, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x60; + writeb(0x60, bios + 0x5555); myusec_delay(10); /* Read product ID */ - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 0x01); + id1 = readb(bios); + id2 = readb(bios + 0x01); /* Issue JEDEC Product ID Exit command */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Modified: trunk/util/flashrom/w39v040c.c =================================================================== --- trunk/util/flashrom/w39v040c.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/w39v040c.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -26,22 +26,22 @@ volatile uint8_t *bios = flash->virtual_memory; uint8_t id1, id2, lock; - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0x90, bios + 0x5555); myusec_delay(10); - id1 = *(volatile uint8_t *)bios; - id2 = *(volatile uint8_t *)(bios + 1); - lock = *(volatile uint8_t *)(bios + 0xfff2); + id1 = readb(bios); + id2 = readb(bios + 1); + lock = readb(bios + 0xfff2); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; + writeb(0xAA, bios + 0x5555); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; + writeb(0x55, bios + 0x2AAA); myusec_delay(10); - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xF0, bios + 0x5555); myusec_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); Modified: trunk/util/flashrom/w39v080fa.c =================================================================== --- trunk/util/flashrom/w39v080fa.c 2009-03-04 01:06:41 UTC (rev 3970) +++ trunk/util/flashrom/w39v080fa.c 2009-03-05 19:24:22 UTC (rev 3971) @@ -27,19 +27,19 @@ uint8_t vid, did; /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read product ID */ - vid = *(volatile uint8_t *)bios; - did = *(volatile uint8_t *)(bios + 0x01); + vid = readb(bios); + did = readb(bios + 0x01); /* Product Identifixation Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did); @@ -58,16 +58,16 @@ uint8_t locking; printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, - *wrprotect); + readb(wrprotect)); - locking = *wrprotect; + locking = readb(wrprotect); switch (locking & 0x7) { case 0: printf_debug("Full Access.\n"); return 0; case 1: printf_debug("Write Lock (Default State).\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 2: printf_debug("Locked Open (Full Access, Lock Down).\n"); @@ -77,11 +77,11 @@ return -1; case 4: printf_debug("Read Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 5: printf_debug("Read/Write Lock.\n"); - *wrprotect = 0; + writeb(0, wrprotect); return 0; case 6: fprintf(stderr, "Error: Read Lock, Locked Down.\n"); @@ -106,18 +106,18 @@ */ /* Product Identification Entry */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x90; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x90, bios + 0x5555); myusec_delay(10); /* Read Hardware Lock Bits */ - locking = *(volatile uint8_t *)(bios + 0xffff2); + locking = readb(bios + 0xffff2); /* Product Identification Exit */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0xF0; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0xF0, bios + 0x5555); myusec_delay(10); printf_debug("Lockout bits:\n"); @@ -151,13 +151,13 @@ printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); /* Sector Erase */ - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + 0x5555) = 0x80; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x80, bios + 0x5555); - *(volatile uint8_t *)(bios + 0x5555) = 0xAA; - *(volatile uint8_t *)(bios + 0x2AAA) = 0x55; - *(volatile uint8_t *)(bios + sector) = 0x30; + writeb(0xAA, bios + 0x5555); + writeb(0x55, bios + 0x2AAA); + writeb(0x30, bios + sector); /* wait for Toggle bit ready */ toggle_ready_jedec(bios);

1 0

Coreboot patches for v2 with SeaBIOS
by Myles Watson 05 Mar '09

05 Mar '09

Does anyone have an updated HOWTO for booting XP with SeaBIOS? I'm specifically wondering if there's an option we should add to v2 which relocates BIOS tables so that SeaBIOS doesn't overwrite them, or if we should add that to buildrom. Thanks, Myles

6 35

pci_read_config8 crash in mainboard.c
by Carl-Daniel Hailfinger 05 Mar '09

05 Mar '09

Hi, Using pci_read_config8() inside mainboard.c causes a crash on the AMD DBM690T and Pistachio targets. AMD developers are seeing the crash as well and use pci_cf8_conf1.read8() instead which works fine. Since I won't have access to my Asus M2A-VM board in the next two weeks, I'd appreciate if someone could test the patch below on a M2A-VM. I expect it to hang somewhere along these messages: [...] enable_onboard_nic. enable_onboard_nic done. get_ide_dma66. get_ide_dma66 dev_find_slot(0:14.0) returned .... If you can't recover from a non-booting image, DO NOT USE! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: src/southbridge/amd/rs690/rs690.c =================================================================== --- src/southbridge/amd/rs690/rs690.c (Revision 3967) +++ src/southbridge/amd/rs690/rs690.c (Arbeitskopie) @@ -129,7 +129,7 @@ device_t nb_dev = 0, sb_dev = 0; int dev_ind; - printk_info("rs690_enable: dev=0x%x, VID_DID=0x%x\n", dev, get_vid_did(dev)); + printk_info("rs690_enable: dev=%p, VID_DID=0x%x\n", dev, get_vid_did(dev)); nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); if (!nb_dev) { Index: src/southbridge/amd/rs690/rs690_pcie.c =================================================================== --- src/southbridge/amd/rs690/rs690_pcie.c (Revision 3967) +++ src/southbridge/amd/rs690/rs690_pcie.c (Arbeitskopie) @@ -203,7 +203,7 @@ device_t sb_dev; struct southbridge_amd_rs690_config *cfg = (struct southbridge_amd_rs690_config *)nb_dev->chip_info; - printk_debug("gpp_sb_init nb_dev=0x%x, dev=0x%x, port=0x%x\n", nb_dev, dev, port); + printk_debug("gpp_sb_init nb_dev=0x%p, dev=0x%p, port=0x%x\n", nb_dev, dev, port); /* init GPP core */ set_pcie_enable_bits(nb_dev, 0x20 | PCIE_CORE_INDEX_GPPSB, 1 << 8, Index: src/southbridge/amd/rs690/rs690_gfx.c =================================================================== --- src/southbridge/amd/rs690/rs690_gfx.c (Revision 3967) +++ src/southbridge/amd/rs690/rs690_gfx.c (Arbeitskopie) @@ -121,7 +121,7 @@ device_t k8_f0 = 0, k8_f2 = 0; device_t nb_dev = dev_find_slot(0, 0); - printk_info("rs690_internal_gfx_enable dev=0x%x, nb_dev=0x%x.\n", dev, + printk_info("rs690_internal_gfx_enable dev=0x%p, nb_dev=0x%p.\n", dev, nb_dev); /* set APERTURE_SIZE, 128M. */ @@ -417,7 +417,7 @@ struct southbridge_amd_rs690_config *cfg = (struct southbridge_amd_rs690_config *)nb_dev->chip_info; - printk_info("rs690_gfx_init, nb_dev=0x%x, dev=0x%x, port=0x%x.\n", + printk_info("rs690_gfx_init, nb_dev=0x%p, dev=0x%p, port=0x%x.\n", nb_dev, dev, port); /* step 0, REFCLK_SEL, skip A11 revision */ Index: src/southbridge/amd/sb600/sb600_sata.c =================================================================== --- src/southbridge/amd/sb600/sb600_sata.c (Revision 3967) +++ src/southbridge/amd/sb600/sb600_sata.c (Arbeitskopie) @@ -96,7 +96,7 @@ printk_spew("sata_bar2=%x\n", sata_bar2); /* 3040 */ printk_spew("sata_bar3=%x\n", sata_bar3); /* 3080 */ printk_spew("sata_bar4=%x\n", sata_bar4); /* 3000 */ - printk_spew("sata_bar5=%x\n", sata_bar5); /* e0309000 */ + printk_spew("sata_bar5=%p\n", sata_bar5); /* e0309000 */ /* Program the 2C to 0x43801002 */ dword = 0x43801002; Index: src/southbridge/amd/sb600/sb600_usb.c =================================================================== --- src/southbridge/amd/sb600/sb600_usb.c (Revision 3967) +++ src/southbridge/amd/sb600/sb600_usb.c (Arbeitskopie) @@ -94,7 +94,7 @@ /* pci_write_config32(dev, 0xf8, dword); */ usb2_bar0 = (u8 *) (pci_read_config32(dev, 0x10) & ~0xFF); - printk_info("usb2_bar0=%x\n", usb2_bar0); + printk_info("usb2_bar0=%p\n", usb2_bar0); /* RPR5.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */ dword = 0x00020F00; Index: src/southbridge/amd/sb600/sb600_hda.c =================================================================== --- src/southbridge/amd/sb600/sb600_hda.c (Revision 3967) +++ src/southbridge/amd/sb600/sb600_hda.c (Arbeitskopie) @@ -302,7 +302,7 @@ return; base = (u8 *) ((u32)res->base); - printk_debug("base = %08x\n", base); + printk_debug("base = %p\n", base); codec_mask = codec_detect(base); if (codec_mask) { Index: src/devices/device.c =================================================================== --- src/devices/device.c (Revision 3967) +++ src/devices/device.c (Arbeitskopie) @@ -358,7 +358,7 @@ base += size; printk_spew( - "%s %02x * [0x%08Lx - 0x%08Lx] %s\n", + "%s %02lx * [0x%08Lx - 0x%08Lx] %s\n", dev_path(dev), resource->index, resource->base, Index: src/devices/pci_ops.c =================================================================== --- src/devices/pci_ops.c (Revision 3967) +++ src/devices/pci_ops.c (Arbeitskopie) @@ -24,7 +24,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> -static struct bus *get_pbus(device_t dev) +struct bus *get_pbus(device_t dev) { struct bus *pbus = dev->bus; while(pbus && pbus->dev && !ops_pci_bus(pbus)) { Index: src/include/device/pci.h =================================================================== --- src/include/device/pci.h (Revision 3967) +++ src/include/device/pci.h (Arbeitskopie) @@ -99,5 +99,6 @@ } return bops; } +struct bus *get_pbus(device_t dev); #endif /* PCI_H */ Index: src/cpu/x86/mtrr/mtrr.c =================================================================== --- src/cpu/x86/mtrr/mtrr.c (Revision 3967) +++ src/cpu/x86/mtrr/mtrr.c (Arbeitskopie) @@ -357,7 +357,7 @@ #endif } /* Allocate an msr */ - printk_spew(" Allocate an msr - basek = %08x, sizek = %08x,\n", basek, sizek); + printk_spew(" Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek); state->range_startk = basek; state->range_sizek = sizek; } Index: src/cpu/x86/lapic/lapic_cpu_init.c =================================================================== --- src/cpu/x86/lapic/lapic_cpu_init.c (Revision 3967) +++ src/cpu/x86/lapic/lapic_cpu_init.c (Arbeitskopie) @@ -136,7 +136,7 @@ maxlvt = 4; for (j = 1; j <= num_starts; j++) { - printk_spew("Sending STARTUP #%d to %u.\n", j, apicid); + printk_spew("Sending STARTUP #%d to %lu.\n", j, apicid); lapic_read_around(LAPIC_SPIV); lapic_write(LAPIC_ESR, 0); lapic_read(LAPIC_ESR); @@ -239,7 +239,7 @@ #warning "We may need to increase CONFIG_LB_MEM_TOPK, it need to be more than (0x100000+(20480 + STACK_SIZE)*CONFIG_MAX_CPU)\n" #endif if(stack_end > (CONFIG_LB_MEM_TOPK<<10)) { - printk_debug("start_cpu: Please increase the CONFIG_LB_MEM_TOPK more than %dK\n", stack_end>>10); + printk_debug("start_cpu: Please increase the CONFIG_LB_MEM_TOPK more than %luK\n", stack_end>>10); die("Can not go on\n"); } stack_end -= sizeof(struct cpu_info); Index: src/mainboard/amd/pistachio/resourcemap.c =================================================================== --- src/mainboard/amd/pistachio/resourcemap.c (Revision 3967) +++ src/mainboard/amd/pistachio/resourcemap.c (Arbeitskopie) @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -static void setup_pistachio_resource_map(void) +static void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ Index: src/mainboard/amd/pistachio/chip.h =================================================================== --- src/mainboard/amd/pistachio/chip.h (Revision 3967) +++ src/mainboard/amd/pistachio/chip.h (Arbeitskopie) @@ -21,6 +21,6 @@ struct mainboard_config { - unsigned long uma_size; /* How many UMA should be used in memory for TOP. */ + u32 uma_size; /* How many UMA should be used in memory for TOP. */ }; Index: src/mainboard/amd/pistachio/acpi/dsdt.asl =================================================================== --- src/mainboard/amd/pistachio/acpi/dsdt.asl (Revision 3967) +++ src/mainboard/amd/pistachio/acpi/dsdt.asl (Arbeitskopie) @@ -21,7 +21,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ "AMD ", /* OEMID */ "PISTACHI", /* TABLE ID */ 0x00010001 /* OEM Revision */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1129,6 +1128,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ Index: src/mainboard/amd/pistachio/mainboard.c =================================================================== --- src/mainboard/amd/pistachio/mainboard.c (Revision 3967) +++ src/mainboard/amd/pistachio/mainboard.c (Arbeitskopie) @@ -83,7 +83,6 @@ u16 word; u32 dword; device_t sm_dev; - struct bus pbus; /* set adt7475 */ ADT7475_write_byte(0x40, 0x04); @@ -116,11 +115,11 @@ /* remote 2 therm temp limit (95C) */ ADT7475_write_byte(0x6c, 0x9f); - /* PWM 1 minimum duty cycle (37%) */ + /* PWM 1 minimum duty cycle (37.6%) */ ADT7475_write_byte(0x64, 0x60); /* PWM 1 Maximum duty cycle (100%) */ ADT7475_write_byte(0x38, 0xff); - /* PWM 3 minimum duty cycle (37%) */ + /* PWM 3 minimum duty cycle (37.6%) */ ADT7475_write_byte(0x66, 0x60); /* PWM 3 Maximum Duty Cycle (100%) */ ADT7475_write_byte(0x3a, 0xff); @@ -167,28 +166,19 @@ /* GPM5 as GPIO not USB OC */ sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); - dword = - pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x64); + dword = pci_read_config32(sm_dev, 0x64); dword |= 1 << 19; - pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x64, dword); + pci_write_config32(sm_dev, 0x64, dword); /* Enable Client Management Index/Data registers */ - dword = - pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x78); + dword = pci_read_config32(sm_dev, 0x78); dword |= 1 << 11; /* Cms_enable */ - pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x78, dword); + pci_write_config32(sm_dev, 0x78, dword); /* MiscfuncEnable */ - byte = - pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x41); + byte = pci_read_config8(sm_dev, 0x41); byte |= (1 << 5); - pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x41, byte); + pci_write_config8(sm_dev, 0x41, byte); /* set GPM5 as input */ /* set index register 0C50h to 13h (miscellaneous control) */ @@ -228,12 +218,9 @@ pm2_iowrite(0x42, byte); /* set GPIO 64 to input */ - word = - pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x56); + word = pci_read_config16(sm_dev, 0x56); word |= 1 << 7; - pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x56, word); + pci_write_config16(sm_dev, 0x56, word); /* set GPIO 64 internal pull-up */ byte = pm2_ioread(0xf0); @@ -269,12 +256,12 @@ * enable the dedicated function in pistachio board. * This function called early than rs690_enable. *************************************************/ -void pistachio_enable(device_t dev) +void mb_enable(device_t dev) { struct mainboard_config *mainboard = (struct mainboard_config *)dev->chip_info; - printk_info("Mainboard Pistachio Enable. dev=0x%x\n", dev); + printk_info("Mainboard " MAINBOARD_PART_NUMBER " Enable. dev=0x%x\n", dev); #if (CONFIG_GFXUMA == 1) msr_t msr, msr2; @@ -339,6 +326,6 @@ * CONFIG_CHIP_NAME defined in Option.lb. */ struct chip_operations mainboard_ops = { - CHIP_NAME("AMD Pistachio Mainboard") - .enable_dev = pistachio_enable, + CHIP_NAME(MAINBOARD_VENDOR " " MAINBOARD_PART_NUMBER " Mainboard") + .enable_dev = mb_enable, }; Index: src/mainboard/amd/pistachio/cache_as_ram_auto.c =================================================================== --- src/mainboard/amd/pistachio/cache_as_ram_auto.c (Revision 3967) +++ src/mainboard/amd/pistachio/cache_as_ram_auto.c (Arbeitskopie) @@ -156,9 +156,8 @@ u32 bsp_apicid = 0; msr_t msr; struct cpuid_result cpuid1; - struct sys_info *sysinfo = - (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - - DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); if (bist == 0) { bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); @@ -178,7 +177,7 @@ report_bist_failure(bist); printk_debug("bsp_apicid=0x%x\n", bsp_apicid); - setup_pistachio_resource_map(); + setup_mb_resource_map(); setup_coherent_ht_domain(); Index: src/mainboard/amd/dbm690t/Config.lb =================================================================== --- src/mainboard/amd/dbm690t/Config.lb (Revision 3967) +++ src/mainboard/amd/dbm690t/Config.lb (Arbeitskopie) @@ -197,7 +197,7 @@ #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16 chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on - chip cpu/amd/socket_S1G1 + chip cpu/amd/socket_AM2 device apic 0 on end end end @@ -213,7 +213,7 @@ end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 - device pci 3.0 off end # PCIE P2P bridge 0x791b + #device pci 3.0 off end # PCIE P2P bridge 0x791b device pci 4.0 on end # PCIE P2P bridge 0x7914 device pci 5.0 on end # PCIE P2P bridge 0x7915 device pci 6.0 on end # PCIE P2P bridge 0x7916 @@ -257,9 +257,9 @@ device pci 14.3 on # LPC 0x438d chip superio/ite/it8712f device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 + #io 0x60 = 0x3f0 + #irq 0x70 = 6 + #drq 0x74 = 2 end device pnp 2e.1 on # Com1 io 0x60 = 0x3f8 Index: src/mainboard/amd/dbm690t/irq_tables.c =================================================================== --- src/mainboard/amd/dbm690t/irq_tables.c (Revision 3967) +++ src/mainboard/amd/dbm690t/irq_tables.c (Arbeitskopie) @@ -54,7 +54,7 @@ extern u8 bus_isa; extern u8 bus_rs690[8]; extern u8 bus_sb600[2]; -extern unsigned long sbdn_sb600; +extern u32 sbdn_sb600; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -73,7 +73,7 @@ addr &= ~15; /* This table must be betweeen 0xf0000 & 0x100000 */ - printk_info("Writing IRQ routing tables to 0x%x...", addr); + printk_info("Writing IRQ routing tables to 0x%lx...", addr); pirq = (void *)(addr); v = (u8 *) (addr); Index: src/mainboard/amd/dbm690t/resourcemap.c =================================================================== --- src/mainboard/amd/dbm690t/resourcemap.c (Revision 3967) +++ src/mainboard/amd/dbm690t/resourcemap.c (Arbeitskopie) @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -static void setup_dbm690t_resource_map(void) +static void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ Index: src/mainboard/amd/dbm690t/acpi_tables.c =================================================================== --- src/mainboard/amd/dbm690t/acpi_tables.c (Revision 3967) +++ src/mainboard/amd/dbm690t/acpi_tables.c (Arbeitskopie) @@ -254,7 +254,7 @@ memcpy((void *)dsdt, (void *)AmlCode, ((acpi_header_t *) AmlCode)->length); current += dsdt->length; - printk_debug("ACPI: * DSDT @ %08x Length %x\n", dsdt, dsdt->length); + printk_debug("ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length); /* FADT */ printk_debug("ACPI: * FADT\n"); fadt = (acpi_fadt_t *) current; Index: src/mainboard/amd/dbm690t/acpi/dsdt.asl =================================================================== --- src/mainboard/amd/dbm690t/acpi/dsdt.asl (Revision 3967) +++ src/mainboard/amd/dbm690t/acpi/dsdt.asl (Arbeitskopie) @@ -19,12 +19,12 @@ /* DefinitionBlock Statement */ DefinitionBlock ( - "DSDT.AML", /* Output filename */ - "DSDT", /* Signature */ - 0x01, /* DSDT Revision */ - "AMD ", /* OEMID */ - "DBM690T ", /* TABLE ID */ - 0x00010001 /* OEM Revision */ + "DSDT.AML", /* Output filename */ + "DSDT", /* Signature */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ + "AMD ", /* OEMID */ + "DBM690T ", /* TABLE ID */ + 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */ /* Include ("debug.asl") */ /* Include global debug methods if needed */ @@ -32,7 +32,6 @@ /* Data to be patched by the BIOS during POST */ /* FIXME the patching is not done yet! */ /* Memory related values */ - Name(TOM2, 0x0) /* Top of RAM memory above 4GB (>> 16) */ Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ @@ -1130,6 +1129,7 @@ /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) + External (TOM2) Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1476,7 +1476,7 @@ 0x0000, /* range minimum */ 0x0CF7, /* range maximum */ 0x0000, /* translation */ - 0x0CF8 /* Resource source index */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, @@ -1554,12 +1554,10 @@ /* Set size of memory from 1MB to TopMem */ Subtract(TOM1, 0x100000, DMLL) - /* - * If(LNotEqual(TOM2, 0x00000000)){ - * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 - * Subtract(TOM2, 0x100000000, DMHL) - * } - */ + If(LNotEqual(TOM2, 0x00000000)){ + Store(0x100000000,DMHB) /* DRAM from 4GB to TopMem2 */ + Subtract(TOM2, 0x100000000, DMHL) + } /* If there is no memory above 4GB, put the BIOS just below 4GB */ If(LEqual(TOM2, 0x00000000)){ Index: src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- src/mainboard/amd/dbm690t/mainboard.c (Revision 3967) +++ src/mainboard/amd/dbm690t/mainboard.c (Arbeitskopie) @@ -61,7 +61,7 @@ { u8 byte; - printk_info("enable_onboard_nic.\n"); + printk_info("%s.\n", __func__); /* set index register 0C50h to 13h (miscellaneous control) */ outb(0x13, 0xC50); /* CMIndex */ @@ -87,6 +87,7 @@ byte = inb(0xC52); byte &= ~0x8; outb(byte, 0xC52); + printk_info("%s done.\n", __func__); } /******************************************************** @@ -97,32 +98,36 @@ static void get_ide_dma66() { u8 byte; - /*u32 sm_dev, ide_dev; */ - device_t sm_dev, ide_dev; - struct bus pbus; + struct device *sm_dev; + struct device *ide_dev; + struct bus *pbus; + printk_info("%s.\n", __func__); sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + printk_info("%s dev_find_slot(0:14.0) returned sm_dev=%p, sm_dev->bus=%p.\n", __func__, sm_dev, sm_dev->bus); - byte = - pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0xA9); + printk_info("%s running get_pbus(sm_dev)\n", __func__); + pbus = get_pbus(sm_dev); + printk_info("%s pbus=%p, ops_pci_bus(pbus)=%p, &pci_cf8_conf1=%p.\n", __func__, pbus, ops_pci_bus(pbus), &pci_cf8_conf1); + if (ops_pci_bus(pbus) != &pci_cf8_conf1) + printk_info("%s ops_pci_bus(pbus) and &pci_cf8_conf1 do NOT match! Die?\n", __func__); + //byte = ops_pci_bus(pbus)->read8(pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0xA9); + //byte = pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0xA9); + byte = pci_read_config8(sm_dev, 0xA9); + printk_info("%s survived first pci_read_config8\n", __func__); byte |= (1 << 5); /* Set Gpio9 as input */ - pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0xA9, byte); + pci_write_config8(sm_dev, 0xA9, byte); + printk_info("%s survived first pci_write_config8\n", __func__); ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1)); - byte = - pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary, - ide_dev->path.pci.devfn, 0x56); + byte = pci_read_config8(ide_dev, 0x56); byte &= ~(7 << 0); - if ((1 << 5) & pci_cf8_conf1. - read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, - 0xAA)) + if ((1 << 5) & pci_read_config8(sm_dev, 0xAA)) byte |= 2 << 0; /* mode 2 */ else byte |= 5 << 0; /* mode 5 */ - pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary, - ide_dev->path.pci.devfn, 0x56, byte); + pci_write_config8(ide_dev, 0x56, byte); + printk_info("%s done.\n", __func__); } /* @@ -133,7 +138,6 @@ u8 byte; u16 word; device_t sm_dev; - struct bus pbus; /* set ADT 7461 */ ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */ @@ -156,12 +160,9 @@ /* set GPIO 64 to input */ sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); - word = - pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x56); + word = pci_read_config16(sm_dev, 0x56); word |= 1 << 7; - pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary, - sm_dev->path.pci.devfn, 0x56, word); + pci_write_config16(sm_dev, 0x56, word); /* set GPIO 64 internal pull-up */ byte = pm2_ioread(0xf0); @@ -197,12 +198,12 @@ * enable the dedicated function in dbm690t board. * This function called early than rs690_enable. *************************************************/ -void dbm690t_enable(device_t dev) +void mb_enable(device_t dev) { struct mainboard_config *mainboard = (struct mainboard_config *)dev->chip_info; - printk_info("Mainboard DBM690T Enable. dev=0x%x\n", dev); + printk_info("Mainboard " MAINBOARD_PART_NUMBER " Enable. dev=%p\n", dev); #if (CONFIG_GFXUMA == 1) msr_t msr, msr2; @@ -236,7 +237,7 @@ } uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk_info("%s: uma size 0x%08lx, memory start 0x%08lx\n", + printk_info("%s: uma size 0x%08llx, memory start 0x%08llx\n", __func__, uma_memory_size, uma_memory_base); /* TODO: TOP_MEM2 */ @@ -256,7 +257,7 @@ * in some circumstances we want the memory mentioned as reserved. */ #if (CONFIG_GFXUMA == 1) - printk_info("uma_memory_base=0x%lx, uma_memory_size=0x%lx \n", + printk_info("uma_memory_base=0x%llx, uma_memory_size=0x%llx \n", uma_memory_base, uma_memory_size); lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base, uma_memory_size); @@ -267,6 +268,6 @@ * CONFIG_CHIP_NAME defined in Option.lb. */ struct chip_operations mainboard_ops = { - CHIP_NAME("AMD DBM690T Mainboard") - .enable_dev = dbm690t_enable, + CHIP_NAME(MAINBOARD_VENDOR " " MAINBOARD_PART_NUMBER " Mainboard") + .enable_dev = mb_enable, }; Index: src/mainboard/amd/dbm690t/cache_as_ram_auto.c =================================================================== --- src/mainboard/amd/dbm690t/cache_as_ram_auto.c (Revision 3967) +++ src/mainboard/amd/dbm690t/cache_as_ram_auto.c (Arbeitskopie) @@ -32,6 +32,8 @@ #define DIMM0 0x50 #define DIMM1 0x51 +#define DIMM2 0x52 +#define DIMM3 0x53 #define ICS951462_ADDRESS 0x69 #define SMBUS_HUB 0x71 @@ -137,7 +139,7 @@ normal_image: post_code(0x23); __asm__ volatile ("jmp __normal_image": /* outputs */ - :"a" (bist), "b"(cpu_init_detectedx) /* inputs */); + :"a" (bist), "b"(cpu_init_detectedx)); /* inputs */ fallback_image: post_code(0x25); @@ -157,14 +159,14 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) { - static const u16 spd_addr[] = { DIMM0, 0, 0, 0, DIMM1, 0, 0, 0, }; + static const u16 spd_addr[] = { DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; int needs_reset = 0; u32 bsp_apicid = 0; msr_t msr; struct cpuid_result cpuid1; - struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); - if (bist == 0) { bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); } @@ -181,7 +183,7 @@ report_bist_failure(bist); printk_debug("bsp_apicid=0x%x\n", bsp_apicid); - setup_dbm690t_resource_map(); + setup_mb_resource_map(); setup_coherent_ht_domain(); Index: src/lib/malloc.c =================================================================== --- src/lib/malloc.c (Revision 3967) +++ src/lib/malloc.c (Arbeitskopie) @@ -27,7 +27,7 @@ { void *p; - MALLOCDBG(("%s Enter, size %d, free_mem_ptr %p\n", __func__, size, free_mem_ptr)); + MALLOCDBG(("%s Enter, size %ld, free_mem_ptr 0x%08lx\n", __func__, size, free_mem_ptr)); if (size < 0) die("Error! malloc: Size < 0"); if (free_mem_ptr <= 0) Index: src/northbridge/amd/amdk8/amdk8_acpi.c =================================================================== --- src/northbridge/amd/amdk8/amdk8_acpi.c (Revision 3967) +++ src/northbridge/amd/amdk8/amdk8_acpi.c (Arbeitskopie) @@ -128,7 +128,7 @@ basek = resk(res->base); sizek = resk(res->size); - printk_debug("set_srat_mem: dev %s, res->index=%04x startk=%08x, sizek=%08x\n", + printk_debug("set_srat_mem: dev %s, res->index=%04lx startk=%08lx, sizek=%08lx\n", dev_path(dev), res->index, basek, sizek); /* * 0-640K must be on node 0 Index: src/northbridge/amd/amdk8/raminit.c =================================================================== --- src/northbridge/amd/amdk8/raminit.c (Revision 3967) +++ src/northbridge/amd/amdk8/raminit.c (Arbeitskopie) @@ -1420,9 +1420,6 @@ die("min_cycle_time to low"); } print_spew(param->name); -#ifdef DRAM_MIN_CYCLE_TIME - print_debug(param->name); -#endif return param; } Index: src/northbridge/amd/amdk8/northbridge.c =================================================================== --- src/northbridge/amd/amdk8/northbridge.c (Revision 3967) +++ src/northbridge/amd/amdk8/northbridge.c (Arbeitskopie) @@ -473,7 +473,7 @@ limit |= (nodeid & 7); if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk_spew("%s, enabling legacy VGA IO forwarding for %s link %s\n", + printk_spew("%s, enabling legacy VGA IO forwarding for %s link 0x%x\n", __func__, dev_path(dev), link); base |= PCI_IO_BASE_VGA_EN; } Index: src/northbridge/amd/amdk8/raminit_f.c =================================================================== Index: src/arch/i386/include/arch/smp/mpspec.h =================================================================== --- src/arch/i386/include/arch/smp/mpspec.h (Revision 3967) +++ src/arch/i386/include/arch/smp/mpspec.h (Arbeitskopie) @@ -1,6 +1,8 @@ #ifndef __ASM_MPSPEC_H #define __ASM_MPSPEC_H +#include <device/device.h> + #if HAVE_MP_TABLE==1 /* Index: targets/amd/dbm690t/Config-abuild.lb =================================================================== --- targets/amd/dbm690t/Config-abuild.lb (Revision 3967) +++ targets/amd/dbm690t/Config-abuild.lb (Arbeitskopie) @@ -7,9 +7,12 @@ option CROSS_COMPILE="CROSS_PREFIX" option HOSTCC="CROSS_HOSTCC" +option DEFAULT_CONSOLE_LOGLEVEL = 9 +option MAXIMUM_CONSOLE_LOGLEVEL = 9 + __COMPRESSION__ -option ROM_SIZE=1024*1024 +option ROM_SIZE = 1024*1024 - 54784 romimage "normal" option USE_FALLBACK_IMAGE=0 option ROM_IMAGE_SIZE=0x20000 -- http://www.hailfinger.org/

3 14

Trace MMIO Read/Write
by Joseph Smith 05 Mar '09

05 Mar '09

Hello, Is there anyway to trace (capture) reads and writes to a mmio space in Linux? A utility program maybe? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

4 10

the seabios reboot in the post process
by wei yang 05 Mar '09

05 Mar '09

When I use the seabios as the payload, I got a strange issue. In the seabios flow: Post->timer_setup->rtc_updating->inb_cmos function when run the inb_cmos, it will reboot on the inb operation. inb_cmos disassemables to fllowing: out 0x70, value in value, 0x71. ----> run here to make the reboot happen. 0x70 is the CMOS index port, 0x71 is the CMOS data port. I suspect the "in value, 0x71" operation causes a exception and the seabios doesn't have real IDT, so it then make the reboot. but why it cause the exception is a question for me? since IO port 0x70 also reponsible for the NMI enble/disable, is it caused the error? any one has some comments? thanks _________________________________________________________________ News, entertainment and everything you care about at Live.com. Get it now! http://www.live.com/getstarted.aspx

3 3

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coreboot March 2009