coreboot March 2009

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r3967 - trunk/coreboot-v2/src/northbridge/amd/amdk8
by svn＠coreboot.org 01 Mar '09

01 Mar '09

Author: ruik Date: 2009-03-01 19:05:25 +0100 (Sun, 01 Mar 2009) New Revision: 3967 Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c Log: (Trivial) Add missing header file. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Rudolf Marek <r.marek(a)assembler.cz> Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c 2009-03-01 10:19:50 UTC (rev 3966) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c 2009-03-01 18:05:25 UTC (rev 3967) @@ -40,6 +40,7 @@ #include <console/console.h> #include <string.h> #include <arch/acpi.h> +#include <arch/acpigen.h> #include <device/pci.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h>

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r3966 - trunk/coreboot-v2/util
by svn＠coreboot.org 01 Mar '09

01 Mar '09

Author: stepan Date: 2009-03-01 11:19:50 +0100 (Sun, 01 Mar 2009) New Revision: 3966 Modified: trunk/coreboot-v2/util/ Log: oops, got to be careful with svn:externals: Adding back all the other externals. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Property changes on: trunk/coreboot-v2/util ___________________________________________________________________ Modified: svn:externals - x86emu svn://coreboot.org/repository/coreboot-v3/util/x86emu + flashrom svn://coreboot.org/repos/trunk/util/flashrom nvramtool svn://coreboot.org/repos/trunk/util/nvramtool superiotool svn://coreboot.org/repos/trunk/util/superiotool getpir svn://coreboot.org/repos/trunk/util/getpir mptable svn://coreboot.org/repos/trunk/util/mptable inteltool svn://coreboot.org/repos/trunk/util/inteltool x86emu svn://coreboot.org/repository/coreboot-v3/util/x86emu

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r3965 - in trunk/coreboot-v2: src/arch/i386/boot src/arch/i386/include src/arch/i386/include/arch src/config src/devices src/include src/include/cpu/x86 util
by svn＠coreboot.org 01 Mar '09

01 Mar '09

Author: stepan Date: 2009-03-01 11:16:01 +0100 (Sun, 01 Mar 2009) New Revision: 3965 Added: trunk/coreboot-v2/src/include/types.h Removed: trunk/coreboot-v2/src/devices/emulator/ Modified: trunk/coreboot-v2/src/arch/i386/boot/multiboot.c trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h trunk/coreboot-v2/src/arch/i386/include/stdint.h trunk/coreboot-v2/src/config/Options.lb trunk/coreboot-v2/src/devices/Config.lb trunk/coreboot-v2/src/include/cpu/x86/smm.h trunk/coreboot-v2/src/include/string.h trunk/coreboot-v2/util/ Log: Some changes required to get yabel working on v2 (and they generally make sense, too). Have one u64 instead of three. In order to use the old bios emulator, you have to do nothing. (Default, if CONFIG_PCI_ROM_RUN is enabled) In order to use yabel in your target, you need to add the following lines to your config: uses CONFIG_PCI_OPTION_ROM_RUN_YABEL default CONFIG_PCI_OPTION_ROM_RUN_YABEL=1 In order to use vm86 in your target, you need to add the following lines to your config: uses CONFIG_PCI_OPTION_ROM_RUN_VM86 default CONFIG_PCI_OPTION_ROM_RUN_VM86=1 Note: vm86 only works on platforms with _RAMBASE in the lower megabyte. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Joseph Smith <joe(a)settoplinux.org> Modified: trunk/coreboot-v2/src/arch/i386/boot/multiboot.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/multiboot.c 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/arch/i386/boot/multiboot.c 2009-03-01 10:16:01 UTC (rev 3965) @@ -23,8 +23,6 @@ #include <device/resource.h> #include <console/console.h> -typedef unsigned long long u64; - static struct multiboot_mmap_entry *mb_mem; struct multiboot_info *mbi; Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2009-03-01 10:16:01 UTC (rev 3965) @@ -18,7 +18,6 @@ #if HAVE_ACPI_TABLES==1 #include <stdint.h> -typedef unsigned long long u64; #define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */ #define RSDP_NAME "RSDP" Modified: trunk/coreboot-v2/src/arch/i386/include/stdint.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/stdint.h 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/arch/i386/include/stdint.h 2009-03-01 10:16:01 UTC (rev 3965) @@ -65,11 +65,13 @@ typedef unsigned long int uintmax_t; #endif -#undef __HAVE_LONG_LONG__ - typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; +#if __HAVE_LONG_LONG__ +typedef uint64_t u64; +#endif +#undef __HAVE_LONG_LONG__ #endif /* I386_STDINT_H */ Modified: trunk/coreboot-v2/src/config/Options.lb =================================================================== --- trunk/coreboot-v2/src/config/Options.lb 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/config/Options.lb 2009-03-01 10:16:01 UTC (rev 3965) @@ -168,6 +168,12 @@ comment "Use stage 1 initialization code" end +define COREBOOT_V2 + default 1 + export always + comment "This is used by code to determine v2 vs v3" +end + ############################################### # ROM image options ############################################### @@ -1068,6 +1074,18 @@ comment "Init x86 ROMs on all PCI devices" end +define CONFIG_PCI_OPTION_ROM_RUN_YABEL + default 0 + export used + comment "Use Yabel instead of old bios emulator" +end + +define CONFIG_PCI_OPTION_ROM_RUN_VM86 + default 0 + export used + comment "Use Yabel instead of old bios emulator" +end + define CONFIG_PCI_64BIT_PREF_MEM default 0 export always Modified: trunk/coreboot-v2/src/devices/Config.lb =================================================================== --- trunk/coreboot-v2/src/devices/Config.lb 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/devices/Config.lb 2009-03-01 10:16:01 UTC (rev 3965) @@ -1,5 +1,6 @@ uses CONFIG_PCI_ROM_RUN uses CONFIG_VGA_ROM_RUN + object device.o object root_device.o object device_util.o @@ -15,10 +16,10 @@ if CONFIG_PCI_ROM_RUN object pci_rom.o - dir emulator + dir ../../util/x86emu else if CONFIG_VGA_ROM_RUN object pci_rom.o - dir emulator + dir ../../util/x86emu end end Modified: trunk/coreboot-v2/src/include/cpu/x86/smm.h =================================================================== --- trunk/coreboot-v2/src/include/cpu/x86/smm.h 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/include/cpu/x86/smm.h 2009-03-01 10:16:01 UTC (rev 3965) @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,8 +18,6 @@ */ -typedef uint64_t u64; - /* AMD64 SMM State-Save Area * starts @ 0x7e00 */ Modified: trunk/coreboot-v2/src/include/string.h =================================================================== --- trunk/coreboot-v2/src/include/string.h 2009-02-28 20:10:20 UTC (rev 3964) +++ trunk/coreboot-v2/src/include/string.h 2009-03-01 10:16:01 UTC (rev 3965) @@ -81,6 +81,18 @@ return r; } +static inline int strncmp(const char *s1, const char *s2, int maxlen) +{ + int i; + + for (i = 0; i < maxlen; i++) { + if (s1[i] != s2[i]) + return s1[i] - s2[i]; + } + + return 0; +} + static inline int isspace(int c) { switch (c) { Added: trunk/coreboot-v2/src/include/types.h =================================================================== --- trunk/coreboot-v2/src/include/types.h (rev 0) +++ trunk/coreboot-v2/src/include/types.h 2009-03-01 10:16:01 UTC (rev 3965) @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __TYPES_H +#define __TYPES_H +#include <stdint.h> +#include <stddef.h> +#endif + Property changes on: trunk/coreboot-v2/util ___________________________________________________________________ Modified: svn:externals - flashrom svn://coreboot.org/repos/trunk/util/flashrom nvramtool svn://coreboot.org/repos/trunk/util/nvramtool superiotool svn://coreboot.org/repos/trunk/util/superiotool getpir svn://coreboot.org/repos/trunk/util/getpir mptable svn://coreboot.org/repos/trunk/util/mptable inteltool svn://coreboot.org/repos/trunk/util/inteltool + x86emu svn://coreboot.org/repository/coreboot-v3/util/x86emu

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r1141 - in coreboot-v3/util/x86emu: . pcbios x86emu yabel yabel/compat
by svn＠coreboot.org 01 Mar '09

01 Mar '09

Author: stepan Date: 2009-03-01 11:08:06 +0100 (Sun, 01 Mar 2009) New Revision: 1141 Added: coreboot-v3/util/x86emu/Config.lb coreboot-v3/util/x86emu/pcbios/Config.lb coreboot-v3/util/x86emu/x86emu/Config.lb coreboot-v3/util/x86emu/yabel/Config.lb coreboot-v3/util/x86emu/yabel/compat/Config.lb Modified: coreboot-v3/util/x86emu/biosemu.c coreboot-v3/util/x86emu/pcbios/pcibios.c coreboot-v3/util/x86emu/vm86.c coreboot-v3/util/x86emu/vm86_gdt.c coreboot-v3/util/x86emu/x86emu/sys.c coreboot-v3/util/x86emu/yabel/biosemu.c coreboot-v3/util/x86emu/yabel/compat/functions.c coreboot-v3/util/x86emu/yabel/debug.c coreboot-v3/util/x86emu/yabel/debug.h coreboot-v3/util/x86emu/yabel/device.c coreboot-v3/util/x86emu/yabel/device.h coreboot-v3/util/x86emu/yabel/interrupt.c coreboot-v3/util/x86emu/yabel/io.c coreboot-v3/util/x86emu/yabel/mem.c coreboot-v3/util/x86emu/yabel/pmm.c coreboot-v3/util/x86emu/yabel/vbe.c Log: This patch contains the necessary changes to util/x86emu of the v3 tree to use it in the v2 tree as well. Requires the yabel-prereq.diff patch in order to work in v2. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Joseph Smith <joe(a)settoplinux.org> Added: coreboot-v3/util/x86emu/Config.lb =================================================================== --- coreboot-v3/util/x86emu/Config.lb (rev 0) +++ coreboot-v3/util/x86emu/Config.lb 2009-03-01 10:08:06 UTC (rev 1141) @@ -0,0 +1,17 @@ +uses CONFIG_PCI_OPTION_ROM_RUN_YABEL +uses CONFIG_PCI_OPTION_ROM_RUN_VM86 + +if CONFIG_PCI_OPTION_ROM_RUN_YABEL + dir yabel + dir x86emu +else + if CONFIG_PCI_OPTION_ROM_RUN_VM86 + object vm86.o + object vm86_gdt.o + else + object biosemu.o + dir pcbios + dir x86emu + end +end + Modified: coreboot-v3/util/x86emu/biosemu.c =================================================================== --- coreboot-v3/util/x86emu/biosemu.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/biosemu.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -20,6 +20,7 @@ * This file is part of the coreboot project. * * (c) Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL + * Copyright (C) 2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,8 +36,13 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#if COREBOOT_V2 +#include <arch/io.h> +#include <console/console.h> +#else #include <io.h> #include <console.h> +#endif #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -96,9 +102,10 @@ u8 val; val = inb(port); - +#ifdef DEBUG if (port != 0x40) printk("inb(0x%04x) = 0x%02x\n", port, val); +#endif return val; } @@ -109,7 +116,9 @@ val = inw(port); +#ifdef DEBUG printk("inw(0x%04x) = 0x%04x\n", port, val); +#endif return val; } @@ -119,26 +128,34 @@ val = inl(port); +#ifdef DEBUG printk("inl(0x%04x) = 0x%08x\n", port, val); +#endif return val; } void x_outb(u16 port, u8 val) { +#ifdef DEBUG if (port != 0x43) printk("outb(0x%02x, 0x%04x)\n", val, port); +#endif outb(val, port); } void x_outw(u16 port, u16 val) { +#ifdef DEBUG printk("outw(0x%04x, 0x%04x)\n", val, port); +#endif outw(val, port); } void x_outl(u16 port, u32 val) { +#ifdef DEBUG printk("outl(0x%08x, 0x%04x)\n", val, port); +#endif outl(val, port); } @@ -324,6 +341,7 @@ unsigned short initialcs = (addr & 0xF0000) >> 4; unsigned short initialip = (addr + 3) & 0xFFFF; unsigned short devfn = dev->bus->secondary << 8 | dev->path.pci.devfn; + X86EMU_intrFuncs intFuncs[256]; X86EMU_setMemBase(0, 0x100000); Added: coreboot-v3/util/x86emu/pcbios/Config.lb =================================================================== --- coreboot-v3/util/x86emu/pcbios/Config.lb (rev 0) +++ coreboot-v3/util/x86emu/pcbios/Config.lb 2009-03-01 10:08:06 UTC (rev 1141) @@ -0,0 +1 @@ +object pcibios.o \ No newline at end of file Modified: coreboot-v3/util/x86emu/pcbios/pcibios.c =================================================================== --- coreboot-v3/util/x86emu/pcbios/pcibios.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/pcbios/pcibios.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -35,7 +35,11 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#if COREBOOT_V2 +#include <console/console.h> +#else #include <console.h> +#endif #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -61,7 +65,11 @@ break; case FIND_PCI_DEVICE: /* FixME: support SI != 0 */ +#if COREBOOT_V2 + dev = dev_find_device(X86_DX, X86_CX, dev); +#else dev = dev_find_pci_device(X86_DX, X86_CX, dev); +#endif if (dev != 0) { X86_BH = dev->bus->secondary; X86_BL = dev->path.pci.devfn; Modified: coreboot-v3/util/x86emu/vm86.c =================================================================== --- coreboot-v3/util/x86emu/vm86.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/vm86.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -4,7 +4,7 @@ * Copyright (C) 2000 Scyld Computing Corporation * Copyright (C) 2001 University of California. LA-CC Number 01-67. * Copyright (C) 2005 Nick.Barker9(a)btinternet.com - * Copyright (C) 2007 coresystems GmbH + * Copyright (C) 2007-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,9 +25,15 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <string.h> +#if COREBOOT_V2 +#include <console/console.h> +#include <arch/io.h> +#define printk(lvl, x...) printk_debug(x) +#else #include <console.h> -#include <string.h> #include <io.h> +#endif /* The address arguments to this function are PHYSICAL ADDRESSES */ static void real_mode_switch_call_vga(unsigned long devfn) @@ -539,7 +545,6 @@ *(unsigned char *) i = 0; } setup_realmode_idt(); - real_mode_switch_call_vga((dev->bus->secondary << 8) | dev->path.pci.devfn); } @@ -586,7 +591,11 @@ vendorid = *pedx; devindex = *pesi; dev = 0; +#if COREBOOT_V2 + while ((dev = dev_find_device(vendorid, devid, dev))) { +#else while ((dev = dev_find_pci_device(vendorid, devid, dev))) { +#endif if (devindex <= 0) break; devindex--; Modified: coreboot-v3/util/x86emu/vm86_gdt.c =================================================================== --- coreboot-v3/util/x86emu/vm86_gdt.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/vm86_gdt.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -33,7 +33,11 @@ " .globl gdtarg\n" "gdtarg: \n" " .word gdt_limit \n" +#if COREBOOT_V2 + " .long gdt \n" +#else " .long gdtptr \n" +#endif /* compute the table limit */ "__mygdt_limit = __mygdt_end - __mygdt - 1 \n" @@ -74,6 +78,7 @@ "__mygdt_end: \n" +#if !COREBOOT_V2 /* FIXME: This does probably not belong here */ " .globl idtarg\n" "idtarg:\n" @@ -83,6 +88,7 @@ "_idt:\n" " .fill 20, 8, 0\n" // # idt is unitiailzed "_idt_end:\n" +#endif /* Declare a pointer to where our idt is going to be i.e. at mem zero */ " .globl __myidt\n" Added: coreboot-v3/util/x86emu/x86emu/Config.lb =================================================================== --- coreboot-v3/util/x86emu/x86emu/Config.lb (rev 0) +++ coreboot-v3/util/x86emu/x86emu/Config.lb 2009-03-01 10:08:06 UTC (rev 1141) @@ -0,0 +1,7 @@ +object debug.o +object decode.o +object fpu.o +object ops.o +object ops2.o +object prim_ops.o +object sys.o Modified: coreboot-v3/util/x86emu/x86emu/sys.c =================================================================== --- coreboot-v3/util/x86emu/x86emu/sys.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/x86emu/sys.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -46,7 +46,11 @@ #include "debug.h" #include "prim_ops.h" #if 1 /* Coreboot needs to map prinkf to printk. */ +#if COREBOOT_V2 +#include "arch/io.h" +#else #include "io.h" +#endif #else #include <sys/io.h> #endif Added: coreboot-v3/util/x86emu/yabel/Config.lb =================================================================== --- coreboot-v3/util/x86emu/yabel/Config.lb (rev 0) +++ coreboot-v3/util/x86emu/yabel/Config.lb 2009-03-01 10:08:06 UTC (rev 1141) @@ -0,0 +1,9 @@ +object biosemu.o +object debug.o +object device.o +object interrupt.o +object io.o +object mem.o +object pmm.o +object vbe.o +dir compat Modified: coreboot-v3/util/x86emu/yabel/biosemu.c =================================================================== --- coreboot-v3/util/x86emu/yabel/biosemu.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/biosemu.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -13,13 +13,19 @@ #include <string.h> #include <types.h> +#if !COREBOOT_V2 #include <cpu.h> +#endif #include "debug.h" #include <x86emu/x86emu.h> #include <x86emu/regs.h> +#if COREBOOT_V2 +#include "../x86emu/prim_ops.h" +#else #include <x86emu/prim_ops.h> // for push_word +#endif #include "biosemu.h" #include "io.h" @@ -28,7 +34,11 @@ #include "device.h" #include "pmm.h" +#if COREBOOT_V2 +#include "compat/rtas.h" +#else #include <rtas.h> +#endif #include <device/device.h> Added: coreboot-v3/util/x86emu/yabel/compat/Config.lb =================================================================== --- coreboot-v3/util/x86emu/yabel/compat/Config.lb (rev 0) +++ coreboot-v3/util/x86emu/yabel/compat/Config.lb 2009-03-01 10:08:06 UTC (rev 1141) @@ -0,0 +1 @@ +object functions.o Modified: coreboot-v3/util/x86emu/yabel/compat/functions.c =================================================================== --- coreboot-v3/util/x86emu/yabel/compat/functions.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/compat/functions.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -14,8 +14,10 @@ */ #include <types.h> +#if !COREBOOT_V2 +#include <config.h> +#endif #include <device/device.h> -#include <config.h> #define VMEM_SIZE 1024 *1024 /* 1 MB */ Modified: coreboot-v3/util/x86emu/yabel/debug.c =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/debug.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -10,7 +10,9 @@ * IBM Corporation - initial implementation *****************************************************************************/ +#if !COREBOOT_V2 #include <cpu.h> +#endif #include "debug.h" Modified: coreboot-v3/util/x86emu/yabel/debug.h =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.h 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/debug.h 2009-03-01 10:08:06 UTC (rev 1141) @@ -19,7 +19,11 @@ extern void x86emu_dump_xregs(void); /* printf is not available in coreboot... use printk */ +#if COREBOOT_V2 +#include <console/console.h> +#else #include <console.h> +#endif /* uurgs... yuck... x86emu/x86emu.h is redefining printk... we include it here * and use its redefinition of printk * TODO: FIX!!!! */ Modified: coreboot-v3/util/x86emu/yabel/device.c =================================================================== --- coreboot-v3/util/x86emu/yabel/device.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/device.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -12,13 +12,17 @@ #include "device.h" +#if COREBOOT_V2 +#include "compat/rtas.h" +#else #include "rtas.h" +#endif #include <string.h> #include "debug.h" #include <device/device.h> +#include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci.h> #include <device/resource.h> /* the device we are working with... */ @@ -47,6 +51,10 @@ struct resource *r; u8 bus = bios_device.dev->bus->link; u16 devfn = bios_device.dev->path.pci.devfn; + + bios_device.bus = bus; + bios_device.devfn = devfn; + DEBUG_PRINTF("bus: %x, devfn: %x\n", bus, devfn); for (i = 0; i < bios_device.dev->resources; i++) { r = &bios_device.dev->resource[i]; @@ -388,7 +396,11 @@ { u8 rval = 0; //init bios_device struct +#if COREBOOT_V2 + DEBUG_PRINTF("%s\n", __func__); +#else DEBUG_PRINTF("%s(%s)\n", __func__, device->dtsname); +#endif memset(&bios_device, 0, sizeof(bios_device)); #ifndef CONFIG_PCI_OPTION_ROM_RUN_YABEL Modified: coreboot-v3/util/x86emu/yabel/device.h =================================================================== --- coreboot-v3/util/x86emu/yabel/device.h 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/device.h 2009-03-01 10:08:06 UTC (rev 1141) @@ -14,11 +14,16 @@ #define DEVICE_LIB_H #include <types.h> +#if COREBOOT_V2 +#include <arch/byteorder.h> +#include "compat/of.h" +#else #include <cpu.h> +#include <byteorder.h> #include "of.h" +#endif #include "debug.h" -#include <byteorder.h> // a Expansion Header Struct as defined in Plug and Play BIOS Spec 1.0a Chapter 3.2 typedef struct { Modified: coreboot-v3/util/x86emu/yabel/interrupt.c =================================================================== --- coreboot-v3/util/x86emu/yabel/interrupt.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/interrupt.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -10,7 +10,11 @@ * IBM Corporation - initial implementation *****************************************************************************/ +#if COREBOOT_V2 +#include "compat/rtas.h" +#else #include <rtas.h> +#endif #include "biosemu.h" #include "mem.h" @@ -19,9 +23,14 @@ #include "pmm.h" #include <x86emu/x86emu.h> +#if COREBOOT_V2 +#include "../x86emu/prim_ops.h" +#else #include <x86emu/prim_ops.h> +#endif #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL +#include <device/pci.h> #include <device/pci_ops.h> #endif Modified: coreboot-v3/util/x86emu/yabel/io.c =================================================================== --- coreboot-v3/util/x86emu/yabel/io.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/io.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -10,16 +10,21 @@ * IBM Corporation - initial implementation *****************************************************************************/ +#include <types.h> +#if COREBOOT_V2 +#include "compat/rtas.h" +#include "compat/time.h" +#else #include <cpu.h> +#include "rtas.h" +#include <time.h> +#endif #include "device.h" -#include "rtas.h" #include "debug.h" -#include "device.h" -#include <types.h> #include <x86emu/x86emu.h> -#include <time.h> #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL +#include <device/pci.h> #include <device/pci_ops.h> #endif @@ -359,10 +364,15 @@ || (devfn != bios_device.devfn)) { // fail accesses to any device but ours... printf - ("Config access invalid! bus: %x, devfn: %x, offs: %x\n", - bus, devfn, offs); + ("Config read access invalid! PCI device %x:%x.%x, offs: %x\n", + bus, devfn >> 3, devfn & 7, offs); +#ifdef CONFIG_YABEL_NO_ILLEGAL_ACCESS HALT_SYS(); } else { +#else + } + { +#endif #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL switch (size) { case 1: @@ -410,8 +420,8 @@ || (devfn != bios_device.devfn)) { // fail accesses to any device but ours... printf - ("Config access invalid! bus: %x, devfn: %x, offs: %x\n", - bus, devfn, offs); + ("Config write access invalid! PCI device %x:%x.%x, offs: %x\n", + bus, devfn >> 3, devfn & 7, offs); HALT_SYS(); } else { #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL Modified: coreboot-v3/util/x86emu/yabel/mem.c =================================================================== --- coreboot-v3/util/x86emu/yabel/mem.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/mem.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -11,12 +11,18 @@ *****************************************************************************/ #include <types.h> +#if !COREBOOT_V2 #include <cpu.h> +#endif #include "debug.h" #include "device.h" #include "x86emu/x86emu.h" #include "biosemu.h" +#if COREBOOT_V2 +#include "compat/time.h" +#else #include <time.h> +#endif // define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...) #ifdef DEBUG Modified: coreboot-v3/util/x86emu/yabel/pmm.c =================================================================== --- coreboot-v3/util/x86emu/yabel/pmm.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/pmm.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -10,7 +10,11 @@ ****************************************************************************/ #include <x86emu/x86emu.h> +#if COREBOOT_V2 +#include "../x86emu/prim_ops.h" +#else #include <x86emu/prim_ops.h> +#endif #include <string.h> #include "biosemu.h" Modified: coreboot-v3/util/x86emu/yabel/vbe.c =================================================================== --- coreboot-v3/util/x86emu/yabel/vbe.c 2009-02-25 17:50:38 UTC (rev 1140) +++ coreboot-v3/util/x86emu/yabel/vbe.c 2009-03-01 10:08:06 UTC (rev 1141) @@ -11,15 +11,20 @@ *****************************************************************************/ #include <string.h> - #include <types.h> +#if !COREBOOT_V2 #include <cpu.h> +#endif #include "debug.h" #include <x86emu/x86emu.h> #include <x86emu/regs.h> +#if COREBOOT_V2 +#include "../x86emu/prim_ops.h" +#else #include <x86emu/prim_ops.h> // for push_word +#endif #include "biosemu.h" #include "io.h"

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[PATCH] v2: drop path type union name
by Stefan Reinauer 01 Mar '09

01 Mar '09

long patch but pretty trivial -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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Re: [coreboot] [Etherboot-discuss] Etherboot kernel help..
by Joshua McDowell 28 Feb '09

28 Feb '09

What IRC services do you use? I would love to do that! Thanks, Joshua On Fri, 2009-02-27 at 17:58 -0500, Miller, Shao wrote: > Why not come on into IRC on Freenode and join the #etherboot channel for > some more lively help? This seems to be a little mysterious, but in a > live discussion, a lot of information can flow both ways very quickly in > order to get to the bottom of your problem. - Shao > > -----Original Message----- > From: jmcdowell(a)issisolutions.com [mailto:jmcdowell@issisolutions.com] > Sent: Friday, February 27, 2009 13:52 > To: etherboot-discuss(a)lists.sourceforge.net > Subject: [Etherboot-discuss] Etherboot kernel help.. > > I have a problem, that has had me banging my head against the wall for > weeks. I am finally giving up, and asking on the list, as I cannot find > documentation to aid in fixing this issue. > > Here goes.. > > I have an Linux NetworX cluster here, that uses etherboot on the nodes. > > The new software replacement doesn't use etherboot, although it's > capable > of sending out the pxe payload re-packaged for etherboot. The problem > is, that when it gets to loading the kernel, it just hangs there. So > after trying to build all sorts of new newer newest kernels. I did a > little home work. What I did find, was that execute "file" on each > kernel. ( The new and old LNXI kernel ) did show two differences. > > Old : x86 boot sector > > My newly built kernels show something different. > > New : Linux kernel x86 boot executable RO-rootFS, root_dev 0x802, > swap_dev > 0x1, Normal VGA > > I have searched and searched for documents that explain how to get the > image I need. Can anyone please shed some light on this issue? > > Thanks in advance. > > > Joshua > > > ------------------------------------------------------------------------ > ------ > Open Source Business Conference (OSBC), March 24-25, 2009, San > Francisco, CA > -OSBC tackles the biggest issue in open source: Open Sourcing the > Enterprise > -Strategies to boost innovation and cut costs with open source > participation > -Receive a $600 discount off the registration fee with the source code: > SFAD > http://p.sf.net/sfu/XcvMzF8H > _______________________________________________ > Etherboot-discuss mailing list > Etherboot-discuss(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/etherboot-discuss

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coreboot March 2009