coreboot March 2009

coreboot@coreboot.org

64 participants
316 discussions

r3968 - trunk/coreboot-v2/src/arch/i386/boot
by svn＠coreboot.org 02 Mar '09

02 Mar '09

Author: ruik Date: 2009-03-02 23:45:31 +0100 (Mon, 02 Mar 2009) New Revision: 3968 Modified: trunk/coreboot-v2/src/arch/i386/boot/acpigen.c Log: Small bug somehow slipped there. The method body length is incorrectly computed. The attached patch fixes this. I did not spotted that because the return arg is moved just outside of method and I have overseen the closing } Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/arch/i386/boot/acpigen.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/acpigen.c 2009-03-01 18:05:25 UTC (rev 3967) +++ trunk/coreboot-v2/src/arch/i386/boot/acpigen.c 2009-03-02 22:45:31 UTC (rev 3968) @@ -239,8 +239,10 @@ acpigen_emit_byte(0xa4); /* arg */ len += acpigen_write_byte(nr); + /* add all single bytes */ + len += 3; acpigen_patch_len(len - 1); - return len + 3; + return len; } int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat,

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Re: [coreboot] r3965 - in trunk/coreboot-v2: src/arch/i386/boot src/arch/i386/include src/arch/i386/include/arch src/config src/devices src/include src/include/cpu/x86 util
by Pattrick Hueper 02 Mar '09

02 Mar '09

Hi, On Sun, Mar 1, 2009 at 11:16 AM, <svn(a)coreboot.org> wrote: ... > > +define CONFIG_PCI_OPTION_ROM_RUN_YABEL > + default 0 > + export used > + comment "Use Yabel instead of old bios emulator" > +end > + > +define CONFIG_PCI_OPTION_ROM_RUN_VM86 > + default 0 > + export used > + comment "Use Yabel instead of old bios emulator" > +end > + I just noticed... the second comment should be "Use vm86 instead of old bios emulator", shouldnt it? Patty

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Re: [coreboot] [PATCH] port yabel and vm86 to v2.
by Ronald Hoogenboom 02 Mar '09

02 Mar '09

Hi, So with this patch, it should be /easy/ to select vm86 instead of emu86 to boot my vga board on my gigabyte m57sli, like it is in v3. What I did: add the line +uses CONFIG_PCI_OPTION_ROM_RUN_VM86 to src/mainboard/gigabyte/m57sli/Options.lb and add the line +option CONFIG_PCI_OPTION_ROM_RUN_VM86=1 to targets/gigabyte/m57sli/Config.lb do a './buildtarget gigabyte/m57sli/Config.lb' and 'make' in targets/gigabyte/m57sli/m57sli. But: gcc -m32 -nostdlib -nostartfiles -static -o coreboot_ram -T /home/ronald/coreboot/src/config/coreboot_ram.ld coreboot_ram.o coreboot_ram.o: In function `__vga_ec_16bit': vm86.c:(.text+0x9eb1): relocation truncated to fit: R_386_16 against `.text' coreboot_ram.o: In function `__vga_ec_real': vm86.c:(.text+0x9ece): relocation truncated to fit: R_386_16 against symbol `__myidt' defined in .text section in coreboot_ram.o coreboot_ram.o: In function `idthandle': vm86.c:(.text+0x9f2d): relocation truncated to fit: R_386_16 against `.text' coreboot_ram.o: In function `__rms_16bit2': vm86.c:(.text+0x9f9c): relocation truncated to fit: R_386_16 against `.text' coreboot_ram.o: In function `__rms_real2': vm86.c:(.text+0x9fb0): relocation truncated to fit: R_386_16 against symbol `__myidt' defined in .text section in coreboot_ram.o coreboot_ram.o: In function `__rms_16bit': vm86.c:(.text+0xa31f): relocation truncated to fit: R_386_16 against `.text' coreboot_ram.o: In function `__rms_real': vm86.c:(.text+0xa338): relocation truncated to fit: R_386_16 against symbol `__myidt' defined in .text section in coreboot_ram.o collect2: ld returned 1 exit status make[1]: *** [coreboot_ram] Error 1 What is still missing here?? Ronald.

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MPTable can not be high-memory on Linux
by Kevin O'Connor 02 Mar '09

02 Mar '09

Hi Stefan, I'm CC'ing lkml and coreboot mailing lists. On Thu, Feb 19, 2009 at 10:26:17PM +0100, Stefan Reinauer wrote: > OK, I played some more, and I finally found out it's earlyprintk and not > early_printk. Plus there is bootmem_debug: > > Initializing cgroup subsys cpuset > Initializing cgroup subsys cpu > Linux version 2.6.27.7-9-default (geeko@buildhost) (gcc version 4.3.2 > [gcc-4_3-branch re0 > PAT WC disabled due to known CPU erratum. > BIOS-provided physical RAM map: > BIOS-e820: 0000000000000000 - 0000000000001000 (reserved) > BIOS-e820: 0000000000001000 - 0000000000090000 (usable) > BIOS-e820: 0000000000090000 - 0000000000100000 (reserved) > BIOS-e820: 0000000000100000 - 000000003f7f0000 (usable) > BIOS-e820: 000000003f7f0000 - 0000000040000000 (reserved) > BIOS-e820: 00000000f0000000 - 00000000f4000000 (reserved) [...] > ACPI: no DMI BIOS year, acpi=force is required to enable ACPI > ACPI: Disabling ACPI support [...] > found SMP MP-table at [c00f9fc0] 000f9fc0 > bootmem::mark_bootmem_node nid=0 start=f9 end=fb reserve=1 flags=0 > bootmem::__reserve nid=0 start=f9 end=fb flags=0 > bootmem::__reserve silent double reserve of PFN f9 > bootmem::__reserve silent double reserve of PFN fa > BUG: Int 6: CR2 00000000 > EDI c00f9fd0 ESI 3f7f5410 EBP 0003f7f5 ESP c0535f20 > EBX c056c00c EDX 00000006 ECX 00000001 EAX c056c03c > err 00000000 EIP c054f8f0 CS 00000060 flg 00010046 > Stack: 00000000 00000000 00000001 00038000 0003f7f5 f880abf0 3f7f5410 > c00f9fd0 > 00000001 c054f91d 00000000 c054571a c0413e7e c00f9fc0 000f9fc0 > 00000001 > 3f7bf64d 00000000 3e2c5000 c054578a 00000000 c053f3b6 3f7bf64d > 00000000 > > So it dies because of the way it tries to reserve the MP-table. > > Here's the stack trace. > > [<c054f8f0>] mark_bootmem+0x9b/0xab > [<c054f91d>] reserve_bootmem+0x1d/0x1f > [<c054571a>] smp_scan_config+0xd9/0xfa > [<c054578a>] __find_smp_config+0x4f/0x6e > [<c053f3b6>] setup_arch+0x576/0x639 > [<c054ebc4>] cgroup_init_subsys+0x29/0xc9 > [<c053a6ac>] start_kernel+0x6b/0x31f > ======================= It looks like the problem is that the MPTable is located in the last 64K of memory (instead of the first few megabytes). There is a comment about this in arch/x86/kernel/mpparse.c: /* * We cannot access to MPC table to compute * table size yet, as only few megabytes from * the bottom is mapped now. * PC-9800's MPC table places on the very last * of physical memory; so that simply reserving * PAGE_SIZE from mpg->mpf_physptr yields BUG() * in reserve_bootmem. */ However, that comment is in an #ifdef specific to 32bit kernels. (Though, it's not clear to me how that code would help as it sets size to be a negative number.) The easiest way to fix this is to change SeaBIOS to copy the whole mptable to the first megabyte. Also, we need to fix your SMBIOS so that ACPI is used instead of the mptable. -Kevin

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Re: [coreboot] #42: Disable SMM on K8 platforms
by coreboot 02 Mar '09

02 Mar '09

#42: Disable SMM on K8 platforms ----------------------------------+----------------------------------------- Reporter: stepan | Owner: stepan Type: defect | Status: assigned Priority: major | Milestone: Going mainstream Component: coreboot | Version: v2 Keywords: SMM, security | Dependencies: Patchstatus: patch needs review | ----------------------------------+----------------------------------------- Comment(by hailfinger): What's the status of this patch? -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/42#comment:8> coreboot <http://www.coreboot.org/>

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Re: [coreboot] slow load times
by Myles Watson 02 Mar '09

02 Mar '09

This thread might be interesting to others. Kevin fixed CD detection for me in SeaBIOS. The timeout wasn't long enough for the drive to detect the media, so I couldn't boot a CD. The other interesting problem I have is that when I cold boot into SeaBIOS, the drives aren't detected. If I restart the machine after this happens, it won't boot fully into Linux until I boot the factory BIOS. This doesn't happen if I stop the boot process by holding reset until the drives spin up on cold boot. > On Fri, Feb 13, 2009 at 12:11:11PM -0700, Myles Watson wrote: > > >> Looking at the code, I noticed that the cdrom booting code doesn't > use > > >> real timers and the ata code was recently updated to use less delays. > > > > > > Yes. I had these troubles when I updated the Bochs BIOS for ADLO > before > > > SeaBIOS was around. The delays don't matter in the simulator, so they > get > > > ignored. > > > > > >> The latest git does a better job of timing the cdrom capacity/media > > >> sensing. Can you do a "git pull" and retry? > > > > I can boot from CD again. There are a lot of error messages (~550 > > more than before), but it works. Thanks. > > Great! Yeah, looks like the IDE code is responding to failures much > faster than it was before. We could put an msleep() in the cdrom > detect loop just to reduce the warnings, but tweaking the debugging > level might be simpler. > > > >> Hrmm. If you cold boot into SeaBIOS, and then hit ctrl+alt+delete, > > >> does it detect your drives during the reboot? > > > > > > I don't know. I'll try that. It doesn't work with the reset button > if I > > > let it go that far. > > It didn't work for me that way. It still works for me to use the reset > button. > > Hrmm. That's weird. Can you send a SeaBIOS log of a run where you > boot up until failure, press ctrl+alt+delete, and then go to the > failure again? Sure. From what I've been able to tell, there's nothing significant there. SeaBIOS detects the drives the second time, but when Linux tries to boot it gets confused when it tries to load the SATA drivers and hangs. I don't think I was clear on that before. It could be related to the interrupt routing problems, or something that's not getting reset correctly by Coreboot. It's symptomatically the same as booting into Linux with ACPI enabled and my broken (so far) tables. It hangs and won't boot correctly again until I boot the factory BIOS, sometimes only a cold boot with the factory BIOS works. Thanks, Myles

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A8N-SLI-Deluxe_support
by Oliver Niesner 02 Mar '09

02 Mar '09

Hi, all I'am very new to all the coreboot stuff and i need some info - hope someone can help. I have an ASUS A8N-SLI-Deluxe mainboard. According to the list on coreboot.org the A8V-E Deluxe is supported, but i found nothing about A8N-SLI-Deluxe. Has somebody info about the support for that mainboard? Thanks, Oliver

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[PATCH] port yabel and vm86 to v2.
by Stefan Reinauer 02 Mar '09

02 Mar '09

These patches replace the v2 bios emulator by the version from coreboot v3, including yabel and vm86. Other actions required: svn propset "x86emu svn://coreboot.org/repository/coreboot-v3/util/x86emu" util svn rm src/devices/emulator Best regards, Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[v3] rev 1141 COREBOOT_V2 is not defined
by Ronald Hoogenboom 01 Mar '09

01 Mar '09

Hi, Trivial patch to make v3 compile too. Signed off by: Ronald Hoogenboom <hoogenboom30(a)zonnet.nl>

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r1142 - in coreboot-v3/util/x86emu: . pcbios x86emu yabel yabel/compat
by svn＠coreboot.org 01 Mar '09

01 Mar '09

Author: stepan Date: 2009-03-01 20:23:02 +0100 (Sun, 01 Mar 2009) New Revision: 1142 Modified: coreboot-v3/util/x86emu/biosemu.c coreboot-v3/util/x86emu/pcbios/pcibios.c coreboot-v3/util/x86emu/vm86.c coreboot-v3/util/x86emu/vm86_gdt.c coreboot-v3/util/x86emu/x86emu/sys.c coreboot-v3/util/x86emu/yabel/biosemu.c coreboot-v3/util/x86emu/yabel/compat/functions.c coreboot-v3/util/x86emu/yabel/debug.c coreboot-v3/util/x86emu/yabel/debug.h coreboot-v3/util/x86emu/yabel/device.c coreboot-v3/util/x86emu/yabel/device.h coreboot-v3/util/x86emu/yabel/interrupt.c coreboot-v3/util/x86emu/yabel/io.c coreboot-v3/util/x86emu/yabel/mem.c coreboot-v3/util/x86emu/yabel/pmm.c coreboot-v3/util/x86emu/yabel/vbe.c Log: Trivial patch to make v3 compile too. Signed-off-by: Ronald Hoogenboom <hoogenboom30(a)zonnet.nl> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: coreboot-v3/util/x86emu/biosemu.c =================================================================== --- coreboot-v3/util/x86emu/biosemu.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/biosemu.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -36,7 +36,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include <arch/io.h> #include <console/console.h> #else Modified: coreboot-v3/util/x86emu/pcbios/pcibios.c =================================================================== --- coreboot-v3/util/x86emu/pcbios/pcibios.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/pcbios/pcibios.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -35,7 +35,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include <console/console.h> #else #include <console.h> @@ -65,7 +65,7 @@ break; case FIND_PCI_DEVICE: /* FixME: support SI != 0 */ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 dev = dev_find_device(X86_DX, X86_CX, dev); #else dev = dev_find_pci_device(X86_DX, X86_CX, dev); Modified: coreboot-v3/util/x86emu/vm86.c =================================================================== --- coreboot-v3/util/x86emu/vm86.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/vm86.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -26,7 +26,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <string.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include <console/console.h> #include <arch/io.h> #define printk(lvl, x...) printk_debug(x) @@ -591,7 +591,7 @@ vendorid = *pedx; devindex = *pesi; dev = 0; -#if COREBOOT_V2 +#ifdef COREBOOT_V2 while ((dev = dev_find_device(vendorid, devid, dev))) { #else while ((dev = dev_find_pci_device(vendorid, devid, dev))) { Modified: coreboot-v3/util/x86emu/vm86_gdt.c =================================================================== --- coreboot-v3/util/x86emu/vm86_gdt.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/vm86_gdt.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -33,7 +33,7 @@ " .globl gdtarg\n" "gdtarg: \n" " .word gdt_limit \n" -#if COREBOOT_V2 +#ifdef COREBOOT_V2 " .long gdt \n" #else " .long gdtptr \n" @@ -78,7 +78,7 @@ "__mygdt_end: \n" -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 /* FIXME: This does probably not belong here */ " .globl idtarg\n" "idtarg:\n" Modified: coreboot-v3/util/x86emu/x86emu/sys.c =================================================================== --- coreboot-v3/util/x86emu/x86emu/sys.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/x86emu/sys.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -46,7 +46,7 @@ #include "debug.h" #include "prim_ops.h" #if 1 /* Coreboot needs to map prinkf to printk. */ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "arch/io.h" #else #include "io.h" Modified: coreboot-v3/util/x86emu/yabel/biosemu.c =================================================================== --- coreboot-v3/util/x86emu/yabel/biosemu.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/biosemu.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -13,7 +13,7 @@ #include <string.h> #include <types.h> -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 #include <cpu.h> #endif @@ -21,7 +21,7 @@ #include <x86emu/x86emu.h> #include <x86emu/regs.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "../x86emu/prim_ops.h" #else #include <x86emu/prim_ops.h> // for push_word @@ -34,7 +34,7 @@ #include "device.h" #include "pmm.h" -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "compat/rtas.h" #else #include <rtas.h> Modified: coreboot-v3/util/x86emu/yabel/compat/functions.c =================================================================== --- coreboot-v3/util/x86emu/yabel/compat/functions.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/compat/functions.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -14,7 +14,7 @@ */ #include <types.h> -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 #include <config.h> #endif #include <device/device.h> Modified: coreboot-v3/util/x86emu/yabel/debug.c =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/debug.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -10,7 +10,7 @@ * IBM Corporation - initial implementation *****************************************************************************/ -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 #include <cpu.h> #endif Modified: coreboot-v3/util/x86emu/yabel/debug.h =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.h 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/debug.h 2009-03-01 19:23:02 UTC (rev 1142) @@ -19,7 +19,7 @@ extern void x86emu_dump_xregs(void); /* printf is not available in coreboot... use printk */ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include <console/console.h> #else #include <console.h> Modified: coreboot-v3/util/x86emu/yabel/device.c =================================================================== --- coreboot-v3/util/x86emu/yabel/device.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/device.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -12,7 +12,7 @@ #include "device.h" -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "compat/rtas.h" #else #include "rtas.h" @@ -396,7 +396,7 @@ { u8 rval = 0; //init bios_device struct -#if COREBOOT_V2 +#ifdef COREBOOT_V2 DEBUG_PRINTF("%s\n", __func__); #else DEBUG_PRINTF("%s(%s)\n", __func__, device->dtsname); Modified: coreboot-v3/util/x86emu/yabel/device.h =================================================================== --- coreboot-v3/util/x86emu/yabel/device.h 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/device.h 2009-03-01 19:23:02 UTC (rev 1142) @@ -14,7 +14,7 @@ #define DEVICE_LIB_H #include <types.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include <arch/byteorder.h> #include "compat/of.h" #else Modified: coreboot-v3/util/x86emu/yabel/interrupt.c =================================================================== --- coreboot-v3/util/x86emu/yabel/interrupt.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/interrupt.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -10,7 +10,7 @@ * IBM Corporation - initial implementation *****************************************************************************/ -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "compat/rtas.h" #else #include <rtas.h> @@ -23,7 +23,7 @@ #include "pmm.h" #include <x86emu/x86emu.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "../x86emu/prim_ops.h" #else #include <x86emu/prim_ops.h> Modified: coreboot-v3/util/x86emu/yabel/io.c =================================================================== --- coreboot-v3/util/x86emu/yabel/io.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/io.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -11,7 +11,7 @@ *****************************************************************************/ #include <types.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "compat/rtas.h" #include "compat/time.h" #else Modified: coreboot-v3/util/x86emu/yabel/mem.c =================================================================== --- coreboot-v3/util/x86emu/yabel/mem.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/mem.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -11,14 +11,14 @@ *****************************************************************************/ #include <types.h> -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 #include <cpu.h> #endif #include "debug.h" #include "device.h" #include "x86emu/x86emu.h" #include "biosemu.h" -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "compat/time.h" #else #include <time.h> Modified: coreboot-v3/util/x86emu/yabel/pmm.c =================================================================== --- coreboot-v3/util/x86emu/yabel/pmm.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/pmm.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -10,7 +10,7 @@ ****************************************************************************/ #include <x86emu/x86emu.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "../x86emu/prim_ops.h" #else #include <x86emu/prim_ops.h> Modified: coreboot-v3/util/x86emu/yabel/vbe.c =================================================================== --- coreboot-v3/util/x86emu/yabel/vbe.c 2009-03-01 10:08:06 UTC (rev 1141) +++ coreboot-v3/util/x86emu/yabel/vbe.c 2009-03-01 19:23:02 UTC (rev 1142) @@ -12,7 +12,7 @@ #include <string.h> #include <types.h> -#if !COREBOOT_V2 +#ifndef COREBOOT_V2 #include <cpu.h> #endif @@ -20,7 +20,7 @@ #include <x86emu/x86emu.h> #include <x86emu/regs.h> -#if COREBOOT_V2 +#ifdef COREBOOT_V2 #include "../x86emu/prim_ops.h" #else #include <x86emu/prim_ops.h> // for push_word

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coreboot March 2009