coreboot September 2008

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[PATCH] coreinfo: suppress non-printables in ramdump and bootlog
by Ulf Jordan 30 Sep '08

30 Sep '08

The attached patch fixes the unaligned display on serial console that has occurred due to non-printable characters being inserted on the ramdump and bootlog screens of coreinfo. /ulf

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r3621 - trunk/payloads/coreinfo
by svn＠coreboot.org 30 Sep '08

30 Sep '08

Author: stuge Date: 2008-09-30 08:13:54 +0200 (Tue, 30 Sep 2008) New Revision: 3621 Modified: trunk/payloads/coreinfo/bootlog_module.c trunk/payloads/coreinfo/ramdump_module.c Log: Do not try to display non-printable characters on the bootlog and ramdump screens. This fixes unaligned display on serial console. The current isprint() implementation assumes a C locale, so also characters with the eigth bit set are supressed (they produced inconsistant results on VGA and serial anyway). Signed-off-by: Ulf Jordan <jordan(a)chalmers.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/payloads/coreinfo/bootlog_module.c =================================================================== --- trunk/payloads/coreinfo/bootlog_module.c 2008-09-30 04:52:29 UTC (rev 3620) +++ trunk/payloads/coreinfo/bootlog_module.c 2008-09-30 06:13:54 UTC (rev 3621) @@ -63,7 +63,7 @@ /* FIXME: Handle lines longer than 80 characters. */ while (y <= 18) { - mvwaddnstr(win, y + 2, x, tmp, 1); + mvwaddch(win, y + 2, x, isprint(*tmp) ? *tmp : ' '); x++; tmp++; if (*tmp == '\n') { Modified: trunk/payloads/coreinfo/ramdump_module.c =================================================================== --- trunk/payloads/coreinfo/ramdump_module.c 2008-09-30 04:52:29 UTC (rev 3620) +++ trunk/payloads/coreinfo/ramdump_module.c 2008-09-30 06:13:54 UTC (rev 3621) @@ -44,7 +44,8 @@ mvwaddch(win, row + y, col + 76, '|'); } mvwprintw(win, row + y, col + x + 9, "%02x", ptr[i - 1]); - mvwprintw(win, row + y, 62 + count++, "%c", ptr[i - 1]); + mvwprintw(win, row + y, 62 + count++, "%c", + isprint(ptr[i - 1]) ? ptr[i - 1] : ' '); x += 3; if (x == 24) /* One more space after column/byte 8. */ x++;

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r3620 build service
by coreboot information 30 Sep '08

30 Sep '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "stuge" checked in revision 3620 to the coreboot source repository and caused the following changes: Change Log: A duplicate register address is incremented in table register_values. A trivial fix to correct the address of the high byte in SDRAMC. Thus the leadoff timing IPDLT will be correctly referenced. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of asus:m2v-mx_se is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3620&device=m2v-mx_se&vend… Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3620&device=j7f24&vendor=j… Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3620&device=epia-cn&vendor… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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r3619 build service
by coreboot information 30 Sep '08

30 Sep '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "stuge" checked in revision 3619 to the coreboot source repository and caused the following changes: Change Log: This patch fixes support for the AT49F002N(T) chip in the flashrom tool. It replaces the write function to one based on write_byte_program_jedec() instead of write_page_write_jedec(), as this part does not support page programming. I have verified the NT variant to fully work now, and adjusted the test status accordingly. The N variant *should* also work with this patch, but remains untested. Signed-off-by: Tim ter Laak <timl(a)scintilla.utwente.nl> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of asus:m2v-mx_se is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3619&device=m2v-mx_se&vend… Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3619&device=j7f24&vendor=j… Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3619&device=epia-cn&vendor… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[PATCH] Register address for i440bx/raminit.c
by Mats Erik Andersson 30 Sep '08

30 Sep '08

A duplicate register address is incremented in table register_values. A trivial fix to correct the address of the high byte in SDRAMC. Thus the leadoff timing IPDLT will be correctly referenced. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> --- Index: src/northbridge/intel/i440bx/raminit.c =================================================================== --- src/northbridge/intel/i440bx/raminit.c (revision 3531) +++ src/northbridge/intel/i440bx/raminit.c (arbetskopia) @@ -282,7 +282,7 @@ * 1 = 2 clocks of RAS# precharge */ SDRAMC + 0, 0x00, 0x00, - SDRAMC + 0, 0x00, 0x00, + SDRAMC + 1, 0x00, 0x00, /* PGPOL - Paging Policy Register * 0x78 - 0x79

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r3620 - trunk/coreboot-v2/src/northbridge/intel/i440bx
by svn＠coreboot.org 30 Sep '08

30 Sep '08

Author: stuge Date: 2008-09-30 06:52:29 +0200 (Tue, 30 Sep 2008) New Revision: 3620 Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c Log: A duplicate register address is incremented in table register_values. A trivial fix to correct the address of the high byte in SDRAMC. Thus the leadoff timing IPDLT will be correctly referenced. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c 2008-09-30 04:13:32 UTC (rev 3619) +++ trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c 2008-09-30 04:52:29 UTC (rev 3620) @@ -282,7 +282,7 @@ * 1 = 2 clocks of RAS# precharge */ SDRAMC + 0, 0x00, 0x00, - SDRAMC + 0, 0x00, 0x00, + SDRAMC + 1, 0x00, 0x00, /* PGPOL - Paging Policy Register * 0x78 - 0x79

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LZMA magic number
by Myles Watson 30 Sep '08

30 Sep '08

Is there a magic number for LZMA? Should there be? I accidentally used an uncompressed payload with v2 when it expected a compressed payload, and it gave me the message: Decoder scratchpad too small!! Decoding error = 1 I think it would be nicer to have an error like: Payload not compressed with lzma! Myles

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r3618 build service
by coreboot information 30 Sep '08

30 Sep '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "stuge" checked in revision 3618 to the coreboot source repository and caused the following changes: Change Log: flashrom: ST M29F040B status TEST_OK_ PROBE READ ERASE WRITE Per report from Daniel Lindenaar. Thanks! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of asus:m2v-mx_se is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3618&device=m2v-mx_se&vend… Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3618&device=j7f24&vendor=j… Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3618&device=epia-cn&vendor… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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visualizing the coreboot device tree
by Stefan Reinauer 30 Sep '08

30 Sep '08

See patch -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 This patch creates static.dot visualizing the coreboot device tree (v2) create pngs with $ fdp -o static.png -Tpng static.dot or $ dot -o static.png -Tpng static.dot edge colors: blue: parent->self relation red: self->child relation green: self->sibling relation pink: self->next relation TODO/ideas: node colors according to device type? put devices belonging to the same parent on the same level add an agenda I don't think this should be committed yet, it's just a rough try I created to debug a problem with the device tree code / resource allocator. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Index: util/newconfig/config.g =================================================================== --- util/newconfig/config.g (revision 534) +++ util/newconfig/config.g (working copy) @@ -93,6 +93,7 @@ dict = 4 statement = 5 dump = 6 + gengraph = 7 def __init__(self, *level): self.__level = level @@ -682,6 +683,15 @@ else: name = "%s %s" % (name, self.path) return name + + def graph_name(self): + name = "" + name = "%s_%d" % (self.type_name, self.instance) +# if (self.chip_or_device == 'chip'): + name = "%s %s %s" % (name, self.part, self.parent.type_name) +# else: +# name = "%s %s" % (name, self.path) + return name def dumpme(self, lvl): """Dump information about this part for debugging""" @@ -976,6 +986,56 @@ setdict(self.uses_options, name, o) exportoption(o, self.image.exported_options) + def gengraph(self, file, pass_num): + """Generate static device tree graph for this part. Two passes + are used - the first generates type information, and the second + generates instance information""" + if (pass_num == 0): + if (self.chip_or_device == 'chip'): + return; + else: + if (self.instance): + file.write("%s[shape=box, label=\"%s\"];\n" \ + % (self.instance_name, self.graph_name())) + else: + file.write("node [shape=circle] dev_root;\n") + return + # This is pass the second, which is pass number 1 + # this is really just a case statement ... + + if (self.chip_or_device == 'chip'): + if (self.instance == 0): + self.instance_name = "dev_root" + file.write("%s -> %s ;\n" % (self.instance_name, self.firstchilddevice().instance_name)) + return + + # Don't print duplicate devices, just print their children + if (self.dup): + return + + file.write("%s -> %s [color=\"#0000ff\"]\n" % \ + (self.firstparentdevice().instance_name, self.instance_name)) + links = 0 + bus = self + while(bus and (bus.path == self.path)): + child = bus.firstchilddevice() + if (child or (bus != self) or (bus.next_sibling and (bus.next_sibling.path == self.path))): + if (child): + file.write("%s -> %s [color=\"#ff0000\"]\n" % (self.instance_name, child.instance_name)) + links = links + 1 + if (1): + bus = bus.next_sibling + else: + bus = 0 + sibling = self.firstsiblingdevice(); + if (sibling): + file.write("%s -> %s [color=\"#00ff00\"]\n" % (self.instance_name, sibling.instance_name)) + chip = self.firstparentchip() + if (self.next_device): + file.write("%s -> %s [color=\"#ff00ff\"]\n" % (self.instance_name, self.next_device.instance_name)) + return + + # ----------------------------------------------------------------------------- # statements # ----------------------------------------------------------------------------- @@ -2254,7 +2314,9 @@ file.write("#include <device/pci.h>\n") for path in image.getconfigincludes().values(): file.write("#include \"%s\"\n" % path) + file.write("\n/* pass 0 */\n") gencode(image.getroot(), file, 0) + file.write("\n/* pass 1 */\n") gencode(image.getroot(), file, 1) file.close() @@ -2278,6 +2340,36 @@ kid = kid.next_sibling debug.info(debug.gencode, "DONE GENCODE") +def writegraph(image): + filename = os.path.join(img_dir, "static.dot") + print "Creating", filename + file = safe_open(filename, 'w+') + file.write("digraph devicetree {\n") + gengraph(image.getroot(), file, 0) + gengraph(image.getroot(), file, 1) + file.write("}\n") + file.close() + +def gengraph(part, file, pass_num): + debug.info(debug.gengraph, "GENGRAPH ME is") + part.gengraph(file, pass_num) + # dump the siblings -- actually are there any? not sure + debug.info(debug.gengraph, "GENGRAPH SIBLINGS are") + kid = part.next_sibling + while (kid): + kid.gengraph(file, pass_num) + kid = kid.next_sibling + # now dump the children + debug.info(debug.gengraph, "GENGRAPH KIDS are") + if (part.children): + gengraph(part.children, file, pass_num) + kid = part.next_sibling + while (kid): + if (kid.children): + gengraph(kid.children, file, pass_num) + kid = kid.next_sibling + debug.info(debug.gengraph, "DONE GENGRAPH") + def verifyparse(): """Add any run-time checks to verify that parsing the configuration was successful""" @@ -2343,6 +2435,7 @@ writeinitincludes(image) writeimagemakefile(image) writeldoptions(image) + writegraph(image) writemakefilesettings(target_dir) writemakefile(target_dir)

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Information compatibility with Intel Motherboard - S3200SHV
by DANGELSER YVES 30 Sep '08

30 Sep '08

Hello, We have receive a request from one of our customer, in order to verify and qualify Coreboot with their system. Could you please let me know if you know the Intel Motherboard S3200SHV. If you can support me it will be very helpful. regards DANGELSER YVES Responsable production. I-Bus France BP 45 80 Route des Lucioles Les Espaces de Sophia 06901 Sophia Antipolis CEDEX France Email : <mailto:ydangelser@ibus.com> ydangelser(a)industrial-computers.com Tél : +33 493 00 4368 Fax : +33 493 00 4369 Mobile : +33 682 00 4873 <http://www.industrial-computers.com/> http://www.industrial-computers.com This message and any attachments are strictly confidential and intended solely for the addressee. Any unauthorized use or disclosure, in whole or in part, is prohibited. E-mails are subject to possible alteration. IBUS and the sender decline any liability if this message and/or any attachments have been altered, changed or falsified. If you are not the intended recipient of this message, please delete it and notify immediately the sender. P Préservons l'environnement en évitant d'imprimer tous les e-mails. Merci!

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coreboot September 2008