coreboot July 2008

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[patch][v2] AMD Fam10 HT BUID setup
by Marc Jones 17 Jul '08

17 Jul '08

This fixes a non-coherent link speed setting. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Add manual HT BUID fixup to detect previously set BUIDs in early init. This fixes the coherent link running at default speed. Fix HT event notify to output useful information. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c =================================================================== --- coreboot-v2.orig/src/northbridge/amd/amdht/ht_wrapper.c 2008-07-16 15:37:37.000000000 -0600 +++ coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c 2008-07-15 15:05:16.000000000 -0600 @@ -79,17 +79,57 @@ /** * void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0) - * - * Needs to be fixed to output the debug structures. - * */ -void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0) +void AMD_CB_EventNotify (u8 evtClass, u16 event, u8 *pEventData0) { + u8 i; + printk_debug("AMD_CB_EventNotify()\n"); - printk_debug("event class: %02x event: %04x\n", evtClass, event); + printk_debug(" event class: %02x\n event: %04x\n data: ", evtClass, event); + + for (i = 0; i < *pEventData0; i++) { + printk_debug(" %02x ", *(pEventData0 + i)); + } + printk_debug("\n"); } + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. + * + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. + * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically + */ +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u16 link, u8 **List) +{ + const u8 swaplist[] = { 0xFF, HT_CHAIN_UNITID_BASE, HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((HT_CHAIN_UNITID_BASE != 0) && (HT_CHAIN_END_UNITID_BASE != 0)) { + printk_debug("AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + + return 0; +} + + /** * void getAmdTopolist(u8 ***p) * @@ -110,6 +150,7 @@ */ void amd_ht_init(struct sys_info *sysinfo) { + AMD_HTBLOCK ht_wrapper = { NULL, // u8 **topolist; 0, // u8 AutoBusStart; @@ -117,7 +158,7 @@ 6, // u8 AutoBusIncrement; NULL, // BOOL (*AMD_CB_IgnoreLink)(); NULL, // BOOL (*AMD_CB_OverrideBusNumbers)(); - NULL, // BOOL (*AMD_CB_ManualBUIDSwapList)(); + AMD_CB_ManualBUIDSwapList, // BOOL (*AMD_CB_ManualBUIDSwapList)(); NULL, // void (*AMD_CB_DeviceCapOverride)(); NULL, // void (*AMD_CB_Cpu2CpuPCBLimits)(); NULL, // void (*AMD_CB_IOPCBLimits)();

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[patch][v2] AMD Fam10 HT cleanup
by Marc Jones 17 Jul '08

17 Jul '08

Some HT cleanup. Shouldn't be anything major. -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Clean up AMD FAM10 HT variable initialization. The structure init is cleaner, avoid compiler warnings, and matches the AMD example code more closely. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: coreboot-v2/src/northbridge/amd/amdht/h3finit.c =================================================================== --- coreboot-v2.orig/src/northbridge/amd/amdht/h3finit.c 2008-07-16 15:35:11.000000000 -0600 +++ coreboot-v2/src/northbridge/amd/amdht/h3finit.c 2008-07-15 15:48:21.000000000 -0600 @@ -112,7 +112,7 @@ */ /*---------------------------------------------------------------------------------------- - * int + * u8 * graphHowManyNodes(u8 *graph) * * Description: @@ -123,7 +123,7 @@ * @param[out] u8 results = the number of nodes in the graph * --------------------------------------------------------------------------------------- */ -int graphHowManyNodes(u8 *graph) +u8 graphHowManyNodes(u8 *graph) { return graph[0]; } @@ -198,7 +198,7 @@ */ u8 graphGetReq(u8 *graph, u8 nodeA, u8 nodeB) { - int size = graph[0]; + u8 size = graph[0]; ASSERT(size <= MAX_NODES); ASSERT((nodeA < size) && (nodeB < size)); return (graph[1+(nodeA*size+nodeB)*2+1] & 0x0F); @@ -206,7 +206,7 @@ /*---------------------------------------------------------------------------------------- * u8 - * graphGetBc(unsigned char *graph, int nodeA, int nodeB) + * graphGetBc(u8 *graph, u8 nodeA, u8 nodeB) * * Description: * Returns a bit vector of nodes that nodeA should forward a broadcast from @@ -219,9 +219,9 @@ * OU u8 results = the broadcast routes for nodeA from nodeB * --------------------------------------------------------------------------------------- */ -u8 graphGetBc(unsigned char *graph, int nodeA, int nodeB) +u8 graphGetBc(u8 *graph, u8 nodeA, u8 nodeB) { - int size = graph[0]; + u8 size = graph[0]; ASSERT(size <= MAX_NODES); ASSERT((nodeA < size) && (nodeB < size)); return graph[1+(nodeA*size+nodeB)*2]; @@ -415,10 +415,11 @@ /* Notify BIOS of event (while variables are still the same) */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohFamilyFeud evt = {sizeof(sHtEventCohFamilyFeud), - currentNode, - currentLink, - pDat->NodesDiscovered}; + sHtEventCohFamilyFeud evt; + evt.eSize = sizeof(sHtEventCohFamilyFeud); + evt.node = currentNode; + evt.link = currentLink; + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_FAMILY_FEUD, @@ -470,11 +471,12 @@ /* Notify BIOS of event */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohMpCapMismatch evt = {sizeof(sHtEventCohMpCapMismatch), - currentNode, - currentLink, - pDat->sysMpCap, - pDat->NodesDiscovered}; + sHtEventCohMpCapMismatch evt; + evt.eSize = sizeof(sHtEventCohMpCapMismatch); + evt.node = currentNode; + evt.link = currentLink; + evt.sysMpCap = pDat->sysMpCap; + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_MPCAP_MISMATCH, @@ -502,10 +504,11 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohNodeDiscovered evt = {sizeof(sHtEventCohNodeDiscovered), - currentNode, - currentLink, - token}; + sHtEventCohNodeDiscovered evt; + evt.eSize = sizeof(sHtEventCohNodeDiscovered); + evt.node = currentNode; + evt.link = currentLink; + evt.newNode = token; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_INFO, HT_EVENT_COH_NODE_DISCOVERED, @@ -527,12 +530,13 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohLinkExceed evt = {sizeof(sHtEventCohLinkExceed), - currentNode, - currentLink, - token, - pDat->NodesDiscovered, - pDat->nb->maxLinks}; + sHtEventCohLinkExceed evt; + evt.eSize = sizeof(sHtEventCohLinkExceed); + evt.node = currentNode; + evt.link = currentLink; + evt.targetNode = token; + evt.totalNodes = pDat->NodesDiscovered; + evt.maxLinks = pDat->nb->maxLinks; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_LINK_EXCEED, @@ -776,8 +780,9 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohNoTopology evt = {sizeof(sHtEventCohNoTopology), - pDat->NodesDiscovered}; + sHtEventCohNoTopology evt; + evt.eSize = sizeof(sHtEventCohNoTopology); + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_NO_TOPOLOGY, @@ -840,7 +845,7 @@ */ void coherentInit(sMainData *pDat) { - int i, j; + u8 i, j; #ifdef HT_BUILD_NC_ONLY /* Replace discovery process with: @@ -912,7 +917,11 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHTEventNcohBusMaxExceed evt = {sizeof(sHTEventNcohBusMaxExceed), node, link, pDat->AutoBusCurrent}; + sHTEventNcohBusMaxExceed evt; + evt.eSize = sizeof(sHTEventNcohBusMaxExceed); + evt.node = node; + evt.link = link; + evt.bus = pDat->AutoBusCurrent; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_BUS_MAX_EXCEED,(u8 *)&evt); } @@ -927,7 +936,10 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohCfgMapExceed evt = {sizeof(sHtEventNcohCfgMapExceed), node, link}; + sHtEventNcohCfgMapExceed evt; + evt.eSize = sizeof(sHtEventNcohCfgMapExceed); + evt.node = node; + evt.link = link; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_NCOH_CFG_MAP_EXCEED, @@ -1049,11 +1061,12 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohLinkExceed evt = {sizeof(sHtEventNcohLinkExceed), - node, - link, - depth, - pDat->nb->maxLinks}; + sHtEventNcohLinkExceed evt; + evt.eSize = sizeof(sHtEventNcohLinkExceed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.maxLinks = pDat->nb->maxLinks; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_NCOH_LINK_EXCEED, @@ -1097,8 +1110,13 @@ /* An error handler for the case where we run out of BUID's on a chain */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohBuidExceed evt = {sizeof(sHtEventNcohBuidExceed), - node, link, depth, (u8)currentBUID, (u8)unitIDcnt}; + sHtEventNcohBuidExceed evt; + evt.eSize = sizeof(sHtEventNcohBuidExceed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.currentBUID = (uint8)currentBUID; + evt.unitCount = (uint8)unitIDcnt; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_BUID_EXCEED,(u8 *)&evt); } @@ -1115,8 +1133,12 @@ /* An error handler for this critical error */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohDeviceFailed evt = {sizeof(sHtEventNcohDeviceFailed), - node, link, depth, (u8)currentBUID}; + sHtEventNcohDeviceFailed evt; + evt.eSize = sizeof(sHtEventNcohDeviceFailed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.attemptedBUID = (uint8)currentBUID; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_DEVICE_FAILED,(u8 *)&evt); } @@ -1138,7 +1160,11 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Provide information on automatic device results */ - sHtEventNcohAutoDepth evt = {sizeof(sHtEventNcohAutoDepth), node, link, (depth - 1)}; + sHtEventNcohAutoDepth evt; + evt.eSize = sizeof(sHtEventNcohAutoDepth); + evt.node = node; + evt.link = link; + evt.depth = (depth - 1); pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_INFO,HT_EVENT_NCOH_AUTO_DEPTH,(u8 *)&evt); } Index: coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c =================================================================== --- coreboot-v2.orig/src/northbridge/amd/amdht/h3ncmn.c 2008-07-16 15:35:46.000000000 -0600 +++ coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c 2008-07-15 15:48:21.000000000 -0600 @@ -401,7 +401,11 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Pass the node and link on which the generic synch flood event occurred. */ - sHtEventHWHtCrc evt = {sizeof(sHtEventHWHtCrc), node, link, (u8)crc}; + sHtEventHWHtCrc evt; + evt.eSize = sizeof(sHtEventHWHtCrc); + evt.node = node; + evt.link = link; + evt.laneMask = (uint8)crc; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_HW_FAULT, HT_EVENT_HW_HTCRC, @@ -414,7 +418,10 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Pass the node and link on which the generic synch flood event occurred. */ - sHtEventHWSynchFlood evt = {sizeof(sHtEventHWSynchFlood), node, link}; + sHtEventHWSynchFlood evt; + evt.eSize = sizeof(sHtEventHWSynchFlood); + evt.node = node; + evt.link = link; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_HW_FAULT, HT_EVENT_HW_SYNCHFLOOD, @@ -1112,8 +1119,6 @@ return 2; } STOP_HERE; /* This is an error internal condition */ - - return 0xFF; // make the compiler happy. } /**---------------------------------------------------------------------------------------- @@ -1143,8 +1148,6 @@ return 4; } STOP_HERE; /* This is an internal error condition */ - - return 0xFF; // make the compiler happy. } /**---------------------------------------------------------------------------------------- @@ -1468,10 +1471,11 @@ { if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventOptRequiredCap evt ={sizeof(sHtEventOptRequiredCap), - pDat->PortList[i].NodeID, - pDat->PortList[i].HostLink, - pDat->PortList[i].HostDepth}; + sHtEventOptRequiredCap evt; + evt.eSize = sizeof(sHtEventOptRequiredCap); + evt.node = pDat->PortList[i].NodeID; + evt.link = pDat->PortList[i].HostLink; + evt.depth = pDat->PortList[i].HostDepth; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_WARNING, HT_EVENT_OPT_REQUIRED_CAP_RETRY, @@ -1513,10 +1517,11 @@ { if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventOptRequiredCap evt ={sizeof(sHtEventOptRequiredCap), - pDat->PortList[i].NodeID, - pDat->PortList[i].HostLink, - pDat->PortList[i].HostDepth}; + sHtEventOptRequiredCap evt; + evt.eSize = sizeof(sHtEventOptRequiredCap); + evt.node = pDat->PortList[i].NodeID; + evt.link = pDat->PortList[i].HostLink; + evt.depth = pDat->PortList[i].HostDepth; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_WARNING, HT_EVENT_OPT_REQUIRED_CAP_GEN3,

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r3426 - trunk/coreboot-v2/src/northbridge/amd/amdht
by svn＠coreboot.org 17 Jul '08

17 Jul '08

Author: mjones Date: 2008-07-17 21:54:06 +0200 (Thu, 17 Jul 2008) New Revision: 3426 Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c Log: Add manual HT BUID fixup to detect previously set BUIDs in early init. This fixes the non-coherent(sb) link running at default speed. Fix HT event notify to output useful information. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c 2008-07-17 19:50:37 UTC (rev 3425) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/ht_wrapper.c 2008-07-17 19:54:06 UTC (rev 3426) @@ -79,17 +79,57 @@ /** * void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0) + */ +void AMD_CB_EventNotify (u8 evtClass, u16 event, u8 *pEventData0) +{ + u8 i; + + printk_debug("AMD_CB_EventNotify()\n"); + printk_debug(" event class: %02x\n event: %04x\n data: ", evtClass, event); + + for (i = 0; i < *pEventData0; i++) { + printk_debug(" %02x ", *(pEventData0 + i)); + } + printk_debug("\n"); + +} + + +/** + * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List) + * Description: + * This routine is called every time a non-coherent chain is processed. + * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a + * swap list. The first part of the list controls the BUID assignment and the + * second part of the list provides the device to device linking. Device orientation + * can be detected automatically, or explicitly. See documentation for more details. * - * Needs to be fixed to output the debug structures. + * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially + * based on each device's unit count. * + * Parameters: + * @param[in] u8 node = The node on which this chain is located + * @param[in] u8 link = The link on the host for this chain + * @param[out] u8** list = supply a pointer to a list + * @param[out] BOOL result = true to use a manual list + * false to initialize the link automatically */ -void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0) +BOOL AMD_CB_ManualBUIDSwapList (u8 node, u16 link, u8 **List) { - printk_debug("AMD_CB_EventNotify()\n"); - printk_debug("event class: %02x event: %04x\n", evtClass, event); + u8 swaplist[] = { 0xFF, HT_CHAIN_UNITID_BASE, HT_CHAIN_END_UNITID_BASE, 0xFF }; + /* If the BUID was adjusted in early_ht we need to do the manual override */ + if ((HT_CHAIN_UNITID_BASE != 0) && (HT_CHAIN_END_UNITID_BASE != 0)) { + printk_debug("AMD_CB_ManualBUIDSwapList()\n"); + if ((node == 0) && (link == 0)) { /* BSP SB link */ + *List = swaplist; + return 1; + } + } + return 0; } + /** * void getAmdTopolist(u8 ***p) * @@ -110,6 +150,7 @@ */ void amd_ht_init(struct sys_info *sysinfo) { + AMD_HTBLOCK ht_wrapper = { NULL, // u8 **topolist; 0, // u8 AutoBusStart; @@ -117,7 +158,7 @@ 6, // u8 AutoBusIncrement; NULL, // BOOL (*AMD_CB_IgnoreLink)(); NULL, // BOOL (*AMD_CB_OverrideBusNumbers)(); - NULL, // BOOL (*AMD_CB_ManualBUIDSwapList)(); + AMD_CB_ManualBUIDSwapList, // BOOL (*AMD_CB_ManualBUIDSwapList)(); NULL, // void (*AMD_CB_DeviceCapOverride)(); NULL, // void (*AMD_CB_Cpu2CpuPCBLimits)(); NULL, // void (*AMD_CB_IOPCBLimits)();

1 0

r3425 - trunk/coreboot-v2/src/northbridge/amd/amdht
by svn＠coreboot.org 17 Jul '08

17 Jul '08

Author: mjones Date: 2008-07-17 21:50:37 +0200 (Thu, 17 Jul 2008) New Revision: 3425 Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c Log: Clean up AMD FAM10 HT variable initialization. The structure init is cleaner, avoid compiler warnings, and matches the AMD example code more closely. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Peter Stuge <peter(a)stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c 2008-07-17 19:44:08 UTC (rev 3424) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c 2008-07-17 19:50:37 UTC (rev 3425) @@ -112,7 +112,7 @@ */ /*---------------------------------------------------------------------------------------- - * int + * u8 * graphHowManyNodes(u8 *graph) * * Description: @@ -123,7 +123,7 @@ * @param[out] u8 results = the number of nodes in the graph * --------------------------------------------------------------------------------------- */ -int graphHowManyNodes(u8 *graph) +u8 graphHowManyNodes(u8 *graph) { return graph[0]; } @@ -198,7 +198,7 @@ */ u8 graphGetReq(u8 *graph, u8 nodeA, u8 nodeB) { - int size = graph[0]; + u8 size = graph[0]; ASSERT(size <= MAX_NODES); ASSERT((nodeA < size) && (nodeB < size)); return (graph[1+(nodeA*size+nodeB)*2+1] & 0x0F); @@ -206,7 +206,7 @@ /*---------------------------------------------------------------------------------------- * u8 - * graphGetBc(unsigned char *graph, int nodeA, int nodeB) + * graphGetBc(u8 *graph, u8 nodeA, u8 nodeB) * * Description: * Returns a bit vector of nodes that nodeA should forward a broadcast from @@ -219,9 +219,9 @@ * OU u8 results = the broadcast routes for nodeA from nodeB * --------------------------------------------------------------------------------------- */ -u8 graphGetBc(unsigned char *graph, int nodeA, int nodeB) +u8 graphGetBc(u8 *graph, u8 nodeA, u8 nodeB) { - int size = graph[0]; + u8 size = graph[0]; ASSERT(size <= MAX_NODES); ASSERT((nodeA < size) && (nodeB < size)); return graph[1+(nodeA*size+nodeB)*2]; @@ -415,10 +415,11 @@ /* Notify BIOS of event (while variables are still the same) */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohFamilyFeud evt = {sizeof(sHtEventCohFamilyFeud), - currentNode, - currentLink, - pDat->NodesDiscovered}; + sHtEventCohFamilyFeud evt; + evt.eSize = sizeof(sHtEventCohFamilyFeud); + evt.node = currentNode; + evt.link = currentLink; + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_FAMILY_FEUD, @@ -470,11 +471,12 @@ /* Notify BIOS of event */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohMpCapMismatch evt = {sizeof(sHtEventCohMpCapMismatch), - currentNode, - currentLink, - pDat->sysMpCap, - pDat->NodesDiscovered}; + sHtEventCohMpCapMismatch evt; + evt.eSize = sizeof(sHtEventCohMpCapMismatch); + evt.node = currentNode; + evt.link = currentLink; + evt.sysMpCap = pDat->sysMpCap; + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_MPCAP_MISMATCH, @@ -502,10 +504,11 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohNodeDiscovered evt = {sizeof(sHtEventCohNodeDiscovered), - currentNode, - currentLink, - token}; + sHtEventCohNodeDiscovered evt; + evt.eSize = sizeof(sHtEventCohNodeDiscovered); + evt.node = currentNode; + evt.link = currentLink; + evt.newNode = token; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_INFO, HT_EVENT_COH_NODE_DISCOVERED, @@ -527,12 +530,13 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohLinkExceed evt = {sizeof(sHtEventCohLinkExceed), - currentNode, - currentLink, - token, - pDat->NodesDiscovered, - pDat->nb->maxLinks}; + sHtEventCohLinkExceed evt; + evt.eSize = sizeof(sHtEventCohLinkExceed); + evt.node = currentNode; + evt.link = currentLink; + evt.targetNode = token; + evt.totalNodes = pDat->NodesDiscovered; + evt.maxLinks = pDat->nb->maxLinks; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_LINK_EXCEED, @@ -776,8 +780,9 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventCohNoTopology evt = {sizeof(sHtEventCohNoTopology), - pDat->NodesDiscovered}; + sHtEventCohNoTopology evt; + evt.eSize = sizeof(sHtEventCohNoTopology); + evt.totalNodes = pDat->NodesDiscovered; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_COH_NO_TOPOLOGY, @@ -840,7 +845,7 @@ */ void coherentInit(sMainData *pDat) { - int i, j; + u8 i, j; #ifdef HT_BUILD_NC_ONLY /* Replace discovery process with: @@ -912,7 +917,11 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHTEventNcohBusMaxExceed evt = {sizeof(sHTEventNcohBusMaxExceed), node, link, pDat->AutoBusCurrent}; + sHTEventNcohBusMaxExceed evt; + evt.eSize = sizeof(sHTEventNcohBusMaxExceed); + evt.node = node; + evt.link = link; + evt.bus = pDat->AutoBusCurrent; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_BUS_MAX_EXCEED,(u8 *)&evt); } @@ -927,7 +936,10 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohCfgMapExceed evt = {sizeof(sHtEventNcohCfgMapExceed), node, link}; + sHtEventNcohCfgMapExceed evt; + evt.eSize = sizeof(sHtEventNcohCfgMapExceed); + evt.node = node; + evt.link = link; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_NCOH_CFG_MAP_EXCEED, @@ -1049,11 +1061,12 @@ */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohLinkExceed evt = {sizeof(sHtEventNcohLinkExceed), - node, - link, - depth, - pDat->nb->maxLinks}; + sHtEventNcohLinkExceed evt; + evt.eSize = sizeof(sHtEventNcohLinkExceed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.maxLinks = pDat->nb->maxLinks; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR, HT_EVENT_NCOH_LINK_EXCEED, @@ -1097,8 +1110,13 @@ /* An error handler for the case where we run out of BUID's on a chain */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohBuidExceed evt = {sizeof(sHtEventNcohBuidExceed), - node, link, depth, (u8)currentBUID, (u8)unitIDcnt}; + sHtEventNcohBuidExceed evt; + evt.eSize = sizeof(sHtEventNcohBuidExceed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.currentBUID = (uint8)currentBUID; + evt.unitCount = (uint8)unitIDcnt; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_BUID_EXCEED,(u8 *)&evt); } @@ -1115,8 +1133,12 @@ /* An error handler for this critical error */ if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventNcohDeviceFailed evt = {sizeof(sHtEventNcohDeviceFailed), - node, link, depth, (u8)currentBUID}; + sHtEventNcohDeviceFailed evt; + evt.eSize = sizeof(sHtEventNcohDeviceFailed); + evt.node = node; + evt.link = link; + evt.depth = depth; + evt.attemptedBUID = (uint8)currentBUID; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_ERROR,HT_EVENT_NCOH_DEVICE_FAILED,(u8 *)&evt); } @@ -1138,7 +1160,11 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Provide information on automatic device results */ - sHtEventNcohAutoDepth evt = {sizeof(sHtEventNcohAutoDepth), node, link, (depth - 1)}; + sHtEventNcohAutoDepth evt; + evt.eSize = sizeof(sHtEventNcohAutoDepth); + evt.node = node; + evt.link = link; + evt.depth = (depth - 1); pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_INFO,HT_EVENT_NCOH_AUTO_DEPTH,(u8 *)&evt); } Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c 2008-07-17 19:44:08 UTC (rev 3424) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c 2008-07-17 19:50:37 UTC (rev 3425) @@ -401,7 +401,11 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Pass the node and link on which the generic synch flood event occurred. */ - sHtEventHWHtCrc evt = {sizeof(sHtEventHWHtCrc), node, link, (u8)crc}; + sHtEventHWHtCrc evt; + evt.eSize = sizeof(sHtEventHWHtCrc); + evt.node = node; + evt.link = link; + evt.laneMask = (uint8)crc; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_HW_FAULT, HT_EVENT_HW_HTCRC, @@ -414,7 +418,10 @@ if (pDat->HtBlock->AMD_CB_EventNotify) { /* Pass the node and link on which the generic synch flood event occurred. */ - sHtEventHWSynchFlood evt = {sizeof(sHtEventHWSynchFlood), node, link}; + sHtEventHWSynchFlood evt; + evt.eSize = sizeof(sHtEventHWSynchFlood); + evt.node = node; + evt.link = link; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_HW_FAULT, HT_EVENT_HW_SYNCHFLOOD, @@ -1112,8 +1119,6 @@ return 2; } STOP_HERE; /* This is an error internal condition */ - - return 0xFF; // make the compiler happy. } /**---------------------------------------------------------------------------------------- @@ -1143,8 +1148,6 @@ return 4; } STOP_HERE; /* This is an internal error condition */ - - return 0xFF; // make the compiler happy. } /**---------------------------------------------------------------------------------------- @@ -1468,10 +1471,11 @@ { if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventOptRequiredCap evt ={sizeof(sHtEventOptRequiredCap), - pDat->PortList[i].NodeID, - pDat->PortList[i].HostLink, - pDat->PortList[i].HostDepth}; + sHtEventOptRequiredCap evt; + evt.eSize = sizeof(sHtEventOptRequiredCap); + evt.node = pDat->PortList[i].NodeID; + evt.link = pDat->PortList[i].HostLink; + evt.depth = pDat->PortList[i].HostDepth; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_WARNING, HT_EVENT_OPT_REQUIRED_CAP_RETRY, @@ -1513,10 +1517,11 @@ { if (pDat->HtBlock->AMD_CB_EventNotify) { - sHtEventOptRequiredCap evt ={sizeof(sHtEventOptRequiredCap), - pDat->PortList[i].NodeID, - pDat->PortList[i].HostLink, - pDat->PortList[i].HostDepth}; + sHtEventOptRequiredCap evt; + evt.eSize = sizeof(sHtEventOptRequiredCap); + evt.node = pDat->PortList[i].NodeID; + evt.link = pDat->PortList[i].HostLink; + evt.depth = pDat->PortList[i].HostDepth; pDat->HtBlock->AMD_CB_EventNotify(HT_EVENT_CLASS_WARNING, HT_EVENT_OPT_REQUIRED_CAP_GEN3,

1 0

[v2] AMD Fam10 gart setting
by Marc Jones 17 Jul '08

17 Jul '08

GART table walk enable set. -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Add Fam10 Gart table walk enable recomended by the BKDG. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: coreboot-v2/src/cpu/amd/model_10xxx/defaults.h =================================================================== --- coreboot-v2.orig/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:08:42.000000000 -0600 +++ coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:10:19.000000000 -0600 @@ -46,6 +46,10 @@ 0xF << 19, 0x00000000, 0xF << 19, 0x00000000 }, /* [RtryHt[0..3]]=1 */ + { MC4_CTL_MASK, AMD_DR_ALL, AMD_PTYPE_ALL, + 0x1 << 10, 0x00000000, + 0x1 << 10, 0x00000000 }, /* [GartTblWkEn]=1 */ + { DC_CFG, AMD_DR_ALL, AMD_PTYPE_SVR, 0x00000000, 0x00000004, 0x00000000, 0x0000000C }, /* [REQ_CTR] = 1 for Server */

4 5

r3424 - trunk/coreboot-v2/src/cpu/amd/model_10xxx
by svn＠coreboot.org 17 Jul '08

17 Jul '08

Author: mjones Date: 2008-07-17 21:44:08 +0200 (Thu, 17 Jul 2008) New Revision: 3424 Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h Log: Add Fam10 Gart table walk enable for MCA reporting to match AMD example code. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Peter Stuge <peter(a)stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2008-07-16 21:09:31 UTC (rev 3423) +++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2008-07-17 19:44:08 UTC (rev 3424) @@ -46,6 +46,10 @@ 0xF << 19, 0x00000000, 0xF << 19, 0x00000000 }, /* [RtryHt[0..3]]=1 */ + { MC4_CTL_MASK, AMD_DR_ALL, AMD_PTYPE_ALL, + 0x1 << 10, 0x00000000, + 0x1 << 10, 0x00000000 }, /* [GartTblWkEn]=1 */ + { DC_CFG, AMD_DR_ALL, AMD_PTYPE_SVR, 0x00000000, 0x00000004, 0x00000000, 0x0000000C }, /* [REQ_CTR] = 1 for Server */

1 0

Re: [coreboot] Kolibri OS on SeaBIOS
by Myles Watson 17 Jul '08

17 Jul '08

On Wed, Jul 16, 2008 at 8:15 PM, Kevin O'Connor <kevin(a)koconnor.net> wrote: > On Wed, Jul 16, 2008 at 04:54:37PM -0600, Myles Watson wrote: >> Kevin, >> >> I wanted to test Kolibri OS (it uses the mouse without an extra >> driver), but it doesn't boot in hardware with SeaBIOS. It hangs after >> selecting the video mode and loading the whole CD. It boots in qemu, >> though. >> >> Another data point. > > Okay. Thanks for trying. I'll add this to the list of things to test > on my epia-m. The really frustrating part about this is it is very > hard to tell if these things are coreboot problems or seabios things. > > If you can pass on the seriallog it may reveal something. > Here's the log. Thanks, Myles

1 0

Trac reminder: list of new ticket(s)
by coreboot tracker 17 Jul '08

17 Jul '08

7 22

SeaBIOS mouse
by Myles Watson 17 Jul '08

17 Jul '08

Kevin, I'm still groping around in the dark here, but... When I leave the mouse enabled, I get no handle_74 messages, even when I wiggle the mouse. I get handle_09 (keyboard) messages, and it fails earlier when I press lots of keys. When that happens I get a buffer full in inhibit instead of enable. So I'm wondering why handle_74 never gets called. I don't see anything obvious. I tried to get handle_74 messages from qemu, and didn't see them there either. I'm hoping that this is at least part of the problem. Thanks, Myles

2 1

r3423 - trunk/coreboot-v2/src/northbridge/amd/amdht
by svn＠coreboot.org 16 Jul '08

16 Jul '08

Author: mjones Date: 2008-07-16 23:09:31 +0200 (Wed, 16 Jul 2008) New Revision: 3423 Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3ffeat.h trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c Log: Clean up comments, whitespace, and copyright date in the AMD HT code. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Marc Jones <marc.jones(a)amd.com> Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3ffeat.h =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/h3ffeat.h 2008-07-15 13:22:21 UTC (rev 3422) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/h3ffeat.h 2008-07-16 21:09:31 UTC (rev 3423) @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2007 Advanced Micro Devices, Inc. + * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c 2008-07-15 13:22:21 UTC (rev 3422) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/h3finit.c 2008-07-16 21:09:31 UTC (rev 3423) @@ -253,9 +253,9 @@ u8 predecessorNode, predecessorLink, currentPair; if (targetNode == 0) - return; // BSP has no predecessor, stop + return; /* BSP has no predecessor, stop */ - // Search for the link that connects targetNode to its predecessor + /* Search for the link that connects targetNode to its predecessor */ currentPair = 0; while (pDat->PortList[currentPair*2+1].NodeID != targetNode) { @@ -266,8 +266,8 @@ predecessorNode = pDat->PortList[currentPair*2].NodeID; predecessorLink = pDat->PortList[currentPair*2].Link; - // Recursively call self to ensure the route from the BSP to the Predecessor - // Node is established + /* Recursively call self to ensure the route from the BSP to the Predecessor */ + /* Node is established */ routeFromBSP(predecessorNode, actualTarget, pDat); pDat->nb->writeRoutingTable(predecessorNode, actualTarget, predecessorLink, pDat->nb); @@ -601,15 +601,15 @@ if (i != nodecnt) { - // Keep building the permutation + /* Keep building the permutation */ for (j = 0; j < nodecnt; j++) { - // Make sure the degree matches + /* Make sure the degree matches */ if (pDat->sysDegree[i] != pDat->dbDegree[j]) continue; - // Make sure that j hasn't been used yet (ought to use a "used" - // array instead, might be faster) + /* Make sure that j hasn't been used yet (ought to use a "used" */ + /* array instead, might be faster) */ for (k = 0; k < i; k++) { if (pDat->Perm[k] == j) @@ -623,7 +623,7 @@ } return FALSE; } else { - // Test to see if the permutation is isomorphic + /* Test to see if the permutation is isomorphic */ for (j = 0; j < nodecnt; j++) { for (k = 0; k < nodecnt; k++) @@ -685,7 +685,7 @@ { if (graphHowManyNodes(pSelected) == size) { - // Build Degree vector and Adjency Matrix for this entry + /* Build Degree vector and Adjency Matrix for this entry */ for (i = 0; i < size; i++) { pDat->dbDegree[i] = 0; @@ -703,7 +703,7 @@ } } if (isoMorph(0, pDat)) - break; // A matching topology was found + break; /* A matching topology was found */ } pTopologyList++; @@ -712,13 +712,13 @@ if (pSelected != NULL) { - // Compute the reverse Permutation + /* Compute the reverse Permutation */ for (i = 0; i < size; i++) { pDat->ReversePerm[pDat->Perm[i]] = i; } - // Start with the last discovered node, and move towards the BSP + /* Start with the last discovered node, and move towards the BSP */ for (i = size-1; i >= 0; i--) { for (j = 0; j < size; j++) @@ -1171,7 +1171,7 @@ for (link = 0; link < pDat->nb->maxLinks; link++) { if (pDat->HtBlock->AMD_CB_IgnoreLink && pDat->HtBlock->AMD_CB_IgnoreLink(node, link)) - continue; // Skip the link + continue; /* Skip the link */ if (node == 0 && link == compatLink) continue; @@ -1208,68 +1208,68 @@ u8 i, j; for (i = 0; i < pDat->TotalLinks*2; i += 2) { - ASSERT(pDat->PortList[i].Type < 2 && pDat->PortList[i].Link < pDat->nb->maxLinks); // Data validation - ASSERT(pDat->PortList[i+1].Type < 2 && pDat->PortList[i+1].Link < pDat->nb->maxLinks); // data validation - ASSERT(!(pDat->PortList[i].Type == PORTLIST_TYPE_IO && pDat->PortList[i+1].Type == PORTLIST_TYPE_CPU)); // ensure src is closer to the bsp than dst + ASSERT(pDat->PortList[i].Type < 2 && pDat->PortList[i].Link < pDat->nb->maxLinks); /* Data validation */ + ASSERT(pDat->PortList[i+1].Type < 2 && pDat->PortList[i+1].Link < pDat->nb->maxLinks); /* data validation */ + ASSERT(!(pDat->PortList[i].Type == PORTLIST_TYPE_IO && pDat->PortList[i+1].Type == PORTLIST_TYPE_CPU)); /* ensure src is closer to the bsp than dst */ /* Regang is false unless we pass all conditions below */ pDat->PortList[i].SelRegang = FALSE; pDat->PortList[i+1].SelRegang = FALSE; if ( (pDat->PortList[i].Type != PORTLIST_TYPE_CPU) || (pDat->PortList[i+1].Type != PORTLIST_TYPE_CPU)) - continue; // Only process cpu to cpu links + continue; /* Only process cpu to cpu links */ for (j = i+2; j < pDat->TotalLinks*2; j += 2) { if ( (pDat->PortList[j].Type != PORTLIST_TYPE_CPU) || (pDat->PortList[j+1].Type != PORTLIST_TYPE_CPU) ) - continue; // Only process cpu to cpu links + continue; /* Only process cpu to cpu links */ if (pDat->PortList[i].NodeID != pDat->PortList[j].NodeID) - continue; // Links must be from the same source + continue; /* Links must be from the same source */ if (pDat->PortList[i+1].NodeID != pDat->PortList[j+1].NodeID) - continue; // Link must be to the same target + continue; /* Link must be to the same target */ if ((pDat->PortList[i].Link & 3) != (pDat->PortList[j].Link & 3)) - continue; // Ensure same source base port + continue; /* Ensure same source base port */ if ((pDat->PortList[i+1].Link & 3) != (pDat->PortList[j+1].Link & 3)) - continue; // Ensure same destination base port + continue; /* Ensure same destination base port */ if ((pDat->PortList[i].Link & 4) != (pDat->PortList[i+1].Link & 4)) - continue; // Ensure sublink0 routes to sublink0 + continue; /* Ensure sublink0 routes to sublink0 */ - ASSERT((pDat->PortList[j].Link & 4) == (pDat->PortList[j+1].Link & 4)); // (therefore sublink1 routes to sublink1) + ASSERT((pDat->PortList[j].Link & 4) == (pDat->PortList[j+1].Link & 4)); /* (therefore sublink1 routes to sublink1) */ if (pDat->HtBlock->AMD_CB_SkipRegang && - pDat->HtBlock->AMD_CB_SkipRegang(pDat->PortList[i].NodeID, + pDat->HtBlock->AMD_CB_SkipRegang(pDat->PortList[i].NodeID, pDat->PortList[i].Link & 0x03, pDat->PortList[i+1].NodeID, pDat->PortList[i+1].Link & 0x03)) { - continue; // Skip regang + continue; /* Skip regang */ } - pDat->PortList[i].Link &= 0x03; // Force to point to sublink0 + pDat->PortList[i].Link &= 0x03; /* Force to point to sublink0 */ pDat->PortList[i+1].Link &= 0x03; - pDat->PortList[i].SelRegang = TRUE; // Enable link reganging + pDat->PortList[i].SelRegang = TRUE; /* Enable link reganging */ pDat->PortList[i+1].SelRegang = TRUE; pDat->PortList[i].PrvWidthOutCap = HT_WIDTH_16_BITS; pDat->PortList[i+1].PrvWidthOutCap = HT_WIDTH_16_BITS; pDat->PortList[i].PrvWidthInCap = HT_WIDTH_16_BITS; pDat->PortList[i+1].PrvWidthInCap = HT_WIDTH_16_BITS; - // Delete PortList[j, j+1], slow but easy to debug implementation + /* Delete PortList[j, j+1], slow but easy to debug implementation */ pDat->TotalLinks--; Amdmemcpy(&(pDat->PortList[j]), &(pDat->PortList[j+2]), sizeof(sPortDescriptor)*(pDat->TotalLinks*2-j)); Amdmemset(&(pDat->PortList[pDat->TotalLinks*2]), INVALID_LINK, sizeof(sPortDescriptor)*2); - ////High performance, but would make debuging harder due to 'shuffling' of the records - ////Amdmemcpy(PortList[TotalPorts-2], PortList[j], SIZEOF(sPortDescriptor)*2); - ////TotalPorts -=2; + /* //High performance, but would make debuging harder due to 'shuffling' of the records */ + /* //Amdmemcpy(PortList[TotalPorts-2], PortList[j], SIZEOF(sPortDescriptor)*2); */ + /* //TotalPorts -=2; */ - break; // Exit loop, advance to PortList[i+2] + break; /* Exit loop, advance to PortList[i+2] */ } } #endif /* HT_BUILD_NC_ONLY */ @@ -1400,14 +1400,14 @@ changes = FALSE; for (i = 0; i < pDat->TotalLinks*2; i++) { - if (pDat->PortList[i].Type != PORTLIST_TYPE_CPU) // Must be a CPU link + if (pDat->PortList[i].Type != PORTLIST_TYPE_CPU) /* Must be a CPU link */ continue; - if (pDat->PortList[i].Link < 4) // Only look for for sublink1's + if (pDat->PortList[i].Link < 4) /* Only look for for sublink1's */ continue; for (j = 0; j < pDat->TotalLinks*2; j++) { - // Step 1. Find the matching sublink0 + /* Step 1. Find the matching sublink0 */ if (pDat->PortList[j].Type != PORTLIST_TYPE_CPU) continue; if (pDat->PortList[j].NodeID != pDat->PortList[i].NodeID) @@ -1415,7 +1415,7 @@ if (pDat->PortList[j].Link != (pDat->PortList[i].Link & 0x03)) continue; - // Step 2. Check for an illegal frequency ratio + /* Step 2. Check for an illegal frequency ratio */ if (pDat->PortList[i].SelFrequency >= pDat->PortList[j].SelFrequency) { hiIndex = i; @@ -1430,65 +1430,65 @@ } if (hiFreq == loFreq) - break; // The frequencies are 1:1, no need to do anything + break; /* The frequencies are 1:1, no need to do anything */ downgrade = FALSE; if (hiFreq == 13) { - if ((loFreq != 7) && //{13, 7} 2400MHz / 1200MHz 2:1 - (loFreq != 4) && //{13, 4} 2400MHz / 600MHz 4:1 - (loFreq != 2) ) //{13, 2} 2400MHz / 400MHz 6:1 + if ((loFreq != 7) && /* {13, 7} 2400MHz / 1200MHz 2:1 */ + (loFreq != 4) && /* {13, 4} 2400MHz / 600MHz 4:1 */ + (loFreq != 2) ) /* {13, 2} 2400MHz / 400MHz 6:1 */ downgrade = TRUE; } else if (hiFreq == 11) { - if ((loFreq != 6)) //{11, 6} 2000MHz / 1000MHz 2:1 + if ((loFreq != 6)) /* {11, 6} 2000MHz / 1000MHz 2:1 */ downgrade = TRUE; } else if (hiFreq == 9) { - if ((loFreq != 5) && //{ 9, 5} 1600MHz / 800MHz 2:1 - (loFreq != 2) && //{ 9, 2} 1600MHz / 400MHz 4:1 - (loFreq != 0) ) //{ 9, 0} 1600MHz / 200Mhz 8:1 + if ((loFreq != 5) && /* { 9, 5} 1600MHz / 800MHz 2:1 */ + (loFreq != 2) && /* { 9, 2} 1600MHz / 400MHz 4:1 */ + (loFreq != 0) ) /* { 9, 0} 1600MHz / 200Mhz 8:1 */ downgrade = TRUE; } else if (hiFreq == 7) { - if ((loFreq != 4) && //{ 7, 4} 1200MHz / 600MHz 2:1 - (loFreq != 0) ) //{ 7, 0} 1200MHz / 200MHz 6:1 + if ((loFreq != 4) && /* { 7, 4} 1200MHz / 600MHz 2:1 */ + (loFreq != 0) ) /* { 7, 0} 1200MHz / 200MHz 6:1 */ downgrade = TRUE; } else if (hiFreq == 5) { - if ((loFreq != 2) && //{ 5, 2} 800MHz / 400MHz 2:1 - (loFreq != 0) ) //{ 5, 0} 800MHz / 200MHz 4:1 + if ((loFreq != 2) && /* { 5, 2} 800MHz / 400MHz 2:1 */ + (loFreq != 0) ) /* { 5, 0} 800MHz / 200MHz 4:1 */ downgrade = TRUE; } else if (hiFreq == 2) { - if ((loFreq != 0)) //{ 2, 0} 400MHz / 200MHz 2:1 + if ((loFreq != 0)) /* { 2, 0} 400MHz / 200MHz 2:1 */ downgrade = TRUE; } else { - downgrade = TRUE; // no legal ratios for hiFreq + downgrade = TRUE; /* no legal ratios for hiFreq */ } - // Step 3. Downgrade the higher of the two frequencies, and set nochanges to FALSE + /* Step 3. Downgrade the higher of the two frequencies, and set nochanges to FALSE */ if (downgrade) { - // Although the problem was with the port specified by hiIndex, we need to - // downgrade both ends of the link. - hiIndex = hiIndex & 0xFE; // Select the 'upstream' (i.e. even) port + /* Although the problem was with the port specified by hiIndex, we need to */ + /* downgrade both ends of the link. */ + hiIndex = hiIndex & 0xFE; /* Select the 'upstream' (i.e. even) port */ temp = pDat->PortList[hiIndex].CompositeFrequencyCap; - // Remove hiFreq from the list of valid frequencies - temp = temp & ~((u32)1 << hiFreq); + /* Remove hiFreq from the list of valid frequencies */ + temp = temp & ~((uint32)1 << hiFreq); ASSERT (temp != 0); - pDat->PortList[hiIndex].CompositeFrequencyCap = (u16)temp; - pDat->PortList[hiIndex+1].CompositeFrequencyCap = (u16)temp; + pDat->PortList[hiIndex].CompositeFrequencyCap = (uint16)temp; + pDat->PortList[hiIndex+1].CompositeFrequencyCap = (uint16)temp; for (k = 15; ; k--) { @@ -1503,7 +1503,7 @@ } } } - } while (changes); // Repeat until a valid configuration is reached + } while (changes); /* Repeat until a valid configuration is reached */ #endif /* HT_BUILD_NC_ONLY */ } @@ -1550,7 +1550,7 @@ u8 linkCount; u8 i; - // Traffic Distribution is only used when there are exactly two nodes in the system + /* Traffic Distribution is only used when there are exactly two nodes in the system */ if (pDat->NodesDiscovered+1 != 2) return; @@ -1568,7 +1568,7 @@ } ASSERT(linkCount != 0); if (linkCount == 1) - return; // Don't setup Traffic Distribution if only one link is being used + return; /* Don't setup Traffic Distribution if only one link is being used */ pDat->nb->writeTrafficDistribution(links01, links10, pDat->nb); #endif /* HT_BUILD_NC_ONLY */ Modified: trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c 2008-07-15 13:22:21 UTC (rev 3422) +++ trunk/coreboot-v2/src/northbridge/amd/amdht/h3ncmn.c 2008-07-16 21:09:31 UTC (rev 3423) @@ -333,10 +333,10 @@ linkBase = makeLinkBase(node, link); - // FN0_98/A4/C4 = LDT Type Register + /* FN0_98/A4/C4 = LDT Type Register */ AmdPCIRead(linkBase + HTHOST_LINK_TYPE_REG, &linkType); - // Verify LinkCon=1, InitComplete=1, NC=0, UniP-cLDT=0, LinkConPend=0 + /* Verify LinkCon=1, InitComplete=1, NC=0, UniP-cLDT=0, LinkConPend=0 */ return (linkType & HTHOST_TYPE_MASK) == HTHOST_TYPE_COHERENT; #else return 0; @@ -1111,10 +1111,9 @@ } else if (value == 4) { return 2; } - STOP_HERE; // This is an error internal condition + STOP_HERE; /* This is an error internal condition */ return 0xFF; // make the compiler happy. - } /**---------------------------------------------------------------------------------------- @@ -1143,7 +1142,7 @@ } else if (value == 2) { return 4; } - STOP_HERE; // This is an internal error condition + STOP_HERE; /* This is an internal error condition */ return 0xFF; // make the compiler happy. } @@ -1262,7 +1261,7 @@ AmdPCIReadBits(linkBase + HTHOST_FREQ_REV_REG, 31, 16, &temp); pDat->PortList[i].PrvFrequencyCap = (u16)temp & 0x7FFF - & nb->northBridgeFreqMask(pDat->PortList[i].NodeID, pDat->nb); // Mask off bit 15, reserved value + & nb->northBridgeFreqMask(pDat->PortList[i].NodeID, pDat->nb); /* Mask off bit 15, reserved value */ } else { @@ -1384,7 +1383,7 @@ ASSERT((temp >= HT_FREQUENCY_600M && temp <= HT_FREQUENCY_2600M) || (temp == HT_FREQUENCY_200M) || (temp == HT_FREQUENCY_400M)); AmdPCIWriteBits(linkBase + HTHOST_FREQ_REV_REG, 11, 8, &temp); - if (temp > HT_FREQUENCY_1000M) // Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz + if (temp > HT_FREQUENCY_1000M) /* Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz */ { /* Enable for Gen3 frequencies */ temp = 1;

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coreboot July 2008