coreboot July 2008

coreboot@coreboot.org

58 participants
214 discussions

superiotool: add dump support for Winbond (NSC) PC87427
by Tom Sylla 16 Jul '08

16 Jul '08

Add dump support for Winbond (NSC) PC87427. Dumps available from real hardware. Signed-off-by: Tom Sylla <tsylla(a)gmail.com> Index: nsc.c =================================================================== --- nsc.c (revision 3358) +++ nsc.c (working copy) @@ -408,6 +408,65 @@ {EOT}}}, {0xf2, "PC87427", { /* SRID[7..5] is marked as "not applicable for the PC87427". */ + {NOLDN, NULL, + {0x10,0x12,0x13,0x1d,0x20,0x21,0x22,0x23,0x24,0x25, + 0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f, + EOT}, + {0x00,0x00,0x00,0x00,0xf2,0x11,0xa0,MISC,MISC,MISC, + 0x02,NANA,0x00,MISC,0x00,0x00,MISC,MISC,RSVD,RSVD, + EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT}, + {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}}, + {0x2, "COM2", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}}, + {0x3, "COM1", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}}, + {0x4, "System wake-up control (SWC)", + {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x70, + 0x71,0x74,0x75,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x03,0x04,0x04,EOT}}, + {0x5, "Mouse", + {0x30,0x70,0x71,0x74,0x75,EOT}, + {0x00,0x0c,0x02,0x04,0x04,EOT}}, + {0x6, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0, + EOT}, + {0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40, + EOT}}, + {0x7, "GPIO", + {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1, + 0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC, + 0x01,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x9, "Fan Monitor and Control (FMC)", + {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1, + EOT}, + {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x19,0x06, + EOT}}, + {0xa, "Watchdog timer (WDT)", + {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}}, + {0xf, "X-Bus", + {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2, + 0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc, + 0xfd,0xfe,0xff,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x80,0x10,EOT}}, + {0x10, "Real-time clock (RTC)", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0, + 0xf1,0xf2,0xf3,0xf6,0xf7,EOT}, + {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00, + 0x00,0x00,0x00,MISC,0x00,EOT}}, + {0x14, "Health Monitoring and Control (HMC)", + {0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75, + 0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04, + 0x05,EOT}}, {EOT}}}, {0xf3, "PC87373", { {EOT}}}, Index: superiotool.h =================================================================== --- superiotool.h (revision 3358) +++ superiotool.h (working copy) @@ -51,7 +51,7 @@ #define NANA -3 /* Not Available */ #define RSVD -4 /* Reserved */ #define MISC -5 /* Needs special comment in output */ -#define MAXLDN 0x10 /* Biggest LDN */ +#define MAXLDN 0x14 /* Biggest LDN */ #define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */ #define MAXNUMIDX 170 /* Maximum number of indexes */ #define IDXSIZE (MAXNUMIDX + 1)

2 3

first date with coreboot
by Amrish Purohit 16 Jul '08

16 Jul '08

hi all, currently i am working as developer on linux plateform in a mnc in india. recently i have been asked to install coreboot in our machine and make necessary test. i have navigated the coreboot.org site but do not find any satisfactory document to start with. i have not enough knowledge of traditional bios or linuxbios. please help from where to start ? i want to know each and every aspect of the coreboot and if possible i want to contribute to coreboot development.so anybody can help with enough document to start with. Amrish purohit software engineer.

2 1

(GSoC__SCSI boot)GSOC Midterm survey and new problem(Vendor ID mismatch)
by Zhang Rui 16 Jul '08

16 Jul '08

Hello, Stefan First, the GSOC mid term evaluation comes. Please submit the mentor midterm survey for this "SCSI booting in coreboot" project. The timeline is July 7th to July 14th at 19:00 UTC. Refer to "Survey Information for Mentors with Students Assigned to Them" on http://groups.google.com/group/google-summer-of-code-announce/web/midterm-s… Thanks. Second, my process and problems: 2008/7/6 Zhang Rui <zrfail(a)gmail.com>: > Hello Stefan, > > 2008/6/25, Zhang Rui <zrfail(a)gmail.com>: >> 4. Where is the entrance call of util/x86emu in coreboot v3? >> There are several x86EMU_XXX function exported in e86emu.h. But they >> are called only in run_bios() in biosemu.c. I placed a printk at the >> beginning of run_bios() but it seems not executed. How does the codes >> in util/x86emu used? >> Where is the entrance call of util/x86emu in coreboot v3? Where should >> I place the code to extract LegacyBIOS to the memory? Should I write a >> new function and export it? >> >> Stefan, could you help me with this question? Thanks. >> > > I finally find that in arch/x86/, function pci_dev_init() called > run_bios() in util/x86emu. > The order is : > pci_dev_init > -->pci_rom_probe > -->run_bios(vm86.c/biosemu.c) > > my problem is: > in pci_rom_probe, most rom_address is 0 and return NULL; > only one rom_address is 0x c0000 but the rom_header->signature is 0 so > it also return NULL. > > So no run_bios is running. > > How can I get run_bios() running and test my code in it? > > Best regards. > > Zhang Rui > > > Here is the output of qemu: >[...] Now I find that there is something wrong with my vgabios-cirrus. I download it from www.coreboot.org by a browser and unzip it to "vgabios-cirrus". But actually it is only 14k. I added ".zip" to the file "vgabios-cirrus" and unzip it to "vgabios-cirrus.bin". And it works now. But new problem comes up: "Device or Vendor ID mismatch Vendor 0846, Device ec89" So run_bios() is not executed. Here is related source code: in device/pci_device.c, in function pci_dev_init() rom = pci_rom_probe(dev); if (rom == NULL) return; ram = pci_rom_load(dev, rom); if (ram == NULL) return; run_bios(dev, (unsigned long)ram); run_bios is called here. But before it is called, there are two "return" statement. And: in device/pci_rom.c, line 111~116, in function pci_rom_probe() if (dev->id.u.pci.vendor != rom_data->vendor || dev->id.u.pci.device != rom_data->device) { printk(BIOS_ERR, "Device or Vendor ID mismatch Vendor %04x, Device %04x\n", rom_data->vendor, rom_data->device); return NULL; } it returns NULL here. Maybe I should clear the code in pci_dev_init() and call modified run_bios() (or another function run_seabios() written by myself) directly? And then I could test my codes in the run_bios(). Best regards. Zhang Rui Here is the serial output by qemu: coreboot-3.0. Thu Jun 19 10:21:30 CST 2008 starting... Choosing fallback boot. LAR: Attempting to open 'fallback/initram/segment0'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: seen member normal/stage2/segment2 LAR: seen member normal/payload/segment0 LAR: seen member bootblock LAR: File not found! LAR: Run file fallback/initram/segment0 failed: No such file. Fallback failed. Try normal boot LAR: Attempting to open 'normal/initram/segment0'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: CHECK normal/initram/segment0 @ 0xfffc0400 start 0xfffc0450 len 432 reallen 432 compression 0 entry 0x00000042 loadaddress 0x00000000 Entry point is 0xfffc0492 RAM init code started. Nothing to do. printktest1: If the immediately preceding line does not say "Nothing to do.", then execution did not start at main() Trying absolute call from non-_MAINOBJECT XIP code. Absolute call successful. Done. run_file returns with 0 Done RAM init code LAR: Attempting to open 'normal/stage2/segment0'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: CHECK normal/stage2/segment0 @ 0xfffc0600 start 0xfffc0650 len 1 reallen 191792 compression 3 entry 0x00002000 loadaddress 0x0000a5c0 LAR: Compression algorithm #3 (zeroes) used LAR: Attempting to open 'normal/stage2/segment1'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: CHECK normal/stage2/segment1 @ 0xfffc0660 start 0xfffc06b0 len 15235 reallen 28424 compression 1 entry 0x00002000 loadaddress 0x00002000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/stage2/segment2'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: seen member normal/stage2/segment2 LAR: CHECK normal/stage2/segment2 @ 0xfffc4240 start 0xfffc4290 len 334 reallen 5548 compression 1 entry 0x00002000 loadaddress 0x00009000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/stage2/segment3'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: seen member normal/stage2/segment2 LAR: seen member normal/payload/segment0 LAR: seen member bootblock LAR: File not found! LAR: load_file: No such file 'normal/stage2/segment3' LAR: load_file_segments: All loaded, entry 0x00002000 Phase 1: Very early setup... Phase 1: done Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 0 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 0 initialized 0 Phase 2: Early setup... dev_phase2: dev root: ops 0x00009020 ops->phase2_setup_scan_bus 0x00000000 dev_phase2: dev cpus: ops 0x00000000 ops->phase2_setup_scan_bus 0x00000000 dev_phase2: dev pci_0_0: ops 0x00000000 ops->phase2_setup_scan_bus 0x00000000 dev_phase2: dev pci_1_0: ops 0x0000a500 ops->phase2_setup_scan_bus 0x00000000 dev_phase2: dev bus_0: ops 0x00000000 ops->phase2_setup_scan_bus 0x00000000 dev_phase2: dev domain_0: ops 0x0000a440 ops->phase2_setup_scan_bus 0x00000000 Phase 2: Done. Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 0 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 0 initialized 0 Phase 3: Enumerating buses... dev_phase3_scan: scanning root(Root Device) scan_static_bus for root (Root Device) cpus: Unknown device path type: 0 cpus() enabled dev_phase5: bus_0(PCI_BUS: 0000) missing ops domain_0(PCI_DOMAIN: 0000) enabled domain_0(PCI_DOMAIN: 0000) scanning... dev_phase3_scan: scanning domain_0(PCI_DOMAIN: 0000) pci_scan_bus start bus 0x00009a80, bus->dev 0x00009840 PCI: pci_scan_bus for bus 00 pci_scan_bus: old_devices 0x00009b40, dev for this bus 0x00009840 (domain_0) PCI: scan devfn 0x0 to 0xff PCI: devfn 0x0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 1 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 constructor: constructor is 0x00000000 No ops found and no constructor called for PCI: 8086:1237. find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 set_pci_ops: dev 0x0000a8ec(dynamic PCI: 00:00.0) set ops to 0x000090a0 PCI: 00:00.0 [PCI: 8086:1237] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000a8ec(dynamic PCI: 00:00.0) PCI: devfn 0x8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 2 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 constructor: constructor is 0x00000000 No ops found and no constructor called for PCI: 8086:7000. find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 set_pci_ops: dev 0x0000abd8(dynamic PCI: 00:01.0) set ops to 0x000090a0 PCI: 00:01.0 [PCI: 8086:7000] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000abd8(dynamic PCI: 00:01.0) PCI: devfn 0x9 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 3 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 find_device_operations: match constructor: constructor is 0x0000a500 default device constructor called set_pci_ops: dev 0x0000aec4(dynamic PCI: 00:01.1) already has ops 0x0000a500 PCI: 00:01.1 [PCI: 8086:7010] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000aec4(dynamic PCI: 00:01.1) PCI: devfn 0xa pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xa, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xb pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 4 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 constructor: constructor is 0x00000000 No ops found and no constructor called for PCI: 8086:7113. find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 set_pci_ops: dev 0x0000b1b0(dynamic PCI: 00:01.3) set ops to 0x000090a0 PCI: 00:01.3 [PCI: 8086:7113] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000b1b0(dynamic PCI: 00:01.3) PCI: devfn 0xc pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xc, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xd pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xd, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xe pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xe, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xf pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xf, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x10 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 5 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: match constructor: constructor is 0x000091c0 default device constructor called set_pci_ops: dev 0x0000b49c(dynamic PCI: 00:02.0) already has ops 0x000091c0 Init VGA device PCI: 00:02.0 [PCI: 1013:00b8] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000b49c(dynamic PCI: 00:02.0) PCI: devfn 0x18 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) new_device: devcnt 6 find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 constructor: constructor is 0x00000000 No ops found and no constructor called for PCI: 10ec:8029. find_device_operations: check all_device_operations[i] 0x000091c0 find_device_operations: cons 0x000091c0, cons id PCI: 1013:00b8 find_device_operations: check all_device_operations[i] 0x0000a440 find_device_operations: cons 0x0000a440, cons id PCI_DOMAIN: 8086:7190 find_device_operations: check all_device_operations[i] 0x0000a500 find_device_operations: cons 0x0000a500, cons id PCI: 8086:7010 set_pci_ops: dev 0x0000b788(dynamic PCI: 00:03.0) set ops to 0x000090a0 PCI: 00:03.0 [PCI: 10ec:8029] enabled PCI: pci_scan_bus pci_probe_dev returns dev 0x0000b788(dynamic PCI: 00:03.0) PCI: devfn 0x20 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x20, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x28 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x28, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x30 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x30, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x38 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x38, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x40 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x40, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x48 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x48, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x50 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x50, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x58 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x58, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x60 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x60, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x68 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x68, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x70 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x70, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x78 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x78, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x80 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x80, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x88 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x88, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x90 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x90, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0x98 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0x98, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xa0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xa0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xa8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xa8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xb0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xb0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xb8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xb8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xc0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xc0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xc8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xc8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xd0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xd0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xd8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xd8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xe0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xe0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xe8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xe8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xf0 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xf0, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: devfn 0xf8 pci_scan_get_dev: list is 0x0008fecc, *list is 0x00009b40 pci_scan_get_dev: check dev bus_0 pci_scan_get_dev: child bus_0(PCI_BUS: 0000) not a pci device: it's type 3 PCI: pci_scan_bus pci_scan_get_dev returns dev None (no dev in tree yet) PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus pci_probe_dev returns dev 0x00000000(None (not found)) PCI: Done for loop bus_0 ========== PCI: Left over static devices. ===================================== dev_phase3_scan: dynamic PCI: 00:00.0: busdevice 0x0000a8ec enabled 1 ops 0x000090a0 dev_phase3_scan: can not scan from here, returning 0 dev_phase3_scan: dynamic PCI: 00:01.0: busdevice 0x0000abd8 enabled 1 ops 0x000090a0 dev_phase3_scan: can not scan from here, returning 0 dev_phase3_scan: dynamic PCI: 00:01.1: busdevice 0x0000aec4 enabled 1 ops 0x0000a500 dev_phase3_scan: can not scan from here, returning 0 dev_phase3_scan: dynamic PCI: 00:01.3: busdevice 0x0000b1b0 enabled 1 ops 0x000090a0 dev_phase3_scan: can not scan from here, returning 0 dev_phase3_scan: dynamic PCI: 00:02.0: busdevice 0x0000b49c enabled 1 ops 0x000091c0 dev_phase3_scan: can not scan from here, returning 0 dev_phase3_scan: dynamic PCI: 00:03.0: busdevice 0x0000b788 enabled 1 ops 0x000090a0 dev_phase3_scan: can not scan from here, returning 0 PCI: pci_scan_bus returning with max=000 dev_phase3_scan: returning 0 scan_static_bus for root(Root Device) done dev_phase3_scan: returning 0 Phase 3: Done. Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 0 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:00.0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:01.0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:01.3(PCI: 00:01.3): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:02.0(PCI: 00:02.0): enabled 1 have_resources 0 initialized 0 dynamic PCI: 00:03.0(PCI: 00:03.0): enabled 1 have_resources 0 initialized 0 Phase 4: Allocating resources... Phase 4: Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 read_resources: root(Root Device) read_resources bus 0 link: 0 read_resources: root(Root Device) dtsname cpus have_resources 0 enabled 1 cpus: Unknown device path type: 0 read_resources: cpus() missing phase4_read_resources read_resources: root(Root Device) dtsname domain_0 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) read_resources bus 0 link: 0 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:00.0 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:01.0 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:01.1 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:01.3 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:02.0 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) dtsname dynamic PCI: 00:03.0 have_resources 0 enabled 1 read_resources: domain_0(PCI_DOMAIN: 0000) read_resources bus 0 link: 0 done read_resources: root(Root Device) read_resources bus 0 link: 0 done PCI: 00:03.0 10 * [0x00000400 - 0x000004ff] io PCI: 00:01.1 20 * [0x00000800 - 0x0000080f] io Root Device compute_allocate_io: base: 00000810 size: 00000410 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 read_resources: root(Root Device) read_resources bus 0 link: 0 read_resources: root(Root Device) dtsname cpus have_resources 0 enabled 1 cpus: Unknown device path type: 0 read_resources: cpus() missing phase4_read_resources read_resources: root(Root Device) dtsname domain_0 have_resources 1 enabled 1 read_resources: root(Root Device) read_resources bus 0 link: 0 done PCI: 00:02.0 10 * [0x00000000 - 0x01ffffff] prefmem PCI: 00:02.0 14 * [0x02000000 - 0x02000fff] mem Root Device compute_allocate_mem: base: 02001000 size: 02001000 align: 25 gran: 0 done Phase 4: Done reading resources. Allocating VGA resource PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Phase 4: Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000410 align: 8 gran: 0 read_resources: root(Root Device) read_resources bus 0 link: 0 read_resources: root(Root Device) dtsname cpus have_resources 0 enabled 1 cpus: Unknown device path type: 0 read_resources: cpus() missing phase4_read_resources read_resources: root(Root Device) dtsname domain_0 have_resources 1 enabled 1 read_resources: root(Root Device) read_resources bus 0 link: 0 done PCI: 00:03.0 10 * [0x00001000 - 0x000010ff] io PCI: 00:01.1 20 * [0x00001400 - 0x0000140f] io Root Device compute_allocate_io: base: 00001410 size: 00000410 align: 8 gran: 0 done Root Device compute_allocate_mem: base: fc000000 size: 02001000 align: 25 gran: 0 read_resources: root(Root Device) read_resources bus 0 link: 0 read_resources: root(Root Device) dtsname cpus have_resources 0 enabled 1 cpus: Unknown device path type: 0 read_resources: cpus() missing phase4_read_resources read_resources: root(Root Device) dtsname domain_0 have_resources 1 enabled 1 read_resources: root(Root Device) read_resources bus 0 link: 0 done PCI: 00:02.0 10 * [0xfc000000 - 0xfdffffff] prefmem PCI: 00:02.0 14 * [0xfe000000 - 0xfe000fff] mem Root Device compute_allocate_mem: base: fe001000 size: 02001000 align: 25 gran: 0 done root(Root Device) assign_resources, bus 0 link: 0 Adding RAM resource (134217728 bytes) domain_0(PCI_DOMAIN: 0000) assign_resources, bus 0 link: 0 PCI: 00:01.1 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io PCI: 00:02.0 10 <- [0x00fc000000 - 0x00fdffffff] size 0x02000000 gran 0x19 prefmem PCI: 00:02.0 14 <- [0x00fe000000 - 0x00fe000fff] size 0x00001000 gran 0x0c mem PCI: 00:03.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io domain_0(PCI_DOMAIN: 0000) assign_resources, bus 0 link: 0 root(Root Device) assign_resources, bus 0 link: 0 Phase 4: Done setting resources. Phase 4: Done allocating resources. Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 0 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:00.0(PCI: 00:00.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.3(PCI: 00:01.3): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:02.0(PCI: 00:02.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:03.0(PCI: 00:03.0): enabled 1 have_resources 1 initialized 0 Phase 5: Enabling resources... cpus: Unknown device path type: 0 dev_phase5: cpus() missing ops pci_dev_enable_resources: dynamic PCI: 00:00.0 (PCI: 00:00.0) cmd <- 140 pci_dev_enable_resources: dynamic PCI: 00:01.0 (PCI: 00:01.0) cmd <- 147 pci_dev_enable_resources: dynamic PCI: 00:01.1 (PCI: 00:01.1) cmd <- 141 pci_dev_enable_resources: dynamic PCI: 00:01.3 (PCI: 00:01.3) cmd <- 140 pci_dev_enable_resources: dynamic PCI: 00:02.0 (PCI: 00:02.0) cmd <- 143 pci_dev_enable_resources: dynamic PCI: 00:03.0 (PCI: 00:03.0) cmd <- 141 Phase 5: Done. Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 0 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 0 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:00.0(PCI: 00:00.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.3(PCI: 00:01.3): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:02.0(PCI: 00:02.0): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:03.0(PCI: 00:03.0): enabled 1 have_resources 1 initialized 0 Phase 6: Initializing devices... Phase 6: Root Device init. Phase 6: PCI: 00:01.0 init. Enabling IDE channel 1 Enabling IDE channel 2 Enabling Legacy IDE Phase 6: PCI: 00:00.0 init. PCI: pci_dev_init Probing for option ROM Phase 6: PCI: 00:01.0 init. PCI: pci_dev_init Probing for option ROM Phase 6: PCI: 00:01.1 init. Enabling IDE channel 1 Enabling IDE channel 2 Enabling Legacy IDE Phase 6: PCI: 00:01.3 init. PCI: pci_dev_init Probing for option ROM Phase 6: PCI: 00:02.0 init. PCI: pci_dev_init Probing for option ROM ROM address for PCI: 00:02.0 = c0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8a00, data ptr 0x736f PCI ROM Image, Vendor 0846, Device ec89, Device or Vendor ID mismatch Vendor 0846, Device ec89 Phase 6: PCI: 00:03.0 init. PCI: pci_dev_init Probing for option ROM Phase 6: Devices initialized. Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 1 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 1 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:00.0(PCI: 00:00.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.3(PCI: 00:01.3): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:02.0(PCI: 00:02.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:03.0(PCI: 00:03.0): enabled 1 have_resources 1 initialized 1 LAR: Attempting to open 'normal/option_table'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: CHECK normal/option_table @ 0xfffc0000 start 0xfffc0050 len 932 reallen 932 compression 0 entry 0x00000000 loadaddress 0x00000000 search_global_resources: mask 4200 type 4200 search_global_resources: dev root, have_resources 0 #resources 2 search_global_resources: dev cpus, have_resources 0 #resources 0 search_global_resources: dev pci_0_0, have_resources 0 #resources 0 search_global_resources: dev pci_1_0, have_resources 0 #resources 0 search_global_resources: dev bus_0, have_resources 0 #resources 0 search_global_resources: dev domain_0, have_resources 1 #resources 3 search_global_resources: dev domain_0, resource 0, flags 40040100 base 0x0 size 0x0 search_global_resources: dev domain_0, resource 1, flags 40040200 base 0x0 size 0x0 search_global_resources: dev domain_0, resource 2, flags e0004200 base 0x0 size 0x8000000 lb_memory_range: start 0x0 size 0x8000000 search_global_resources: dev dynamic PCI: 00:00.0, have_resources 1 #resources 0 search_global_resources: dev dynamic PCI: 00:01.0, have_resources 1 #resources 0 search_global_resources: dev dynamic PCI: 00:01.1, have_resources 1 #resources 1 search_global_resources: dev dynamic PCI: 00:01.1, resource 0, flags 60000100 base 0x1400 size 0x10 search_global_resources: dev dynamic PCI: 00:01.3, have_resources 1 #resources 0 search_global_resources: dev dynamic PCI: 00:02.0, have_resources 1 #resources 2 search_global_resources: dev dynamic PCI: 00:02.0, resource 0, flags 60001200 base 0xfc000000 size 0x2000000 search_global_resources: dev dynamic PCI: 00:02.0, resource 1, flags 60000200 base 0xfe000000 size 0x1000 search_global_resources: dev dynamic PCI: 00:03.0, have_resources 1 #resources 1 search_global_resources: dev dynamic PCI: 00:03.0, resource 0, flags 60000100 base 0x1000 size 0x100 lb_cleanup_memory_ranges: # entries 1 #0: base 0x00000000 size 0x8000000 lb_memory_range: start 0x0 size 0x500 lb_cleanup_memory_ranges: # entries 2 #0: base 0x00000500 size 0x7fffb00 #1: base 0x00000000 size 0x500 lb_memory_range: start 0xf0000 size 0x0 lb_cleanup_memory_ranges: # entries 4 #0: base 0x00000000 size 0x500 #1: base 0x00000500 size 0xefb00 #2: base 0x000f0000 size 0x7f10000 #3: base 0x000f0000 size 0x0 Wrote coreboot table at: 0x00000500 - 0x00000a74 checksum 8380 Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 1 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 pci_0_0(PCI: 00:00.0): enabled 1 have_resources 0 initialized 0 pci_1_0(PCI: 00:01.0): enabled 1 have_resources 0 initialized 1 bus_0(PCI_BUS: 0000): enabled 1 have_resources 0 initialized 0 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:00.0(PCI: 00:00.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.3(PCI: 00:01.3): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:02.0(PCI: 00:02.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:03.0(PCI: 00:03.0): enabled 1 have_resources 1 initialized 1 Stage2 code done. LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: seen member normal/stage2/segment2 LAR: seen member normal/payload/segment0 LAR: CHECK normal/payload/segment0 @ 0xfffc43e0 start 0xfffc4430 len 20753 reallen 65536 compression 1 entry 0x000f66e0 loadaddress 0x000f0000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/payload/segment1'. LAR: Start 0xfffc0000 len 0x40000 LAR: seen member normal/option_table LAR: seen member normal/initram/segment0 LAR: seen member normal/stage2/segment0 LAR: seen member normal/stage2/segment1 LAR: seen member normal/stage2/segment2 LAR: seen member normal/payload/segment0 LAR: seen member bootblock LAR: File not found! LAR: load_file: No such file 'normal/payload/segment1' LAR: load_file_segments: All loaded, entry 0x000f66e0 Start bios post address:000f7ad7bios_table_addr: 0x000ff0a5 end=0x000ff841 ram_size=0x08000000 Scan for VGA option rom Running option rom at 000c0003 BIOS - begin e820 map has 5 items: 0: 0000000000000000 - 000000000009fc00 = 1 1: 000000000009fc00 - 00000000000a0000 = 2 2: 00000000000a0000 - 00000000000f0000 = 1 3: 00000000000f0000 - 0000000000100000 = 2 4: 0000000000100000 - 0000000008000000 = 1 ata0-0: PCHS=203/16/63 translation=none LCHS=203/16/63 ata0 master: QEMU HARDDISK ATA-7 Hard-Disk (100 MBytes) IDE time out ata1 master: QEMU CD-ROM ATAPI-4 CD-Rom/DVD-Rom IDE time out Scan for option roms post address:000f7ad7Press F12 for boot menu. enter handle_19: NULL Booting from Floppy... fail floppy_fail: a=00000201 b=00000000 c=00000001 d=00000000 si=00000000 di=00000000 ds=00000000 es=000007c0 ip=0000e81b cs=0000f000 f=00000002 r=0000f6dc Boot failed: could not read the boot disk enter handle_18: NULL Booting from CD-Rom... ata_is_ready returned 65535 CDROM boot failure code : 00000003 Boot failed: could not read the boot disk enter handle_18: NULL Booting from Hard Disk... Booting from 00000000:00007c00 fail floppy_1300: a=00000000 b=00000e70 c=00000000 d=00000300 si=000001c2 di=00002a20 ds=00009b00 es=00007000 ip=000007da cs=00009b00 f=00000246 r=0000afda fail get_device: a=00001500 b=00000e70 c=00000000 d=00000381 si=000001c2 di=00002a20 ds=00009000 es=00009000 ip=00000033 cs=00009020 f=00000246 r=0000afda fail get_device: a=00001500 b=00010008 c=00000000 d=534d1881 si=0000ff63 di=000000a0 ds=00009fc0 es=00009000 ip=000001c7 cs=00009020 f=00000246 r=0000afda enter handle_11: a=00009000 b=0001e6f5 c=00000000 d=534d1881 si=0000e6ff di=000000aa ds=00009000 es=00009000 ip=00000223 cs=00009020 f=00000286 r=0000afda

2 8

Sony VAIO Laptop PCG-F680K
by Sean Nelson 16 Jul '08

16 Jul '08

outputs and other data files for the F680K laptop ~ Sean Nelson

1 0

Super IO: NSC PC97338
by Sean Nelson 15 Jul '08

15 Jul '08

Hi, I have a Sony VAIO Laptop, PCG-F680K. It has a P3-700, 440BX, PIIX4, and the titled Super IO. The main problem I'm finding from supporting coreboot on the laptop is the SuperIO doesn't use Plug-and-Play LDNs. What is the suggested course of action for writing support? The Super IO controls Power Up/Down of the chip, Floppy, Serial, and Parallel Port. It does have some PnP support for IRQs and DMA. ~Sean Nelson <snelson(a)nmt.edu> PS. I've spent a few days playing around with coreboot and the registers for the PC97338.

1 0

r3422 - trunk/coreboot-v2/src/cpu/intel/model_6xx
by svn＠coreboot.org 15 Jul '08

15 Jul '08

Author: uwe Date: 2008-07-15 15:22:21 +0200 (Tue, 15 Jul 2008) New Revision: 3422 Modified: trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c Log: Add missing Intel CPU (trivial). Tested by me on actual hardware. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c =================================================================== --- trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c 2008-07-12 00:03:26 UTC (rev 3421) +++ trunk/coreboot-v2/src/cpu/intel/model_6xx/model_6xx_init.c 2008-07-15 13:22:21 UTC (rev 3422) @@ -44,6 +44,7 @@ .init = model_6xx_init, }; static struct cpu_device_id cpu_table[] = { + { X86_VENDOR_INTEL, 0x0652 }, { X86_VENDOR_INTEL, 0x0665 }, /* Celeron (Mendocino) */ { X86_VENDOR_INTEL, 0x0672 }, { X86_VENDOR_INTEL, 0x0673 },

1 0

Re: [coreboot] NEOWARE EON 4000S
by Uwe Hermann 15 Jul '08

15 Jul '08

On Mon, Jul 14, 2008 at 05:25:24PM +0200, Hannes Hegewald wrote: > Great, the irqpoll option did it!! Can we do something to make it work > even without the irqpoll option? Maybe creating a new irq_table.c ?! I > will also run getpir once more and compare the two files. Yep, please do. If you want to hack on this you can also checkout http://www.coreboot.org/Creating_Valid_IRQ_Tables which may be useful for manually figuring out the IRQs in case the table in svn is not correct. > The minicom log is attached. > > Hannes. > > > > coreboot-2.0.0.0Normal Fr 11. Jul 18:12:37 CEST 2008 starting... > Setting up default parameters for memory > Sizing memory > Probing for DIMM0 > Found DIMM0 > Page Size: 00001000 > Component Banks: 4 > Module Banks: 2 > DIMM size: 08000000 > Probing for DIMM1 > MC_BANK_CFG = 00705520 > Copying coreboot to RAM. > Jumping to coreboot. > coreboot-2.0.0.0Normal Fr 11. Jul 18:20:47 CEST 2008 booting... > end 56bd01c6, start 0 > 32-bit delta 464 > calibrate_tsc 32-bit result is 464 > clocks_per_usec: 464 > Enumerating buses... > scan_static_bus for Root Device > northbridge.c:enable_dev() > DEVICE_PATH_PCI_DOMAIN > Finding PCI configuration type. > PCI: Using configuration type 1 > PCI_DOMAIN: 0000 enabled > PCI_DOMAIN: 0000 scanning... > PCI: pci_scan_bus for bus 00 > northbridge.c:enable_dev() > device path type 2 > PCI: 00:00.0 [1078/0001] ops > PCI: 00:00.0 [1078/0001] enabled > PCI: devfn 0x8, bad id 0xffffffff > PCI: devfn 0x10, bad id 0xffffffff > PCI: devfn 0x18, bad id 0xffffffff > PCI: devfn 0x20, bad id 0xffffffff > PCI: devfn 0x28, bad id 0xffffffff > PCI: devfn 0x30, bad id 0xffffffff > PCI: devfn 0x38, bad id 0xffffffff > PCI: devfn 0x40, bad id 0xffffffff > PCI: devfn 0x48, bad id 0xffffffff > PCI: devfn 0x50, bad id 0xffffffff > PCI: devfn 0x58, bad id 0xffffffff > PCI: devfn 0x60, bad id 0xffffffff > PCI: devfn 0x68, bad id 0xffffffff > PCI: devfn 0x70, bad id 0xffffffff > PCI: 00:0f.0 [10ec/8139] enabled > PCI: devfn 0x80, bad id 0xffffffff > PCI: devfn 0x88, bad id 0xffffffff > PCI: 00:12.0 [1078/0100] bus ops > PCI: 00:12.0 [1078/0100] enabled > PCI: 00:12.1 [1078/0101] disabled > PCI: 00:12.2 [1078/0102] bus ops > PCI: 00:12.2 [1078/0102] enabled > PCI: 00:12.3 [1078/0103] enabled > PCI: 00:12.4 [1078/0104] ops > PCI: 00:12.4 [1078/0104] enabled > PCI: devfn 0x95, bad id 0xffffffff > PCI: devfn 0x96, bad id 0xffffffff > PCI: devfn 0x97, bad id 0xffffffff > PCI: 00:13.0 [0e11/a0f8] enabled > PCI: devfn 0xa0, bad id 0xffffffff > PCI: devfn 0xa8, bad id 0xffffffff > PCI: devfn 0xb0, bad id 0xffffffff > PCI: devfn 0xb8, bad id 0xffffffff > PCI: devfn 0xc0, bad id 0xffffffff > PCI: devfn 0xc8, bad id 0xffffffff > PCI: devfn 0xd0, bad id 0xffffffff > PCI: devfn 0xd8, bad id 0xffffffff > PCI: devfn 0xe0, bad id 0xffffffff > PCI: devfn 0xe8, bad id 0xffffffff > PCI: devfn 0xf0, bad id 0xffffffff > PCI: devfn 0xf8, bad id 0xffffffff > scan_static_bus for PCI: 00:12.0 > malloc Enter, size 1100, free_mem_ptr 0001a000 > malloc 0x0001a000 > PNP: 002e.0 disabled > PNP: 002e.1 enabled > PNP: 002e.2 enabled > PNP: 002e.e enabled > PNP: 002e.4 enabled > PNP: 002e.5 enabled > PNP: 002e.6 enabled > PNP: 002e.7 enabled > PNP: 002e.8 enabled > PNP: 002e.3 enabled > scan_static_bus for PCI: 00:12.0 done > scan_static_bus for PCI: 00:12.2 > scan_static_bus for PCI: 00:12.2 done > PCI: pci_scan_bus returning with max=000 > scan_static_bus for Root Device done > done > Allocating resources... > Reading resources... > Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 > Root Device read_resources bus 0 link: 0 > northbridge.c:pci_domain_read_resources() > PCI_DOMAIN: 0000 read_resources bus 0 link: 0 > PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done > Root Device read_resources bus 0 link: 0 done > PCI: 00:0f.0 10 * [0x00000400 - 0x000004ff] io > PCI: 00:12.2 20 * [0x00000800 - 0x0000087f] io > Root Device compute_allocate_io: base: 00000880 size: 00000480 align: 8 gran: 0 done > Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 > Root Device read_resources bus 0 link: 0 > Root Device read_resources bus 0 link: 0 done > PCI: 00:12.4 10 * [0x00000000 - 0x00000fff] mem > PCI: 00:13.0 10 * [0x00001000 - 0x00001fff] mem > PCI: 00:0f.0 14 * [0x00002000 - 0x000020ff] mem > PCI: 00:12.3 10 * [0x00003000 - 0x0000307f] mem > Root Device compute_allocate_mem: base: 00003080 size: 00003080 align: 12 gran: 0 done > Done reading resources. > Setting resources... > Root Device compute_allocate_io: base: 00001000 size: 00000480 align: 8 gran: 0 > Root Device read_resources bus 0 link: 0 > Root Device read_resources bus 0 link: 0 done > PCI: 00:0f.0 10 * [0x00001000 - 0x000010ff] io > PCI: 00:12.2 20 * [0x00001400 - 0x0000147f] io > Root Device compute_allocate_io: base: 00001480 size: 00000480 align: 8 gran: 0 done > Root Device compute_allocate_mem: base: febfc000 size: 00003080 align: 12 gran: 0 > Root Device read_resources bus 0 link: 0 > Root Device read_resources bus 0 link: 0 done > PCI: 00:12.4 10 * [0xfebfc000 - 0xfebfcfff] mem > PCI: 00:13.0 10 * [0xfebfd000 - 0xfebfdfff] mem > PCI: 00:0f.0 14 * [0xfebfe000 - 0xfebfe0ff] mem > PCI: 00:12.3 10 * [0xfebff000 - 0xfebff07f] mem > Root Device compute_allocate_mem: base: febff080 size: 00003080 align: 12 gran: 0 done > Root Device assign_resources, bus 0 link: 0 > BC_DRAM_TOP = 0x07dfffff > MC_GBASE_ADD = 0x000000fc > I would set ram size to 126 Mbytes > PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 > PCI: 00:0f.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io > PCI: 00:0f.0 14 <- [0x00febfe000 - 0x00febfe0ff] size 0x00000100 gran 0x08 mem > PCI: 00:12.2 20 <- [0x0000001400 - 0x000000147f] size 0x00000080 gran 0x07 io > PCI: 00:12.3 10 <- [0x00febff000 - 0x00febff07f] size 0x00000080 gran 0x07 mem > PCI: 00:12.4 10 <- [0x00febfc000 - 0x00febfcfff] size 0x00001000 gran 0x0c mem > PCI: 00:13.0 10 <- [0x00febfd000 - 0x00febfdfff] size 0x00001000 gran 0x0c mem > PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 > Root Device assign_resources, bus 0 link: 0 > Done setting resources. > Done allocating resources. > Enabling resources... > PCI: 00:00.0 cmd <- 07 > PCI: 00:0f.0 subsystem <- 00/00 > PCI: 00:0f.0 cmd <- 03 > PCI: 00:12.0 cmd <- 0f > PNP: 002e.e missing enable_resources > PCI: 00:12.2 cmd <- 01 > PCI: 00:12.3 subsystem <- 00/00 > PCI: 00:12.3 cmd <- 02 > PCI: 00:12.4 cmd <- 02 > PCI: 00:13.0 subsystem <- 00/00 > PCI: 00:13.0 cmd <- 02 > done. > Initializing devices... > Root Device init > PCI: 00:00.0 init > northbridge: northbridge_init() > Calling enable_cache() > PCI: 00:0f.0 init > PCI: 00:12.0 init > PNP: 002e.1 init > PNP: 002e.2 init > PNP: 002e.4 init > PNP: 002e.5 init > PNP: 002e.6 init > Keyboard init... > PNP: 002e.7 init > PNP: 002e.8 init > PCI: 00:12.2 init > Primary IDE interface enabled > Secondary IDE interface disabled > PCI: 00:12.3 init > PCI: 00:12.4 init > Setting up video mode 640x480 with 31500000 Hz clock > PCI: 00:13.0 init > PNP: 002e.3 init > Devices initialized > Copying IRQ routing tables to 0xf0000...done. > Verifing copy of IRQ routing tables at 0xf0000...done > Checking IRQ routing table consistency... > check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 > done. > PIR Entry 0 Dev/Fn: 7 Slot: 1 > INT: A link: 2 bitmap: deb8 IRQ: 3 > INT: B link: 3 bitmap: deb8 IRQ: 4 > INT: C link: 4 bitmap: deb8 IRQ: 5 > INT: D link: 1 bitmap: deb8 IRQ: 7 > PIR Entry 1 Dev/Fn: F Slot: 2 > INT: A link: 3 bitmap: deb8 IRQ: 4 > INT: B link: 4 bitmap: deb8 IRQ: 5 > INT: C link: 1 bitmap: deb8 IRQ: 7 > INT: D link: 2 bitmap: deb8 IRQ: 3 > Assigning IRQ 4 to 0:f.0 > Readback = 4 > pci_level_irq: current ints are 0x0 > pci_level_irq: try to set ints 0x10 > PIR Entry 2 Dev/Fn: 13 Slot: 0 > INT: A link: 1 bitmap: deb8 IRQ: 7 > INT: B link: 0 bitmap: deb8 not routed > INT: C link: 0 bitmap: deb8 not routed > INT: D link: 0 bitmap: deb8 not routed > Assigning IRQ 7 to 0:13.0 > Readback = 7 > pci_level_irq: current ints are 0x10 > pci_level_irq: try to set ints 0x90 > PIRQ1: 7 > PIRQ2: 3 > PIRQ3: 4 > PIRQ4: 5 > Moving GDT to 0x500...ok > Adjust low_table_end from 0x00000530 to 0x00001000 > Adjust rom_table_end from 0x000f0400 to 0x00100000 > Wrote coreboot table at: 00000530 - 00000748 checksum e10a > > Welcome to elfboot, the open sourced starter. > January 2002, Eric Biederman. > Version 1.3 > > rom_stream: 0xfffc0000 - 0xfffcffff > Found ELF candidate at offset 0 > header_offset is 0 > Try to load at offset 0x0 > malloc Enter, size 32, free_mem_ptr 0001a44c > malloc 0x0001a44c > New segment addr 0x100000 size 0x33ae0 offset 0xc0 filesize 0xa648 > (cleaned up) New segment addr 0x100000 size 0x33ae0 offset 0xc0 filesize 0xa648 > lb: [0x0000000000004000, 0x000000000001e000) > malloc Enter, size 32, free_mem_ptr 0001a46c > malloc 0x0001a46c > New segment addr 0x133ae0 size 0x48 offset 0xa720 filesize 0x48 > (cleaned up) New segment addr 0x133ae0 size 0x48 offset 0xa720 filesize 0x48 > lb: [0x0000000000004000, 0x000000000001e000) > Dropping non PT_LOAD segment > Dropping non PT_LOAD segment > Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000033ae0 filesz: 0x000000000000a648 > [ 0x0000000000100000, 000000000010a648, 0x0000000000133ae0) <- 00000000000000c0 > Clearing Segment: addr: 0x000000000010a648 memsz: 0x0000000000029498 > Loading Segment: addr: 0x0000000000133ae0 memsz: 0x0000000000000048 filesz: 0x0000000000000048 > [ 0x0000000000133ae0, 0000000000133b28, 0x0000000000133b28) <- 000000000000a720 > Loaded segments > verified segments > closed down stream > Jumping to boot code at 0x10854c > entry = 0x0010854c > lb_start = 0x00004000 > lb_size = 0x0001a000 > adjust = 0x07de2000 > buffer = 0x07dcc000 > elf_boot_notes = 0x00014140 > adjusted_boot_notes = 0x07df6140 > FILO version 0.5.5 (root@zendeb) Fri Jul 11 18:19:27 CEST 2008 > boot: hda1:/boot/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 irqpoll > hda: LBA 80GB: MAXTOR 6L080J4 > Mounted EXT2 filesystem > Found Linux version 2.6.24.4 (root@crux) #2 SMP Fri May 23 11:56:57 CEST 2008 bzImage. > Loading kernel... ok > Jumping to entry point... > Linux version 2.6.24.4 (root@crux) (gcc version 4.2.4 (CRUX)) #2 SMP Fri May 23 11:56:57 CEST 2008 > BIOS-provided physical RAM map: > BIOS-e820: 0000000000001000 - 00000000000a0000 (usable) > BIOS-e820: 0000000000100000 - 0000000007e00000 (usable) > 126MB LOWMEM available. > Zone PFN ranges: > DMA 0 -> 4096 > Normal 4096 -> 32256 > Movable zone start PFN for each node > early_node_map[1] active PFN ranges > 0: 0 -> 32256 > DMI not present or invalid. > Allocating PCI resources starting at 10000000 (gap: 07e00000:f8200000) > Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32004 > Kernel command line: root=/dev/hda1 console=tty0 console=ttyS0,115200 irqpoll > Misrouted IRQ fixup and polling support enabled > This may significantly impact system performance > No local APIC present or hardware disabled > Initializing CPU#0 > PID hash table entries: 512 (order: 9, 2048 bytes) > Detected 300.677 MHz processor. > Console: colour dummy device 80x25 > console [tty0] enabled > console [ttyS0] enabled > Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) > Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) > Memory: 123264k/129024k available (2644k kernel code, 5260k reserved, 888k data, 208k init, 0k highmem) > virtual kernel memory layout: > fixmap : 0xfffb5000 - 0xfffff000 ( 296 kB) > vmalloc : 0xc8800000 - 0xfffb3000 ( 887 MB) > lowmem : 0xc0000000 - 0xc7e00000 ( 126 MB) > .init : 0xc047a000 - 0xc04ae000 ( 208 kB) > .data : 0xc03950d0 - 0xc04732f4 ( 888 kB) > .text : 0xc0100000 - 0xc03950d0 (2644 kB) > Checking if this processor honours the WP bit even in supervisor mode... Ok. > Calibrating delay using timer specific routine.. 626.79 BogoMIPS (lpj=1253584) > Mount-cache hash table entries: 512 > Working around Cyrix MediaGX virtual DMA bugs. > Enable Memory-Write-back mode on Cyrix/NSC processor. > Enable Memory access reorder on Cyrix/NSC processor. > Enable Incrementor on Cyrix/NSC processor. > Compat vDSO mapped to ffffe000. > Checking 'hlt' instruction... OK. > SMP alternatives: switching to UP code > Freeing SMP alternatives: 14k freed > ACPI: Core revision 20070126 > ACPI Exception (tbxface-0629): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126] > ACPI: Unable to load the System Description Tables > CPU0: NSC Geode(TM) Integrated Processor by National Semi stepping 02 > SMP motherboard not detected. > Local APIC not detected. Using dummy APIC emulation. > Brought up 1 CPUs > net_namespace: 64 bytes > NET: Registered protocol family 16 > EISA bus registered > PCI: Using configuration type 1 > Setting up standard PCI resources > ACPI: Interpreter disabled. > Linux Plug and Play Support v0.97 (c) Adam Belay > pnp: PnP ACPI: disabled > SCSI subsystem initialized > PCI: Probing PCI hardware > PCI: Using IRQ router NatSemi [1078/0100] at 0000:00:12.0 > Time: tsc clocksource has been installed. > NET: Registered protocol family 2 > IP route cache hash table entries: 1024 (order: 0, 4096 bytes) > TCP established hash table entries: 4096 (order: 3, 32768 bytes) > TCP bind hash table entries: 4096 (order: 3, 32768 bytes) > TCP: Hash tables configured (established 4096 bind 4096) > TCP reno registered > microcode: CPU0 not a capable Intel processor > IA-32 Microcode Update Driver: v1.14a <tigran(a)aivazian.fsnet.co.uk> > JFS: nTxBlock = 964, nTxLock = 7712 > SGI XFS with ACLs, security attributes, realtime, large block numbers, no debug enabled > SGI XFS Quota Management subsystem > io scheduler noop registered > io scheduler deadline registered (default) > PCI: Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x10) > isapnp: Scanning for PnP cards... > isapnp: No Plug & Play device found > Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled > serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A > serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A > RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize > loop: module loaded > Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 > ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx > CS5530: IDE controller (0x1078:0x0102 rev 0x00) at PCI slot 0000:00:12.2 > CS5530: not 100% native mode: will probe irqs later > ide0: BM-DMA at 0x1400-0x1407, BIOS settings: hda:pio, hdb:pio > ide1: BM-DMA at 0x1408-0x140f, BIOS settings: hdc:pio, hdd:pio > Clocksource tsc unstable (delta = -161502172 ns) > Time: pit clocksource has been installed. > hda: MAXTOR 6L080J4, ATA DISK drive > hda: UDMA/33 mode selected > ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 > hda: max request size: 128KiB > hda: 156355584 sectors (80054 MB) w/1819KiB Cache, CHS=65535/16/63 > hda: cache flushes supported > hda: hda1 hda2 hda3 > Driver 'sd' needs updating - please use bus_type methods > Driver 'sr' needs updating - please use bus_type methods > Fusion MPT base driver 3.04.06 > Copyright (c) 1999-2007 LSI Corporation > Fusion MPT SPI Host driver 3.04.06 > PNP: No PS/2 controller found. Probing ports directly. > serio: i8042 KBD port at 0x60,0x64 irq 1 > serio: i8042 AUX port at 0x60,0x64 irq 12 > mice: PS/2 mouse device common for all mice > EISA: Probing bus 0 at eisa.0 > Cannot allocate resource for EISA slot 1 > EISA: Detected 0 cards. > TCP cubic registered > NET: Registered protocol family 1 > NET: Registered protocol family 17 > Using IPI No-Shortcut mode > kjournald starting. Commit interval 5 seconds > EXT3-fs: mounted filesystem with ordered data mode. > VFS: Mounted root (ext3 filesystem) readonly. > Freeing unused kernel memory: 208k freed > INIT: version 2.86 booting > The system is coming up. Please wait. > 8139too Fast Ethernet driver 0.9.28 > PCI: Found IRQ 5 for device 0000:00:0f.0 > IRQ routing conflict for 0000:00:0f.0, have irq 4, want irq 5 > eth0: RealTek RTL8139 at 0xc88a4000, 00:e0:c5:6e:52:16, IRQ 4 > usbcore: registered new interface driver usbfs > usbcore: registered new interface driver hub > usbcore: registered new device driver usb > 8139cp: 10/100 PCI Ethernet driver v1.3 (Mar 22, 2004) > PCI: Found IRQ 3 for device 0000:00:13.0 > IRQ routing conflict for 0000:00:13.0, have irq 7, want irq 3 > ohci_hcd 0000:00:13.0: OHCI Host Controller > ohci_hcd 0000:00:13.0: new USB bus registered, assigned bus number 1 > ohci_hcd 0000:00:13.0: irq 7, io mem 0xfebfd000 > usb usb1: configuration #1 chosen from 1 choice > hub 1-0:1.0: USB hub found > hub 1-0:1.0: 2 ports detected > /dev/hda1 has gone 25809 days without being checked, check forced. > /sbin/fsck.xfs: XFS file system. > EXT3 FS on hda1, internal journal > XFS mounting filesystem hda2 > Adding 265064k swap on /dev/hda3. Priority:-1 extents:1 across:265064k > hostname: crux > font: default > keyboard: de-latin1 > INIT: Entering runlevel: 2 > starting services: sysklogd net fcron sshd samba led > > > CRUX (crux) (ttyS0) > > crux login: root > Password: Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 1

Re: [coreboot] how could i get the hexadecimal content in memory ataddress FFFF0000-FFFFFFF0?
by Joseph Smith 15 Jul '08

15 Jul '08

> -----Original Message----- > From: Star Liu [mailto:minxinjianxin@gmail.com] > Sent: Monday, July 14, 2008 7:29 PM > To: joe(a)settoplinux.org > Subject: Re: [coreboot] how could i get the hexadecimal content in memory > ataddress FFFF0000-FFFFFFF0? > > On Mon, Jul 14, 2008 at 8:09 PM, <joe(a)settoplinux.org> wrote: > >> Then you can use xxd or hexdump -C > > > > I use dd with hexdump -C, it works pretty good. > thank you! but could give me some information of what are xxd, hexdump > and dd? which packages should i install? > Oh, sorry. That only works for physical memory addresses not virtual memory. But it looks something like this: # dd if=/dev/port bs=1 skip=$[0x0800] count=128 | hexdump -C Where skip=$[0x0800] is the start address and count=128 is the size. Hexdump just outputs the data into human readable format. See the dd and hexdump manpage for more info, I hope that helps. Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

1 0

how could i get the hexadecimal content in memory at address FFFF0000-FFFFFFF0?
by Star Liu 15 Jul '08

15 Jul '08

I know from cpu manual that when machine starts, it executes instruction at FFFFFFF0, and then execute some code at FFFF0000-FFFFFFF0, i hope i can get these machine code directly from my memory, any tool to help me display the hexadecimal or binary content? thanks! -- Regards! Star Shanghai, China

3 6

[Fwd: Re: [patch][v2] cs5536 usb port4 configuration - new v3 patch]
by Marc Jones 15 Jul '08

15 Jul '08

And the v3 version. -------- Original Message -------- Subject: Re: [coreboot] [patch][v2] cs5536 usb port4 configuration - new v3 patch Date: Thu, 05 Jun 2008 17:32:12 -0600 From: Marc Jones <marc.jones(a)amd.com> To: ron minnich <rminnich(a)gmail.com> CC: Coreboot <coreboot(a)coreboot.org> References: <4846EB4A.3040602(a)amd.com> <13426df10806041719s550fc46er37ec243832d7d6e3(a)mail.gmail.com> ron minnich wrote: > neat. > > Do you want to do that for v3? I like it. > > :-) > > ron > > As you wish. :) Builds but not tested on a platform. Can you try it on the dbe62? Thanks, Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Correctly access MMIO for cs5536 USB port4 configuration. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: coreboot-v3/southbridge/amd/cs5536/cs5536.c =================================================================== --- coreboot-v3.orig/southbridge/amd/cs5536/cs5536.c 2008-06-05 15:37:05.000000000 -0600 +++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-06-05 16:12:54.000000000 -0600 @@ -395,19 +395,18 @@ } } -/* the /sizeof(u32) is to convert byte offsets into u32 offsets */ -#define HCCPARAMS (0x08/sizeof(u32)) -#define IPREG04 (0xA0/sizeof(u32)) -#define USB_HCCPW_SET (1 << 1) +#define HCCPARAMS 0x08 +#define IPREG04 0xA0 +#define USB_HCCPW_SET (1 << 1) #define UOCCAP 0x00 #define APU_SET (1 << 15) -#define UOCMUX (0x04/sizeof(u32)) +#define UOCMUX 0x04 #define PMUX_HOST 0x02 #define PMUX_DEVICE 0x03 #define PUEN_SET (1 << 2) -#define UDCDEVCTL (0x404/sizeof(u32)) +#define UDCDEVCTL 0x404 #define UDC_SD_SET (1 << 10) -#define UOCCTL (0x0C/sizeof(u32)) +#define UOCCTL 0x0C #define PADEN_SET (1 << 7) /** @@ -417,7 +416,7 @@ */ static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb) { - u32 *bar; + u8 *bar; struct msr msr; struct device *dev; @@ -432,41 +431,42 @@ /* Write to clear diag register. */ wrmsr(USB2_SB_GLD_MSR_DIAG, rdmsr(USB2_SB_GLD_MSR_DIAG)); - bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); + bar = (u8 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); /* Make HCCPARAMS writable. */ - *(bar + IPREG04) |= USB_HCCPW_SET; + writel(readl(bar + IPREG04) | USB_HCCPW_SET, bar + IPREG04); /* EECP=50h, IST=01h, ASPC=1 */ - *(bar + HCCPARAMS) = 0x00005012; + writel(0x00005012, bar + HCCPARAMS); } dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OTG, 0); if (dev) { - bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); + bar = (u8 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); - printk(BIOS_DEBUG, "UOCMUX is %x\n", *(bar + UOCMUX)); + printk(BIOS_DEBUG, "UOCMUX is %x\n", readl(bar + UOCMUX)); - *(bar + UOCMUX) &= PUEN_SET; + writel(readl(bar + UOCMUX) & PUEN_SET, bar + UOCMUX); /* Host or Device? */ if (sb->enable_USBP4_device) - *(bar + UOCMUX) |= PMUX_DEVICE; + writel(readl(bar + UOCMUX) | PMUX_DEVICE, bar + UOCMUX); else - *(bar + UOCMUX) |= PMUX_HOST; + writel(readl(bar + UOCMUX) | PMUX_HOST, bar + UOCMUX); /* Overcurrent configuration */ - printk(BIOS_DEBUG, "UOCCAP is %x\n", *(bar + UOCCAP)); + printk(BIOS_DEBUG, "UOCCAP is %x\n", readl(bar + UOCCAP)); if (sb->enable_USBP4_overcurrent) - *(bar + UOCCAP) |= sb->enable_USBP4_overcurrent; + writel(readl(bar + UOCCAP) + | sb->enable_USBP4_overcurrent, bar + UOCCAP); + /* power control. see comment in the dts for these bits */ if (sb->pph) { - *(bar + UOCCAP) &= ~0xff; - *(bar + UOCCAP) |= sb->pph; + writel((readl(bar + UOCCAP) & ~0xff) | sb->pph, bar + UOCCAP); } - printk(BIOS_DEBUG, "UOCCAP is %x\n", *(bar + UOCCAP)); - printk(BIOS_DEBUG, "UOCMUX is %x\n", *(bar + UOCMUX)); + printk(BIOS_DEBUG, "UOCCAP is %x\n", readl(bar + UOCCAP)); + printk(BIOS_DEBUG, "UOCMUX is %x\n", readl(bar + UOCMUX)); } @@ -480,20 +480,20 @@ dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_UDC, 0); if (dev) { - bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); - *(bar + UDCDEVCTL) |= UDC_SD_SET; + bar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); + writel(readl(bar + UDCDEVCTL) | UDC_SD_SET, bar + UDCDEVCTL); } dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OTG, 0); if (dev) { - bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); - *(bar + UOCCTL) |= PADEN_SET; - *(bar + UOCCAP) |= APU_SET; + bar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); + writel(readl(bar + UOCCTL) | PADEN_SET, bar + UOCCTL); + writel(readl(bar + UOCCAP) | APU_SET, bar + UOCCAP); } } - printk(BIOS_DEBUG, "UOCCTL is %x\n", *(bar + UOCCTL)); + printk(BIOS_DEBUG, "UOCCTL is %x\n", readl(bar + UOCCTL)); /* Disable virtual PCI UDC and OTG headers. The kernel never * sees a header for this device. It used to provide an OS

3 7

← Newer
1
...
8
9
10
11
12
13
14
...
22
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot July 2008