On Fri, Jul 11, 2008 at 07:56:44PM +0200, Hannes Hegewald wrote:
>> I've posted a patch under a new topic (CC'd you), please report if it
>> works, and if it does reply with an email saying
>> Acked-by: Hannes Hegewald <hanneshe(a)arcor.de>
>> If you could post a serial bootlog (use e.g. minicom) that would be
>> great. We should also set up a status page for the board in the wiki,
>> if you have some time could you test all kinds of hardware parts?
>> Check for instance http://www.coreboot.org/BCOM_WINNET100_Build_Tutorial
>> for the items in the status table which can be checked...
>> Thanks, Uwe.
> I built an image an flashed it. Unfortunately the boot process stops.
> The good thing is that I made myself an null modem cable and got two
> detailed bootlogs for you. One with the factury bios and the coreboot
> one. I also took a closer look at the mainboard once more, but I did not
> found a ASI or BCOM tag .. I assume i'ts ASI anyway.
OK, thanks. The first (coreboot) log seems corrupted somehow, can you
repost that? (maybe a mailer issue, dunno)
Which message do you see last when using coreboot? Which payload did you
use and in which configuration? I assume FILO and you want to boot
> LILO Loading CRUX......................................
> BIOS data check successful
> Linux version 18.104.22.168 (root@crux) (gcc version 4.2.4 (CRUX)) #2 SMP Fri May 23 11:56:57 CEST 2008
> BIOS-provided physical RAM map:
> BIOS-e820: 0000000000000000 - 00000000000a0000 (usable)
> BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
> BIOS-e820: 0000000000100000 - 0000000003d80000 (usable)
> BIOS-e820: 00000000ffff0000 - 0000000100000000 (reserved)
> 61MB LOWMEM available.
> Zone PFN ranges:
> DMA 0 -> 4096
> Normal 4096 -> 15744
> Movable zone start PFN for each node
> early_node_map active PFN ranges
> 0: 0 -> 15744
> DMI 2.2 present.
> Allocating PCI resources starting at 10000000 (gap: 03d80000:fc270000)
> Built 1 zonelists in Zone order, mobility grouping on. Total pages: 15621
> Kernel command line: auto BOOT_IMAGE=CRUX rw root=301 console=tty0 console=ttyS0,9600n8
> No local APIC present or hardware disabled
> Initializing CPU#0
> PID hash table entries: 256 (order: 8, 1024 bytes)
> Detected 300.690 MHz processor.
> Console: colour VGA+ 80x25
> console [tty0] enabled
> console [ttyS0] enabled
> Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
> Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
> Memory: 57940k/62976k available (2644k kernel code, 4632k reserved, 888k data, 208k init, 0k highmem)
> virtual kernel memory layout:
> fixmap : 0xfffb5000 - 0xfffff000 ( 296 kB)
> vmalloc : 0xc4800000 - 0xfffb3000 ( 951 MB)
> lowmem : 0xc0000000 - 0xc3d80000 ( 61 MB)
> .init : 0xc047a000 - 0xc04ae000 ( 208 kB)
> .data : 0xc03950d0 - 0xc04732f4 ( 888 kB)
> .text : 0xc0100000 - 0xc03950d0 (2644 kB)
> Checking if this processor honours the WP bit even in supervisor mode... Ok.
> Calibrating delay using timer specific routine.. 609.22 BogoMIPS (lpj=1218442)
> Mount-cache hash table entries: 512
> Working around Cyrix MediaGX virtual DMA bugs.
> Enable Memory-Write-back mode on Cyrix/NSC processor.
> Enable Memory access reorder on Cyrix/NSC processor.
> Enable Incrementor on Cyrix/NSC processor.
> Compat vDSO mapped to ffffe000.
> Checking 'hlt' instruction... OK.
> SMP alternatives: switching to UP code
> Freeing SMP alternatives: 14k freed
> ACPI: Core revision 20070126
> ACPI Exception (tbxface-0629): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables 
> ACPI: Unable to load the System Description Tables
> CPU0: NSC Geode(TM) Integrated Processor by National Semi stepping 02
> SMP motherboard not detected.
> Local APIC not detected. Using dummy APIC emulation.
> Brought up 1 CPUs
> net_namespace: 64 bytes
> NET: Registered protocol family 16
> EISA bus registered
> PCI: PCI BIOS revision 2.10 entry at 0xfb1e0, last bus=0
> PCI: Using configuration type 1
> Setting up standard PCI resources
> ACPI: Interpreter disabled.
> Linux Plug and Play Support v0.97 (c) Adam Belay
> pnp: PnP ACPI: disabled
> SCSI subsystem initialized
> PCI: Probing PCI hardware
> PCI: Using IRQ router NatSemi [1078/0100] at 0000:00:12.0
> Time: tsc clocksource has been installed.
> NET: Registered protocol family 2
> IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
> TCP established hash table entries: 2048 (order: 2, 16384 bytes)
> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
> TCP: Hash tables configured (established 2048 bind 2048)
> TCP reno registered
> microcode: CPU0 not a capable Intel processor
> IA-32 Microcode Update Driver: v1.14a <tigran(a)aivazian.fsnet.co.uk>
> JFS: nTxBlock = 452, nTxLock = 3623
> SGI XFS with ACLs, security attributes, realtime, large block numbers, no debug enabled
> SGI XFS Quota Management subsystem
> io scheduler noop registered
> io scheduler deadline registered (default)
> isapnp: Scanning for PnP cards...
> isapnp: No Plug & Play device found
> Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled
> serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
> RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
> loop: module loaded
> Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
> ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
> CS5530: IDE controller (0x1078:0x0102 rev 0x00) at PCI slot 0000:00:12.2
> CS5530: not 100% native mode: will probe irqs later
> ide0: BM-DMA at 0xf000-0xf007, BIOS settings: hda:DMA, hdb:pio
> ide1: BM-DMA at 0xf008-0xf00f, BIOS settings: hdc:pio, hdd:pio
> Clocksource tsc unstable (delta = 669093067 ns)
> Time: pit clocksource has been installed.
> hda: MAXTOR 6L080J4, ATA DISK drive
> hda: UDMA/33 mode selected
> ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
> hda: max request size: 128KiB
> hda: 156355584 sectors (80054 MB) w/1819KiB Cache, CHS=65535/16/63
> hda: cache flushes supported
> hda: hda1 hda2 hda3
> Driver 'sd' needs updating - please use bus_type methods
> Driver 'sr' needs updating - please use bus_type methods
> Fusion MPT base driver 3.04.06
> Copyright (c) 1999-2007 LSI Corporation
> Fusion MPT SPI Host driver 3.04.06
> PNP: No PS/2 controller found. Probing ports directly.
> serio: i8042 KBD port at 0x60,0x64 irq 1
> mice: PS/2 mouse device common for all mice
> input: AT Translated Set 2 keyboard as /class/input/input0
> EISA: Probing bus 0 at eisa.0
> EISA: Detected 0 cards.
> TCP cubic registered
> NET: Registered protocol family 1
> NET: Registered protocol family 17
> Using IPI No-Shortcut mode
> kjournald starting. Commit interval 5 seconds
> EXT3 FS on hda1, internal journal
> EXT3-fs: mounted filesystem with ordered data mode.
> VFS: Mounted root (ext3 filesystem).
> Freeing unused kernel memory: 208k freed
> INIT: version 2.86 booting
> The system is coming up. Please wait.
> 8139too Fast Ethernet driver 0.9.28
> PCI: Assigned IRQ 11 for device 0000:00:0f.0
> eth0: RealTek RTL8139 at 0xc4854000, 00:e0:c5:6e:55:93, IRQ 11
> usbcore: registered new interface driver usbfs
> usbcore: registered new interface driver hub
> usbcore: registered new device driver usb
> PCI: Assigned IRQ 15 for device 0000:00:13.0
> ohci_hcd 0000:00:13.0: OHCI Host Controller
> ohci_hcd 0000:00:13.0: new USB bus registered, assigned bus number 1
> ohci_hcd 0000:00:13.0: irq 15, io mem 0xd8004000
> 8139cp: 10/100 PCI Ethernet driver v1.3 (Mar 22, 2004)
> usb usb1: configuration #1 chosen from 1 choice
> hub 1-0:1.0: USB hub found
> hub 1-0:1.0: 2 ports detected
> /dev/hda1: clean, 115552/541728 files, 638097/1054257 blocks
> /sbin/fsck.xfs: XFS file system.
> EXT3 FS on hda1, internal journal
> XFS mounting filesystem hda2
> Adding 265064k swap on /dev/hda3. Priority:-1 extents:1 across:265064k
> hostname: crux
> font: default
> keyboard: de-latin1
> INIT: Entering runlevel: 2
> starting services: sysklogd net fcron sshd samba led
> CRUX (crux) (ttyS0)
> crux login: root
> Last login: Fri Jul 11 16:21:07 +0200 2008 on ttyS0.
> No mail.
> Groot@crux:~ # halt
> Broadcast message from root (ttyS0) (Fri Jul 11 17:31:15 2008):
> The system is going downINIT: Sending processes the TERM signal
> root@crux:~ # INThe system is coming down. Please wait.
> System halted.
http://www.hermann-uwe.de | http://www.holsham-traders.dehttp://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Since about 2002-2003 this has always been ADLO with Bochs BIOS,
but now there seems to be more development activity on
Warning: This repeats some verbiage from a post dated 2008/07/07
concerning MS Windows XP Embedded booted via coreboot.
The ADLO web page:
This page doesn't seem to have been updated in years. I recall
seeing messages on the list saying that people have been able
to boot both MS Windows XP and MS Windows Vista in addition to
the originally supported MS Windows 2000, OpenBSD and Grub/Lilo.
Booting Windows using coreboot:
This page is obviously more up to date and even links to the
This page seems to suggest that SeaBIOS only works under qemu,
but I think it should work on any coreboot supported board to
the extant that VGABIOS supports the video controller or a
commercial VGA BIOS is used with coreboot.
Can someone please clarify the recommended procedure for
booting MS Windows via coreboot?
-- XP Embedded related question --
In the above referenced post, I asked the same question,
except specifically relating to booting "MS Windows
XP Embedded" via coreboot. Has anyone done this yet?
I'm referring to the componentized version of XP Embedded,
usually referred to as "XPe":
It seems that booting XP Embedded should be no different
from booting regular XP as long as all modules required
for booting are selected. So booting XP Embedded via
coreboot should work fine, depending on the payloads used.
[I believe you intended this to go to the list as well. Please use the
"reply all" button in your mailer. Thanks.]
On 10.07.2008 00:22, Philip Aston wrote:
> On Wed, 2008-07-09 at 16:00 +0200, Carl-Daniel Hailfinger wrote:
>> Hi Philip,
>> On 09.07.2008 13:14, Philip Aston wrote:
>>> I have MS6178 ver 1.1, supported board, noted as not working on Linux. I can
>>> only get it working reliably with Knoppix although Debian Etch has worked
>>> intermittently. Embedded VGA... does that complicate things?
>> I don't have the board in question, but if it has problems running Linux
>> under the factory BIOS, probably something is wrong with the hardware.
> Thank you for your very prompt reply, Carl-Daniel
> Probably true, worth a try I believe because googling "MS6178 Linux"
> revealed "News - coreboot
> Linux has never been able to run on this board until now. .... Thanks to
> Uwe Hermann we now have preliminary support for the MSI MS-6178
> mainboard." (Sep07). Nothing to lose anyway.
Ah, that piece of news referred to the Thomson IP1000, a set-top box.
>>> I'm an intermediate user finding detail on the readme within Coreboot
>>> download difficult to understand. My chip is soldered and I'll have to
>>> reflash in situ, not worried about that because
>>> 1 without linux the board is useless
>>> 2 might be able to retrieve original image (which I have saved) from
>> Actually, the "boot block recovery" will not work if flashrom misbehaves
>> or coreboot does not work.
>>> Can I build the .rom on another box? Is there a way to build using a live cd
>>> or do I have to reinstall etch?
>> You can build the .rom on another box, it's even recommended to do so.
>>> And very important, is this too ambitious for someone who needs to ask these
>>> questions? Thank you.
>> Well, having a soldered flash is certainly increasing the risk beyond
>> what I'd recommend. A top hat flash override might work in case of
>> problems, but I wouldn't bet on it.
> The Howto was specific to a different mobo but it translated into mine
> with few headaches, except advice to place lilo.elf in / was incorrect
> in my case, dialogue indicated that it should be in /tmp and that
Yes, that's a peculiarity of the default configuration.
> So I have compiled a coreboot.rom, same size as my factory bios; but
> uniflash gives "verification failed" (not exact wording). What causes
> this error message please?
AFAIK uniflash checks for a factory BIOS signature/checksum. Since
coreboot has its own checksum mechanism, uniflash fails to recognize
that. It would be interesting to measure voltages of a few pins of the
ROM during a BIOS update of the factory BIOS. That could help to find
out what flashrom needs to do to flash this board.
Uwe (in CC of this mail) has worked on this board and should know more.
I have no idea if this helps. But there's been discussion of "DRAM
settings in DTS" and "where does CARBASE go" and so on, so I think we
need to try to document some rules. Here is a first cut.
#35: Make it possible to boot Windows using coreboot
Reporter: uwe | Owner:
Type: enhancement | Status: new
Priority: critical | Milestone: Going mainstream
Component: adlo | Version:
Resolution: | Keywords:
Dependencies: | Patchstatus: there is no patch
See also http://www.coreboot.org/SeaBIOS for a new (and actively
developed) payload which is intended to allow booting Windows, *BSD, and
other payloads which require legacy BIOS calls.
Ticket URL: <http://tracker.linuxbios.org/trac/coreboot/ticket/35#comment:9>