coreboot June 2008

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r3360 build service
by coreboot information 03 Jun '08

03 Jun '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "stuge" checked in revision 3360 to the coreboot source repository and caused the following changes: Change Log: Ward writes: SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3360&device=epia-cn&vendor… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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r3360 - trunk/util/flashrom
by svn＠coreboot.org 03 Jun '08

03 Jun '08

Author: stuge Date: 2008-06-03 02:22:00 +0200 (Tue, 03 Jun 2008) New Revision: 3360 Modified: trunk/util/flashrom/flashchips.c Log: Ward writes: SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-05-28 08:40:23 UTC (rev 3359) +++ trunk/util/flashrom/flashchips.c 2008-06-03 00:22:00 UTC (rev 3360) @@ -95,7 +95,7 @@ {"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040}, {"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_UNTESTED, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, {"SST", "SST49LF080A", SST_ID, SST_49LF080A, 1024, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, + {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"ST", "M25P05-A", ST_ID, ST_M25P05A, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"ST", "M25P10-A", ST_ID, ST_M25P10A, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"ST", "M25P20", ST_ID, ST_M25P20, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},

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EFI / Tiano Engineer Needed
by Daniel Shufelt 03 Jun '08

03 Jun '08

Hi Everyone! It's not my intention to detract from the purpose of this list rest assured I'll only submit this inquiry once. If you have an interest please contact me directly off the list. I have a client located near Portland Oregon (not Intel) who is looking to bring on a Senior EFI developer who has experience leveraging the Tiano framework. I would be happy to provide a job description and company information to any interested parties. This is a great opportunity with a reputable company offering great salary, benefits etc. Sorry if this is not the proper forum however, seasoned firmware engineers are few and far between and those with experience with the Tiano framework seem to be even sparser. Thank you all for your patients and understanding. I do apologize if anyone found this inquiry irritating; I won't make this a habit. Best regards, Dan Shufelt Information Technology Recruiter Express Employment Professionals *Professional & Executive Search* 7401 SW Washo Ct, Suite 200 Tualatin, Oregon 97062 * 503.612.2072 - Direct * 503.720.5262 - Mobile 7 503.352.1764 - FAX * daniel.shufelt(a)eproportland.com <mailto:daniel.shufelt@eproportland.com> * http://www.epsportland.com <http://www.epsportland.com/> http://www.linkedin.com/in/dshufelt <http://www.linkedin.com/in/dshufeltp> "Here for you 24/7!"

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Re: [coreboot] buildrom
by qchwu 03 Jun '08

03 Jun '08

I build a rom for ADM DB800. One error appear as following: [root@localhost buildrom-devel]# make Unpacking mkelfimage... Patching mkelfimage... Applying patch mkelfImage-2.7-x86_64.patch Applying patch mkelfimage-autoconf.patch Now at patch mkelfimage-autoconf.patch Building mkelfImage... Building unifdef (host)... Building lzma... Unpacking kernel (2.6.20.2)... Patching kernel... Building kernel... Installing kernel headers... Building the ELF payload... Compressing the ELF payload with lzma... ****************** Payload takes 1508825 Bytes (1473 KBytes) in ROM: ****************** Unpacking coreboot (coreboot-svn-3335.tar.gz)... Patching coreboot... Building target... /bin/sh: line 0: cd: /bios/buildrom/buildrom-devel/work/coreboot/svn/targets/: 没有那个文件或目录 (the file or folder is not found.) make: *** [/bios/buildrom/buildrom-devel/work/coreboot/stamps/.configured-db800] 错误 127 (error 127) [root@localhost buildrom-devel]# How can i clear this error? My gcc'version is 4.2.2. kernel'version is 2.6.18 make'version is 3.81 thanks! chenghu

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Adding support for an old motherboard to coreboot?
by Urja Rannikko 02 Jun '08

02 Jun '08

Hi list, I have an old Acer/IBM V58XA motherboard that was idling useless here. I have been looking at coreboot for a while and thought that adding support for my hardware would be a nice challenge for me. I think that i could learn a lot by making this mb supported, although it's usefulness in general is questionable (P233, 64M SDRAM). I actually found the chipset datasheets (Acer/ALi M1531B and M1533) here http://www.rom.by/doki.htm . I have a PCI POST card, the MB has an 256k AT29C020 flash ROM. It's supported by uniflash. I have a serial "null modem" cable to use for getting debug output. One problem is that i don't have a bios savior / backup flash chip for it. I think that i would salvage from somewhere/purchase an additional flashrom and backup the current bios to it (hotswapping, i have done it before) and test coreboot using the current flash chip. It has only an fdd,keyb,vga,mem,cpu,power attached now so struggled to find an 1.44M linux that would have lspci and stopped there. Here's pretty much all the spec i know of the MB: - CPU: Pentium 233 MMX - RAM: 2* 32MB SDRAM's - "Memory, Cache and Buffer Controller": ALi M1531 B1 - Southbridge: ALi M1533 A1 - VGA: Integrated ATI RageII+DVD with 2M of memory - SuperIO: SMsC FDC37C935APM (just found a datasheet for this) One note is that it seems to be that both the M1533 and the superio chip have an IDE controller capability and keyboard interface. This seems odd. I really don't know which chip's IDE this MB uses. (The M1533 is physically nearer to the ide connectors...) It has the following connectors available: - external: - 2 usb - 1 rs232 - 1 parallel - audio conns, game/midiport, vga, ps2 kb&mouse - internal: - 3 pci, 4 isa - 2 ide/ata channels - fdd connector Then, here go my questions to the list. - Should i develop using coreboot v2 or v3? - Could somebody list me the basic steps of adding a new motherboard to coreboot(v2 or v3)? - ------- '' --------- Estimate of the amount of code that needs to be written? - I took a brief look at the datasheets and it seems that the motherboard supports SMM (system management mode) and thus has SMRAM (2 SRAM chips found near cpu) (another one near the M1531). Could this ram be used the same way as Cache-As-RAM is used on newer motherboards? -- Urja Rannikko

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Coreinfo and geode conflict in buildrom
by Myles Watson 02 Jun '08

02 Jun '08

I couldn't build a coreinfo payload for the db800 because they both try to set DEPENDS-y. Is there a strong ordering (which should set it and which should add to the list), or should we make a new DEPENDS-y for the platform? Thanks, Myles

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r200 - buildrom-devel/config/payloads
by svn＠coreboot.org 02 Jun '08

02 Jun '08

Author: myles Date: 2008-06-02 18:14:55 +0200 (Mon, 02 Jun 2008) New Revision: 200 Modified: buildrom-devel/config/payloads/libpayload-dep.conf Log: This is a trivial patch that corrects the libpayload dependency handling in buildrom. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: buildrom-devel/config/payloads/libpayload-dep.conf =================================================================== --- buildrom-devel/config/payloads/libpayload-dep.conf 2008-05-29 14:38:03 UTC (rev 199) +++ buildrom-devel/config/payloads/libpayload-dep.conf 2008-06-02 16:14:55 UTC (rev 200) @@ -3,4 +3,4 @@ include $(CONFIG_DIR)/payloads/generic.conf # Add libpayload as a dependency -DEPENDS-y=libpayload +DEPENDS-y+=libpayload

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buildrom
by qchwu 02 Jun '08

02 Jun '08

I build a rom for ADM DB800. One error appear as following: [root@localhost buildrom-devel]# make Unpacking mkelfimage... Patching mkelfimage... Applying patch mkelfImage-2.7-x86_64.patch Applying patch mkelfimage-autoconf.patch Now at patch mkelfimage-autoconf.patch Building mkelfImage... Building unifdef (host)... Building lzma... Unpacking kernel (2.6.20.2)... Patching kernel... Building kernel... Installing kernel headers... Building the ELF payload... Compressing the ELF payload with lzma... ****************** Payload takes 1508825 Bytes (1473 KBytes) in ROM: ****************** Unpacking coreboot (coreboot-svn-3335.tar.gz)... Patching coreboot... Building target... /bin/sh: line 0: cd: /bios/buildrom/buildrom-devel/work/coreboot/svn/targets/: 没有那个文件或目录 make: *** [/bios/buildrom/buildrom-devel/work/coreboot/stamps/.configured-db800] 错误 127 [root@localhost buildrom-devel]# How can i clear this error? My gcc'version is 4.2.2. kernel'version is 2.6.18 make'version is 3.81 thanks! chenghu

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DRAM Row Attributes i82830 Help?
by Joseph Smith 02 Jun '08

02 Jun '08

Hello, I am having a problem with my set_dram_row_attributes() function in raminit.c and need some help. The function seems to calculate ok but when it comes to the switches, it is only working with one so-dimm not two. Is this because there are two switches with the same name? How can I fix it? Here is the output with some extra debugging and the function: Found DIMM in slot 00, setting DRA... Test - columns 0x0a Test - data width 0x40 Test - page size 0x00010000 Test - KB 0x08 Test - banks 0x02 DRA 0x70 has been set to 0x08 <---- THIS SHOULD BE 0X22 - SEE SWITCH BELOW Found DIMM in slot 01, setting DRA... Test - columns 0x09 Test - data width 0x40 Test - page size 0x00008000 Test - KB 0x04 Test - banks 0x01 DRA 0x71 has been set to 0xf1 ---------------------------------- static void set_dram_row_attributes(const struct mem_controller *ctrl) { int i, dra, col, width, value; for (i = 0; i < DIMM_SOCKETS; i++) { unsigned device; device = ctrl->channel0[i]; /* First check if a DIMM is actually present. */ if (spd_read_byte(device, 2) == 0x4) { print_debug("Found DIMM in slot "); print_debug_hex8(i); print_debug(", setting DRA...\r\n"); dra = 0x00; /* columns */ col = spd_read_byte(device, 4); /* data width */ width = spd_read_byte(device, 6); /* calculate page size in bits */ value = ((1 << col) * width); /* convert to Kilobytes */ dra = ((value / 8) >> 10); /* # of banks of DIMM (single or double sided) */ value = spd_read_byte(device, 5); if (value == 1) { switch (dra) { case 2: /* 2KB */ dra = 0xF0; break; case 4: /* 4KB */ dra = 0xF1; break; case 8: /* 8KB */ dra = 0xF2; break; case 16: /* 16KB */ dra = 0xF3; break; default: print_err("Page size not supported\r\n"); die("HALT\r\n"); } } else if (value == 2) { switch (dra) { case 2: /* 2KB */ dra = 0x00; break; case 4: /* 4KB */ dra = 0x11; break; case 8: /* 8KB */ dra = 0x22; break; case 16: /* 16KB */ dra = 0x33; break; default: print_err("Page size not supported\r\n"); die("HALT\r\n"); } } else { print_err("# of banks of DIMM not supported\r\n"); die("HALT\r\n"); } } else { PRINT_DEBUG("No DIMM found in slot "); PRINT_DEBUG_HEX8(i); PRINT_DEBUG(", setting DRA to 0xFF\r\n"); /* If there's no DIMM in the slot, set dra value to 0xFF. */ dra = 0xFF; } /* Set the value for DRAM Row Attribute Registers */ pci_write_config8(ctrl->d0, DRA + i, dra); PRINT_DEBUG("DRA 0x"); PRINT_DEBUG_HEX8(DRA + i); PRINT_DEBUG(" has been set to 0x"); PRINT_DEBUG_HEX8(dra); PRINT_DEBUG("\r\n"); } } I am stumped, please help. -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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Re: [coreboot] [flashrom] flashrom problem: will not flash on compaq/deskpro Deskpro EN SFF P600. "E
by a a 02 Jun '08

02 Jun '08

Ludwig Jaffe wrote: > a a schrieb: >> ps. >> >> also note that the board will not take> 256KByte chips because pin 1 >> (#reset on the 29F002BT A18 for>256KByte parts) of the plcc it wired >> to P34 (other end of P34 is wired to 12V) and it might even destroy >> other chips if P34 is placed !! > Uh! Thats evil. > >> >> hotflashing on this board is very hard because the powersupply is over >> the rom socket i made myself a extension cable from some compatible >> 14Pin molex minifit-jr connectors to allow access to the chip while the >> powersupply is nect to the box > where do I get the connectors? Do you have a Digi-key / other distri > order#? housing for male pins 14 way (to put on the psu): molex 0039012141 (or harder to find 0039012146) male pin to insert into this housing: molex 5558 (or high current 44478) (there are many variations in plating and packaging) housing for female pins 14 way (to put on the mobo): molex 0039012140 or harder to find 0039012145) female pin to insert into this housing: molex 5556 (or high current 44476) (there are many variations in plating and packaging) maybe you can order some samples from molex ? where are you from btw? (im from the Netherlands) >> >> i think we should give flashrom a couple of special commands .. >> LOCK and UNLOCK (i used some letters but forgot them) >> to unlock this kind of chip locks > flashrom: > Yes, It would be nice to rewrite flashrom accordingly because others > (openbios.org) also > like to use it. Lets make it a pretty cool tool also for upgrading > normal pc-bios from remote with linux. > I like the function-pointer arcutecture very much. So we could enhance > it by adding a function-pointer > for unprotect(*bios) and protect(*bios). > Then an *universal* algorithm will call according to the commandline-params > read(*bios) for backup, unprotect(), is_unprotected(), erase(), > is_empty() [if not, try to write backup. verify()], write(), verify(). > > The function-pointers for write() read() and the like point to the > implementation dependend on the detected flash. > Also function calls within the write or erase have to use the > function-fointers, so that by servicing the function-pointer table and the > specialized routines, fine granular support for any flash can be writen. > So the ST-Way of unprotecting can be used for all st devices of the > family. So we save code and become very flexible. > The Problem with the actual code is that some routines simply write some > data out to issue jedec-erase instaed of calling the erase-method pointed > to by the function-pointer erase(). > > So flashrom has to be rewritten accordingly (not so much effort) and > tested by people having the flash-roms in their machines. > > >> >> the original bios has a recovery option btw ... keek esc pressed >> powering up it will 'talk' to you over the keyboard leds / pc speaker >> ahd should be able to restore the bios from a diskette iirc > > Thanks for the tip. > > Have you ever thought of reverse-engineering the bios-flaser of compaq > using a debugger (does the effort make sense?) i did just that but it seams the switch will overrule software/ASIC. iirc the password is stored (encripted?) in cmos. im dont remember if the asic remembers it on its own or that the bios loads it at boot ... but i dont have the details in my head atm and no time to look it up > Do you have a service-manual? there are some more not assembled > connectors. E.G. P115 between Super-IO and ATI-Graphics > whicht seems to be interessting (maybe gpios of super io or I2C/SMBUS)... i think i saw somewhere that P115 is SCSI but im not shure.. i am shure that that are loads of missing resistor 'bank' parts around that... P108 seams to be gameport(maybe also midi) service manual i have is pdf_27556.pdf i got it from http://www.manualshark.org/manualshark/files/28/pdf_27556.pdf see also http://www.manualshark.org/p/hewlett-packard-28/hewlett-packard-compaq-desk… > > Thanks for your tips. > > > LuJa >> >> >> a a wrote: >>> Hi all, >>> >>> Ludwig Jaffe wrote: >>>> Hi all, >>>> >>>> i fiddled around with the flashrom util, and I managed to rewrite the >>>> original compaq-bios, which I saved before. >>>> I modified the flashrom-utily to enable writing the flashrom. The >>>> 29F002BT works with 29f002-funktions and *not* with jedec.... >>>> The only problem that remains, is that it is not possible to >> unprotect >>>> the 20f002bt (ST). with the flashrom utily. So I can not upgrade the >>> flash! >>>> I will go and code some improvement to that. >>>> >>> >>> i worked with Uwe to create the support for the Compaq deskpro EN SFF >>> 600N i have here >>> >>> i needed 3 hardware mods: >>> - socket for the flash chip (with loads of luck you can skip this but >>> please let me test the current tree before you flash coreboot into your >>> unit) >>> - set SW1 to ON to disable the write protection on the'normal' (non >>> bootblock ) part of the bios (if you dont do this the ASIC will disable >>> ANY writes even probes to the flash iirc >>> -if you have the original chip onboard: short (not installed) jumper >> P34 >>> that is next to the flashpart (shorting this will temp. unlock the >>> bootblock and allow (un)programming of the lockbits note that you >> should >>> first protected the whole chip before unproetcting. >>> >>> i also needed a couple of software hacks that are not yet in the tree: >>> -disable some parts of the southbrigde (KBC ectect) so the superio can >>> handle them >>> -stuff some values to the ASIC so networking works (otherwise eth0 will >>> not show on the pci bus) >>> -i had some trouble with onboard audio but i dont remember the >> details now >>> -i dont have onboard vga working yet and was planning on maybe using / >>> writing free support for it so i dont need a vga bios >>> >>> >>> i dont have time today/tomorrow to look at it in more detail .. will do >>> that later this week ... >>> >>> greetings, >>> todthgie >>> >>> >>> >>> >>>> A suggestion regarding architecture: >>>> >>> >>>> We should add a function-pointer for protect and unprotect, >> because this >>>> is sometimes special. e.g. 29f002bt (st). >>>> We should provide an extra funktion to protect/unprotect the bios >> to the >>>> user, so that reweiting the eeprom will be >>>> read() -> save old >>>> unprotect() >>>> test_if_unprotected() >>>> if not die >>>> erase() >>>> test_if_empty() >>>> if not, try to rewrite saved_old! >>>> else die. >>>> write >>>> verify >>>> >>>> >>>> So the methods protect/unprotect have to be seperate and not be >> hidden >>>> in erase or write functions. >>>> And they should be accessible via the punction-pointer-table. >>>> >>>> >>>> >>>> My patch contains my little modifications and da doxygen file to ease >>>> understanding the code. >>>> >>>> Please help me to improve the architecture of flashrom. >>>> >>>> Greetings >>>> >>>> >>>> LuJa >>>> >>>> >>>> >>>> >>> >>> >>> >> ------------------------------------------------------------------------ >>> Express yourself instantly with MSN Messenger! MSN Messenger >>> >>> >> >> >> >> ------------------------------------------------------------------------ >> Express yourself instantly with MSN Messenger! MSN Messenger >> > > > _________________________________________________________________ Express yourself instantly with MSN Messenger! Download today it's FREE! http://messenger.msn.click-url.com/go/onm00200471ave/direct/01/

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coreboot June 2008