coreboot February 2008

coreboot@coreboot.org

77 participants
422 discussions

printing TSC in printk
by ron minnich 17 Feb '08

17 Feb '08

Here's a simple proposal. Define an option PRINTK_TSC What it does: each time printk would print a newline, it will instead print this: (16 hex digits of TSC)\n Here's another simpler option: Define a new format letter, T, such that %T as a format means "time". first option allows comprehensive timing, but it will slow things down a bit. Second option allows us to completely tailor the printing of time, but you have to explicitly add %T when you want time printed. Comments? ron

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[PATCH] 2/3 virtual LDN for PNP
by Rudolf Marek 17 Feb '08

17 Feb '08

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, This patch introduces changes for W83627EHF driver. Not only LDN 7 and 9 are changed, but also a SPI flash interface which has enable on bit1 and not bit0. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFHt38s3J9wPJqZRNURAmmcAKDTB+NRv9qw6CnuWPuGP95v/Ka13ACfXY6l JDBYltsuvvyM/6zShqJ/KOk= =Z4BM -----END PGP SIGNATURE-----

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[PATCH] 2/3 virtual LDN for PNP
by Rudolf Marek 17 Feb '08

17 Feb '08

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v3: dts and arrays
by Carl-Daniel Hailfinger 16 Feb '08

16 Feb '08

I want to reenable the "unwanted VPCI" support, but the dtc does not like me. Regardless of what I try to store in the dts, the device tree compiler will barf. An ideal solution would be the ability to not only specify array contents, but also array size in the dts. Overriding ability for both would be even better. Suggestions? Regards, Carl-Daniel Index: southbridge/amd/cs5536/cs5536.c =================================================================== --- southbridge/amd/cs5536/cs5536.c (Revision 590) +++ southbridge/amd/cs5536/cs5536.c (Arbeitskopie) @@ -608,16 +608,13 @@ if (sb->enable_ide) ide_init(dev); -#warning Add back in unwanted VPCI support -#if 0 /* Disable unwanted virtual PCI devices. */ - for (i = 0; (i < MAX_UNWANTED_VPCI) && (0 != sb->unwanted_vpci[i]); i++) { + for (i = 0; (i < MAX_UNWANTED_VPCI) && sb->unwanted_vpci[i]; i++) { printk(BIOS_DEBUG, "Disabling VPCI device: 0x%08X\n", sb->unwanted_vpci[i]); outl(sb->unwanted_vpci[i] + 0x7C, 0xCF8); outl(0xDEADBEEF, 0xCFC); } -#endif printk(BIOS_SPEW, "cs5536: %s() Exit\n", __FUNCTION__); } Index: southbridge/amd/cs5536/dts =================================================================== --- southbridge/amd/cs5536/dts (Revision 590) +++ southbridge/amd/cs5536/dts (Arbeitskopie) @@ -57,4 +57,7 @@ com2_enable = "0"; com2_address = "0x2f8"; com2_irq = "3"; + + /* Disable unwanted virtualized PCI devices */ + unwanted_vpci[0] = "0"; }; -- http://www.hailfinger.org/

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I just did an emergency commit
by ron minnich 16 Feb '08

16 Feb '08

Alix1c won't boot with the zero decompress code. So I have disabled it in a simple way: Index: util/lar/stream.c =================================================================== --- util/lar/stream.c (revision 602) +++ util/lar/stream.c (working copy) @@ -148,6 +148,7 @@ continue; } thisalgo = zeroes; + thisalgo = algo; if (verbose()) fprintf(stderr, "New section addr %#x size %#x\n", (u32)shdr[i].sh_addr, (u32)shdr[i].sh_size); I think the code is using the wrong address on decompress, but I have no idea and I want to rest. FWIW, all the changes I put in for the dtc work seem to work fine. BTW, we need to put svn rev in the coreboot banner, if anyone wants to try. It's amazing how the simplest, most obvious, can't fail patches are the ones that chew up 3 hours of debug time :-) Thanks ron

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r605 - in coreboot-v3: lib util/lar
by svn＠coreboot.org 16 Feb '08

16 Feb '08

Author: hailfinger Date: 2008-02-16 20:18:32 +0100 (Sat, 16 Feb 2008) New Revision: 605 Modified: coreboot-v3/lib/lar.c coreboot-v3/util/lar/stream.c Log: On 16.02.2008 07:41, ron minnich wrote: > Alix1c won't boot with the zero decompress code. > I think the code is using the wrong address on decompress. Indeed, r601 broke all targets, you were just lucky that qemu didn't explode as well. It's the seemingly easy patches which break booting. With your hint, I found the bug. Myles made a small, but important mistake with the memset for the "zeroes" decompression. The memset zeroed the archive instead of the destination. No wonder it did explode. This patch fixes it and also reverts the emergency commit r604 because that one is no longer necessary. Ron tested on the Alix1c, boots fine, ethernet and IDE working. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: coreboot-v3/lib/lar.c =================================================================== --- coreboot-v3/lib/lar.c 2008-02-16 06:38:45 UTC (rev 604) +++ coreboot-v3/lib/lar.c 2008-02-16 19:18:32 UTC (rev 605) @@ -172,7 +172,7 @@ #endif /* zeroes */ if (archive->compression == 3) { - memset(archive->start, 0, archive->reallen); + memset(where, 0, archive->reallen); return 0; } printk(BIOS_INFO, "LAR: Compression algorithm #%i not supported!\n", archive->compression); Modified: coreboot-v3/util/lar/stream.c =================================================================== --- coreboot-v3/util/lar/stream.c 2008-02-16 06:38:45 UTC (rev 604) +++ coreboot-v3/util/lar/stream.c 2008-02-16 19:18:32 UTC (rev 605) @@ -148,7 +148,6 @@ continue; } thisalgo = zeroes; - thisalgo = algo; if (verbose()) fprintf(stderr, "New section addr %#x size %#x\n", (u32)shdr[i].sh_addr, (u32)shdr[i].sh_size);

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Qemu 0.9.1 bios patch
by Robi Yagel 16 Feb '08

16 Feb '08

Hello, Attached a bios-size patch for the latest qemu version 0.9.1. This should be applied instead of the 0.9.0 patches that appear in the qemu tutorial <http://www.coreboot.org/QEMU_Build_Tutorial#Building_Qemu>. Haven't testes it throughly but it worked for me to run coreboot + ADLO + my system. Cheers, Reuven

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Changes for removing IDs from dts, etc. etc.
by ron minnich 16 Feb '08

16 Feb '08

This turned into a pretty big cleanup. However, it reduced (by a small amount) the amount of code, and complexity, and I like it. Comments welcome. This one is signed off, though there is a bit of todo left as noted in the patch. boots on qemu and alix1c. thanks ron

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rm elfboot and ELF from v3 (not lar)
by Myles Watson 16 Feb '08

16 Feb '08

This is another attempt at removing ELF support from v3. I'll try to do a better job of explaining and justifying this time. The patch should be followed by: svn rm include/elf_boot.h svn rm include/elf.h svn rm include/arch/x86/arch/elf.h svn rm lib/elfboot.c svn rm arch/x86/archelfboot.c Another follow-on would be to fix lar so it never puts an ELF into the lar without parsing it. Here are my reasons: 1. It wasn't being used anyway. Unless you used lar to load the elf in, the Makefile always parsed the elf with -e 2. It duplicated code. There is no reason for v3 to understand ELF when lar parses it. 3. It saves space. Here's the last little bit of stage0.init.map Without the patch: ffffcc8c T rawpnp_write_config ffffcca8 T rawpnp_set_logical_device ffffcccb T rawpnp_set_iobase ffffccf4 T rawpnp_set_enable ffffcd19 T rawpnp_enter_ext_func_mode ffffcd20 T rawpnp_exit_ext_func_mode ffffd51f t __FUNCTION__.1410 ffffd540 t console_test.1503 ffffd57b T _estage0_1 fffffff0 A _ROMTOP fffffff0 T _resetjump With the patch: ffffc885 T rawpnp_enter_ext_func_mode ffffc88c T rawpnp_exit_ext_func_mode ffffce20 t console_test.1503 ffffce5b T _estage0_1 fffffff0 A _ROMTOP fffffff0 T _resetjump I'm calculating the difference by subtracting the locations of _estage0_1 fffd57b - fffce5b = 0x720 = 1824 bytes Not earth-shattering, but significant. Myles Signed-off-by: Myles Watson <mylesgw(a)gmail.com>

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lnxi
by Ward Vandewege 16 Feb '08

16 Feb '08

Maybe it's time to make a copy of that ftp directory at lnxi with old linuxbios code... http://linux.slashdot.org/linux/08/02/15/1320210.shtml Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

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coreboot February 2008