coreboot January 2008

coreboot@coreboot.org

79 participants
347 discussions

Web site configuration
by Carl-Daniel Hailfinger 14 Jan '08

14 Jan '08

Hi, it seems that the recent move to coreboot.org has created a level of content duplication which will eventually worsen our search engine ranking. We duplicate almost all content at least five(!) times: http://linuxbios.org/AMD_SimNow http://www.linuxbios.org/AMD_SimNow http://wiki.linuxbios.org/AMD_SimNow http://coreboot.org/AMD_SimNow http://www.coreboot.org/AMD_SimNow Can we please decide which domain we will use for the wiki in the future and issue "HTTP 301 Moved Permanently" for all URLs containing one of the other domains? That way, Google will not pick its own random selection of *.linuxbios.org and *.coreboot.org when researching stuff about LinuxBIOS/coreboot. Regards, Carl-Daniel

2 1

MTRR question
by Lars Randers 13 Jan '08

13 Jan '08

Why do we use a variable MTRR to map the bios code instead of the fixed ones? I've been trying to integrate a VGA bios alongside the normal and fallback images, but that 2 ^ XIP size requirement is making things very difficult. So far I have only managed to include the VGA bios code blob if I disable the normal image in the config.lb Is there anything preventing me from using the fixed size MTRR descriptors for the bios area instead of a variable one? @Luc - Are you working on getting a VGA textmode console running on the VIA Epia board? I stumbled on your name on the unicrome project, so if anyone could do it, it'd be you :) In any case I'd be very interested in anything along those lines...

1 0

[LinuxBIOS] 2 Terabyte Limit of BIOS/MBR
by Martin Marcher 13 Jan '08

13 Jan '08

Hello, hope to be in the right place to ask this, if not just point me to where you think it's apropriate my Hardware is: Tyan Transport GT20 (B2865) http://www.tyan.com/support_download_manuals.aspx?model=B.GT20B2865 an Areca 1210 raid controller is attached to it and I just was hit by the 2TB limit which a BIOS can handle. Is that right that the problem is the BIOS? how I understand the different articles at wikipedia, ms and different netsources the BIOS just can't handle disks that are larger than 2TB, in turn this renders a MBR unusable. Fine so I convert the disk to a GPT and off I should go. But I found that the bios of this board still refuses to accept the disk (reported as an scsi device from the controller) and just says "No BIOS disk found". OK, now the actual question(s): 1) Is this problem (if I understood it right) still there with linuxbios? 2) If so what plans are there to still be able to use a >2TB disk? (Note: Just plugging a smaller disk to boot from isn't exactly what I consider a solution, however you are the experts :) 3) Last, not least I couldn't the Tyan GT20 in the supported hardware list, is that true or just missing. If it's missing I'll bug Tyan about this once a month or so, in case you don't have the specs available to send it to you (if you want me to do that). thanks martin apologies if that is totally OT but I think I'm right here :) -- http://noneisyours.marcher.name http://feeds.feedburner.com/NoneIsYours You are not free to read this message, by doing so, you have violated my licence and are required to urinate publicly. Thank you.

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r3049 build service
by LinuxBIOS information 13 Jan '08

13 Jan '08

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "ruik" checked in revision 3049 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix the documentation of GPIO setup, tell W83627EHF to use external suspend clock (undocumented in datasheet, documented in 'W83627HG-AW'). Introduce sio_init function for all this. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=3049&device=serengeti_che… If something broke during this checkin please be a pain in ruik's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

r3048 build service
by LinuxBIOS information 12 Jan '08

12 Jan '08

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "cozzie" checked in revision 3048 to the LinuxBIOS source repository and caused the following changes: Change Log: Via C3 datasheets don't make any mention of microcode updates, and the C7 bios programmer's guide explicitly states they're not necessary, and leaves it at that. Even if they are possible and exist, we don't have any info on it, nor any updates, so drop these unneeded references. Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=3048&device=serengeti_che… If something broke during this checkin please be a pain in cozzie's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

r3049 - trunk/LinuxBIOSv2/src/mainboard/asus/a8v-e_se
by svn＠openbios.org 12 Jan '08

12 Jan '08

Author: ruik Date: 2008-01-12 23:29:17 +0100 (Sat, 12 Jan 2008) New Revision: 3049 Modified: trunk/LinuxBIOSv2/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c Log: Fix the documentation of GPIO setup, tell W83627EHF to use external suspend clock (undocumented in datasheet, documented in 'W83627HG-AW'). Introduce sio_init function for all this. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c 2008-01-12 21:44:57 UTC (rev 3048) +++ trunk/LinuxBIOSv2/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c 2008-01-12 22:29:17 UTC (rev 3049) @@ -79,6 +79,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) +#define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) #define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC) static void memreset_setup(void) @@ -153,13 +154,8 @@ return (dev >> 15) & 0x1f; } -#if USE_FALLBACK_IMAGE == 1 -void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) -{ -// unsigned last_boot_normal_x = last_boot_normal(); -//FIXME - unsigned last_boot_normal_x = 1; +void sio_init(void) { u8 reg; pnp_enter_ext_func_mode(SERIAL_DEV); @@ -174,18 +170,40 @@ pnp_exit_ext_func_mode(SERIAL_DEV); + pnp_enter_ext_func_mode(ACPI_DEV); + pnp_set_logical_device(ACPI_DEV); + reg = pnp_read_config(ACPI_DEV, 0xe6); + /* Set the delay rising time from PWROK_LP to PWROK_ST to 300 - 600ms, and 0 to vice versa */ + pnp_write_config(ACPI_DEV, 0xe6, (reg & 0xf0)); + /* 1 Use external suspend clock source 32.768KHz. Undocumented?? */ + reg = pnp_read_config(ACPI_DEV, 0xe4); + pnp_write_config(ACPI_DEV, 0xe4, (reg | 0x10)); + pnp_exit_ext_func_mode(ACPI_DEV); + pnp_enter_ext_func_mode(GPIO_DEV); pnp_set_logical_device(GPIO_DEV); - pnp_write_config(GPIO_DEV, 0xe0, 0xde); // 1101110 0=output 1=input - pnp_write_config(GPIO_DEV, 0xe1, 0x1); //set output val - pnp_write_config(GPIO_DEV, 0xe2, 0x0); //no inversion - pnp_write_config(GPIO_DEV, 0xe3, 0x3); //0000 0011 0=output 1=input - pnp_write_config(GPIO_DEV, 0xe4, 0xa4); //set output val - pnp_write_config(GPIO_DEV, 0xe5, 0x0); //no inversion - pnp_write_config(GPIO_DEV, 0x30, 0x9); //Enable GPIO 2 & GPIO 5 pnp_exit_ext_func_mode(GPIO_DEV); + /* set memory voltage to 2.75V, vcore offset + 100mV, 1.5V Chipset voltage */ + pnp_write_config(GPIO_DEV, 0xe0, 0xde); /* 1101110 0=output 1=input */ + pnp_write_config(GPIO_DEV, 0xe1, 0x1); /* set output val */ + pnp_write_config(GPIO_DEV, 0xe2, 0x0); /* no inversion */ + pnp_write_config(GPIO_DEV, 0xe3, 0x3); /* 0000 0011 0=output 1=input */ + pnp_write_config(GPIO_DEV, 0xe4, 0xa4); /* set output val 1010 0100 */ + pnp_write_config(GPIO_DEV, 0xe5, 0x0); /* no inversion */ + pnp_write_config(GPIO_DEV, 0x30, 0x9); /* Enable GPIO 2 & GPIO 5 */ + pnp_exit_ext_func_mode(GPIO_DEV); +} +#if USE_FALLBACK_IMAGE == 1 + +void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) +{ +// unsigned last_boot_normal_x = last_boot_normal(); +//FIXME + unsigned last_boot_normal_x = 1; + + sio_init(); w83627ehg_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); @@ -258,34 +276,8 @@ (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); char *p; - u8 reg; - pnp_enter_ext_func_mode(SERIAL_DEV); - reg = pnp_read_config(SERIAL_DEV, 0x24); - pnp_write_config(SERIAL_DEV, 0x24, (reg & ~0x40)); /* we have 24MHz input */ - - reg = pnp_read_config(SERIAL_DEV, 0x2A); - pnp_write_config(SERIAL_DEV, 0x2A, (reg | 1)); /* we have GPIO for KB/MS PIN */ - - reg = pnp_read_config(SERIAL_DEV, 0x2C); - pnp_write_config(SERIAL_DEV, 0x2C, (reg | 0xf0)); /* we have all RESTOUT and even some reserved bits too */ - - pnp_exit_ext_func_mode(SERIAL_DEV); - - pnp_enter_ext_func_mode(GPIO_DEV); - pnp_set_logical_device(GPIO_DEV); - pnp_write_config(GPIO_DEV, 0xe0, 0xde); // 1101110 0=output 1=input - pnp_write_config(GPIO_DEV, 0xe1, 0x1); //set output val - pnp_write_config(GPIO_DEV, 0xe2, 0x0); //no inversion - pnp_write_config(GPIO_DEV, 0xe3, 0x3); //0000 0011 0=output 1=input - pnp_write_config(GPIO_DEV, 0xe4, 0xa4); //set output val - //0x10 seems to control something with SGD VIA - - pnp_write_config(GPIO_DEV, 0xe5, 0x0); //no inversion - pnp_write_config(GPIO_DEV, 0x30, 0x9); //Enable GPIO 2 & GPIO 5 - pnp_exit_ext_func_mode(GPIO_DEV); - - + sio_init(); w83627ehg_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init();

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[LinuxBIOS] [PATCH] Drop microcode references from Via CPUs
by Corey Osgood 12 Jan '08

12 Jan '08

Via C3 datasheets don't make any mention of microcode updates, and the C7 bios programmer's guide explicitly states they're not necessary, and leaves it at that. Even if they are possible and exist, we don't have any info on it, nor any updates, so drop these unneeded references. Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com>

2 2

r3048 - trunk/LinuxBIOSv2/src/cpu/via/model_centaur
by svn＠openbios.org 12 Jan '08

12 Jan '08

Author: cozzie Date: 2008-01-12 22:44:57 +0100 (Sat, 12 Jan 2008) New Revision: 3048 Modified: trunk/LinuxBIOSv2/src/cpu/via/model_centaur/Config.lb trunk/LinuxBIOSv2/src/cpu/via/model_centaur/model_centaur_init.c Log: Via C3 datasheets don't make any mention of microcode updates, and the C7 bios programmer's guide explicitly states they're not necessary, and leaves it at that. Even if they are possible and exist, we don't have any info on it, nor any updates, so drop these unneeded references. Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/cpu/via/model_centaur/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/cpu/via/model_centaur/Config.lb 2008-01-11 22:37:27 UTC (rev 3047) +++ trunk/LinuxBIOSv2/src/cpu/via/model_centaur/Config.lb 2008-01-12 21:44:57 UTC (rev 3048) @@ -5,5 +5,4 @@ dir /cpu/x86/sse dir /cpu/x86/lapic dir /cpu/x86/cache -dir /cpu/intel/microcode driver model_centaur_init.o Modified: trunk/LinuxBIOSv2/src/cpu/via/model_centaur/model_centaur_init.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/via/model_centaur/model_centaur_init.c 2008-01-11 22:37:27 UTC (rev 3047) +++ trunk/LinuxBIOSv2/src/cpu/via/model_centaur/model_centaur_init.c 2008-01-12 21:44:57 UTC (rev 3048) @@ -7,7 +7,6 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> -#include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h>

1 0

[LinuxBIOS] AMD SimNOW (program) fails to run
by Andon Tschauschev 12 Jan '08

12 Jan '08

Hello, I want to use SimNow 4.4.2, but it fails to run. OS is openSUSE 10.3 x86_64, 1GB RAM, Kernel version: andon@freezer:~> uname -a Linux freezer 2.6.22.13-0.3-default #1 SMP 2007/11/19 15:02:58 UTC x86_64 x86_64 x86_64 GNU/Linux andon@freezer:~> CPU Info: andon@freezer:~> cat /proc/cpuinfo processor : 0 vendor_id : AuthenticAMD cpu family : 15 model : 79 model name : AMD Athlon(tm) 64 Processor 3800+ stepping : 2 cpu MHz : 1000.000 cache size : 512 KB fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow up pni cx16 lahf_lm svm extapic cr8_legacy bogomips : 2010.89 TLB size : 1024 4K pages clflush size : 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: ts fid vid ttp tm stc andon@freezer:~> Running SimNow produces following error: andon@freezer:~/SimNow/simnow-linux64-4.4.2pub> ./simnow -f bsds/cheetah_1p.bsd Using image path: "/tool/perf/simnow-data/images" Device Library: Winbond W83627HF SIO Device Library: SMB Hub Device Device Library: AMD 8th Generation Integrated Northbridge Device Library: PCI Bus Device Library: PCA9548 Device Device Library: Memory Device Device Library: Emerald Graphics Device Library: Dimm Bank Device Library: AweSim Processor Device Library: AT24C Device Device Library: Debugger Device Library: AMD-8132 PCI-X Controller Device Library: AMD-8111 I/O Hub Device Library: USB JumpDrive Device Library: Intel(R) Pro/1000 MT/PT Desktop Network Adapter Using library path: "./libs" Opening "bsds/cheetah_1p.bsd" Instructions per Microsecond: 800 CPU Model Name: Opteron System Bus Frequency: 200 CPU Clock Mul: 0 Turbo_Port61: 0 Turbo_Vsync: 0 Guard Memory Required: TRUE CPU Manages Cycles: TRUE Disk Block Cache Size: 64K Disk Block Cache Depth: 5 Disk Block Cache Bits: 12 info: creating device #0 "AMD 8th Generation Integrated Northbridge" info: creating device #1 "Dimm Bank" info: creating device #2 "AMD-8111 I/O Hub" info: creating device #3 "Memory Device" info: creating device #4 "Winbond W83627HF SIO" info: creating device #5 "SMB Hub Device" info: creating device #6 "PCI Bus" info: creating device #7 "Debugger" info: creating device #8 "AweSim Processor" FixIt: Error: Unable to allocate processor model memory. Aborted andon@freezer:~/SimNow/simnow-linux64-4.4.2pub> Strace output: andon@freezer:~/SimNow/simnow-linux64-4.4.2pub> strace ./simnow -f bsds/cheetah_1p.bsd ... ... ... ... write(1, "info: creating device #8 \"AweSim"..., 44info: creating device #8 "AweSim Processor" ) = 44 mmap(NULL, 1646592, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2aaaab2c7000 write(6, "\0", 1) = 1 futex(0x5d29e4, FUTEX_WAKE_OP, 1, 1, 0x5d29e0, {FUTEX_OP_SET, 0, FUTEX_OP_CMP_EQ, 0}) = 1 futex(0x5d29b8, FUTEX_WAKE, 1) = 1 futex(0x5d2af0, FUTEX_WAKE, 1) = 1 futex(0x5d2b18, FUTEX_WAKE, 1) = 1 futex(0x5d2b1c, FUTEX_WAIT, 1, NULL) = -1 EAGAIN (Resource temporarily unavailable) futex(0x5d2af0, FUTEX_WAKE, 1) = 0 write(6, "\0", 1) = 1 futex(0x65d7ac, FUTEX_WAIT, 1, NULL) = 0 futex(0x65d780, FUTEX_WAKE, 1) = 0 mmap(0x5400000000, 2147483648, PROT_NONE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS|MAP_NORESERVE, -1, 0) = -1 ENOMEM (Cannot allocate memory) mmap(NULL, 2147483648, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_NORESERVE, -1, 0) = -1 ENOMEM (Cannot allocate memory) write(1, "FixIt: Error: Unable to allocate"..., 57FixIt: Error: Unable to allocate processor model memory. ) = 57 rt_sigprocmask(SIG_UNBLOCK, [ABRT], NULL, 8) = 0 tgkill(5923, 5923, SIGABRT) = 0 --- SIGABRT (Aborted) @ 0 (0) --- +++ killed by SIGABRT +++ andon@freezer:~/SimNow/simnow-linux64-4.4.2pub> Thank you for any help you can give me. Regards Andon ____________________________________________________________________________________ Never miss a thing. Make Yahoo your home page. http://www.yahoo.com/r/hs

3 3

[LinuxBIOS] r3021 build service
by LinuxBIOS information 12 Jan '08

12 Jan '08

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "cozzie" checked in revision 3021 to the LinuxBIOS source repository and caused the following changes: Change Log: More abuild fixes, this should be the last (trivial) Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=3021&device=serengeti_che… If something broke during this checkin please be a pain in cozzie's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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coreboot January 2008