coreboot June 2007

coreboot@coreboot.org

76 participants
285 discussions

[LinuxBIOS] need help porting linuxbios to new motherboard
by Jon Butterfield 12 Jun '07

12 Jun '07

Hi, I'm trying to port linuxbios onto a Kontron P3T motherboard. It runs Intel 82815 NB and Intel 82801DB SB, with the mobile Celeron CPU. I have downloaded linuxBIOSv2 source code, and FILO. I haven't the first clue how to go about porting linuxBIOS to my motherboard. Where do I start? Thanks, Jon --

2 1

[LinuxBIOS] compilation error
by Thomas Ekstrand 12 Jun '07

12 Jun '07

Hi! I've tried to compile linuxbios for the broadcom/blast with only fallback but i get this error message: -snip- 1: Error: can't resolve `.L0' {*ABS* section} - `c0000' {*UND* section} make[1]: *** [crt0.o] Error 1 -snip- Any ideas? Thanks! /Thomas

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[LinuxBIOS] EPIA hang after patch
by Thomas Ekstrand 11 Jun '07

11 Jun '07

Hi! I checked out r2717 and at first it behaved like Markus Boas Epia V but then I applied Ben's patch to the vt8231_early_serial.c and it booted into filo, once, then hanged at the dram setup. then I applied the vt8231_lpc.c patch and it hangs on this: LinuxBIOS-2.0.0.0Normal Mon Jun 11 22:28:57 CEST 2007 starting... 87 is the comm register SMBus controller enabled vt8601 init starting 00000000 is the north 1106 0601 0120d4 is the computed timing NOP PRECHARGE DUMMY READS CBR MRS NORMAL set ref. rate enable multi-page open Slot 00 is SDRAM 10000000 bytes 000e is the MA type Slot 01 is SDRAM 08000000 bytes x2 000c is the MA type Slot 02 is empty Slot 03 is empty vt8601 done Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Mon Jun 11 22:28:57 CEST 2007 booting... Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [1106/0601] ops PCI: 00:00.0 [1106/0601] enabled malloc Enter, size 668, free_mem_ptr 00018000 malloc 0x00018000 Capability: 0x07 @ 0x80 Capability: 0x08 @ 0x80 Capability: 0x10 @ 0x80 PCI: 00:01.0 [1106/8601] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: 00:11.0 [1106/8231] bus ops PCI: 00:11.0 [1106/8231] enabled PCI: 00:11.1 [1106/0571] ops PCI: 00:11.1 [1106/0571] enabled PCI: 00:11.2 [1106/3038] disabled PCI: 00:11.3 [1106/3038] disabled PCI: 00:11.4 [1106/8235] ops PCI: 00:11.4 [1106/8235] disabled PCI: 00:11.5 [1106/3058] disabled PCI: 00:11.6 [1106/3068] enabled PCI: devfn 0x8f, bad id 0xffffffff PCI: 00:12.0 [1106/3065] ops PCI: 00:12.0 [1106/3065] enabled PCI: devfn 0x98, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 0001829c malloc 0x0001829c PCI: 00:14.0 [1106/3065] ops PCI: 00:14.0 [1106/3065] enabled PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:11.0 malloc Enter, size 668, free_mem_ptr 00018538 malloc 0x00018538 malloc Enter, size 668, free_mem_ptr 000187d4 malloc 0x000187d4 malloc Enter, size 668, free_mem_ptr 00018a70 malloc 0x00018a70 malloc Enter, size 668, free_mem_ptr 00018d0c malloc 0x00018d0c malloc Enter, size 668, free_mem_ptr 00018fa8 malloc 0x00018fa8 malloc Enter, size 668, free_mem_ptr 00019244 malloc 0x00019244 malloc Enter, size 668, free_mem_ptr 000194e0 malloc 0x000194e0 malloc Enter, size 668, free_mem_ptr 0001977c malloc 0x0001977c malloc Enter, size 668, free_mem_ptr 00019a18 malloc 0x00019a18 malloc Enter, size 668, free_mem_ptr 00019cb4 malloc 0x00019cb4 malloc Enter, size 668, free_mem_ptr 00019f50 malloc 0x00019f50 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled PNP: 607a.0 enabled PNP: 607a.1 enabled PNP: 607a.2 enabled PNP: 607a.3 enabled PNP: 607a.5 enabled PNP: 607a.6 enabled PNP: 607a.7 enabled PNP: 607a.8 enabled PNP: 607a.9 enabled PNP: 607a.a enabled PNP: 607a.b enabled scan_static_bus for PCI: 00:11.0 done PCI: pci_scan_bus returning with max=001 Unexpected Exception: 6 @ 10:e2c3f00a - Halting Code: 0 eflags: 00010093 eax: ffffff00 ebx: 00000000 ecx: 000003f8 edx: 00017eec edi: 00000000 esi: 00000000 ebp: 00000000 esp: 00010004 Any ideas would be great! Thanks! /Thomas

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[LinuxBIOS] Another inexpensive DIY flash programmer
by Jeremy Jackson 11 Jun '07

11 Jun '07

Hi, Found this while googling: http://www.loet.de/flasher_en.html It uses an IDE port, very inexpensive and simple. Cheers, Jeremy

1 0

[LinuxBIOS] Winflashrom - Directory structure consideration
by Darmawan Salihun 11 Jun '07

11 Jun '07

Hi all, Right now, I start laying down the infrastructure for the Windows version of flashrom utility, i.e. the kernel mode driver and the very basic user mode application. Because this version of flashrom will be quite different in terms of code due to inherent differences between Linux/other Unix and Windows, I think it's better to put it as a "branch" of the flashrom directory. I'm still thinking about the way to incorporate the flash chip and motherboard support in as seamless way as possible so that every newer chip/motherboard support will be merged easily. In the mean time I need the information on how to commit the code once I have a tested version of the Winflashrom. Anyway, I wonder how the qa (Quality Assurance / auto build, etc.) system will handle a windows version source code :-? especially the header files. Regards, Darmawan

4 18

[LinuxBIOS] does reinitializing memory controller destroy all the data in ram?
by RusH 11 Jun '07

11 Jun '07

Im sorry that Im again posting not exactly on the topic of linuxbios, but I know that people reading this list have the knowledge about the subject that im interested in. Does reinitializing memory controler destroy all the data in ram? Lets say I boot the computer, bios sets up the memory controller, then runs bootloader, then my code. Now my code (using CAR) once again reinitializes memory controller (sets up everything just like the bios, only changes timings), will all the data be in ram after this? or will it get wiped out/destroyed? At first I was hoping that Bios initializes memory controller only on cold boot, but it does it on soft ones too :(, my hope now lies in attaching a bios module to reinitialize it after the bios is executed. I want my code to be able to set all the timings. I can do it for tRCD tRP tRAS, but almost all controllers dont like tCAS changes and will simply hang up the computer (KT133 and AMD64 to name a few). It would be a lot simplier if linuxbios could just boot XP crap :( -- Who logs in to gdm? Not I, said the duck.

3 4

[LinuxBIOS] r350 - in LinuxBIOSv3: . arch/x86 lib
by svn＠openbios.org 09 Jun '07

09 Jun '07

Author: stepan Date: 2007-06-09 19:43:26 +0200 (Sat, 09 Jun 2007) New Revision: 350 Modified: LinuxBIOSv3/Kconfig LinuxBIOSv3/README LinuxBIOSv3/arch/x86/Makefile LinuxBIOSv3/lib/Makefile Log: Rework payload handling to only provide two options: - Payload file - No payload Document the current procedure in the README. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: LinuxBIOSv3/Kconfig =================================================================== --- LinuxBIOSv3/Kconfig 2007-06-07 17:34:17 UTC (rev 349) +++ LinuxBIOSv3/Kconfig 2007-06-09 17:43:26 UTC (rev 350) @@ -76,71 +76,32 @@ choice prompt "Payload type" - default PAYLOAD_ELF + default PAYLOAD_NONE -config PAYLOAD_FILO - bool "FILO" +config PAYLOAD_ELF + bool "An ELF executable payload file" help - TODO + Select this option if you have a payload image (an ELF file) + which LinuxBIOS should run as soon as the basic hardware + initialization is completed. -config PAYLOAD_ETHERBOOT - bool "Etherboot" - help - TODO + You will be able to specify the location and file name of the + payload image later. -config PAYLOAD_MEMTEST86 - bool "Memtest86" +config PAYLOAD_NONE + bool "No payload" help - TODO + Select this option if you want to create an "empty" LinuxBIOS + ROM image for a certain mainboard, i.e. a LinuxBIOS ROM image + which does not yet contain a payload. -config PAYLOAD_LINUX - bool "Linux kernel" - help - TODO + For such an image to be useful, you have to use the 'lar' tool + to add a payload to the ROM image later. -config PAYLOAD_ELF - bool "Any ELF executable" - help - TODO - -config PAYLOAD_DUMMY - bool "Dummy payload" - help - For testing purposes only. - endchoice -config PAYLOAD_FILO_DIR - string "FILO source code directory" - depends PAYLOAD_FILO - default "/tmp/filo-0.5" - help - The directory where the FILO source code is located. - -config PAYLOAD_FILO_CONFIGFILE - string "Filename of the FILO 'Config' file" - depends PAYLOAD_FILO - default "Config" - help - The filename of the FILO 'Config' file to use. This file must reside - in the directory specified via PAYLOAD_FILO_DIR. - -config PAYLOAD_LINUX_DIR - string "Linux kernel source code directory" - depends PAYLOAD_LINUX - default "/usr/src/linux" - help - The directory where the Linux kernel source code is located. - -config PAYLOAD_LINUX_CONFIGFILE - string "Path and filename of the Linux .config file to use" - depends PAYLOAD_LINUX - default ".config" # FIXME! - help - The path and filename of the Linux .config file to use. - -config PAYLOAD_ELF_FILE - string "Path and filename of the ELF file to use as payload" +config PAYLOAD_FILE + string "Payload path and filename" depends PAYLOAD_ELF default "payload.elf" help Modified: LinuxBIOSv3/README =================================================================== --- LinuxBIOSv3/README 2007-06-07 17:34:17 UTC (rev 349) +++ LinuxBIOSv3/README 2007-06-09 17:43:26 UTC (rev 350) @@ -6,7 +6,7 @@ BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes -one of many possible payloads, e.g. a Linux kernel. +one of many possible payloads. Payloads @@ -39,38 +39,91 @@ * http://www.linuxbios.org/Supported_Chipsets_and_Devices -Building and Installing +Building And Installing ----------------------- Note: Currently only the x86 QEMU target is supported in LinuxBIOSv3. 1) Build a payload: - For example: FILO. + THIS IS NOT IMPLEMENTED YET. PLEASE BUILD YOUR PAYLOAD MANUALLY. + $ make payload + + This step is optional. The 'make payload' command will execute a + helper tool which allows you to easily build and configure a wide + variety of payloads. The result of this step is usually a file + called 'payload.elf' in the top-level directory. + 2) Configure LinuxBIOS: $ make menuconfig - Select at least the desired mainboard vendor, the mainboard device, - the size of your ROM chip, and a payload. + Select at least the desired mainboard vendor, the mainboard device, and + the size of your ROM chip. Per default LinuxBIOS will look for a file + called 'payload.elf' in the current directory and use that as the payload. + If that's not what you want, you can change the path/filename of the + payload to use some other payload file. Or you can choose 'No payload' + in the configuration menu, in which case the resulting LinuxBIOS ROM image + will not contain any payload. You'll have to manually add a payload + later using the 'lar' utility for the LinuxBIOS ROM image to be useful. + 3) Build the LinuxBIOS ROM image: $ make - The generated ROM image is build/linuxbios.rom. + The generated ROM image is the file linuxbios.rom in the build/ directory. -4) You can now test the LinuxBIOS image using: +4) Flash the LinuxBIOS ROM image on a BIOS chip: + $ flashrom -wv linuxbios.rom + + NOTE: This step will OVERWRITE the current BIOS located on the ROM chip! + Make sure you have adequate backup facilities before performing this + step, otherwise you might not be able to recover in case of problems. + If you have any questions, please contact us on the mailing list! + + The 'flashrom' tool is located in util/flashrom where you can build it + from source code by typing 'make'. Alternatively, your favorite Linux + distribution might ship a 'flashrom' package which provides the 'flashrom' + program in (e.g.) /usr/bin. On Debian GNU/Linux systems you can get + the flashrom package via 'apt-get install flashrom'. + + +Testing LinuxBIOS Without Modifying Your Hardware +------------------------------------------------- + +If you want to test LinuxBIOS without any risks before you really decide +to use it on your hardware, you can use the QEMU system emulator to run +LinuxBIOS virtually in QEMU. + +The required steps are: + + $ make menuconfig + + Select 'Emulated systems' as mainboard vendor and 'QEMU x86' as + mainboard model. + + $ make + $ qemu -L build -hda /dev/zero -serial stdio - If you have a full QEMU image with a Linux distribution installed, - you can boot that Linux kernel by using a proper FILO payload and typing: + This will run LinuxBIOS in QEMU and output all debugging messages (which + are usually emitted to a serial console) on stdout. It will not do + anything useful beyond that, as you provided no virtual harddrive to + QEMU (-hda /dev/zero). + If you have a full QEMU hard drive image (say /tmp/qemu.img) with a Linux + distribution installed, you can boot that Linux kernel by using a proper + FILO payload with LinuxBIOS and typing: + $ qemu -L build -hda /tmp/qemu.img -serial stdio + Installing a Linux distribution in QEMU and building the FILO payload is + beyond the scope of this document. + Website and Mailing List ------------------------ @@ -92,10 +145,9 @@ LinuxBIOS is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", -and some files (mostly those derived from the Linux kernel) are licensed under -the "GPL, version 2". For some parts, which were derived from other projects, -other (GPL-compatible) licenses may apply. Please check the individual -source files for details. +and some files are licensed under the "GPL, version 2". For some parts, +which were derived from other Free Software projects, other (GPL-compatible) +licenses may apply. Please check the individual source files for details. This makes the resulting LinuxBIOS images licensed under the GPL, version 2. Modified: LinuxBIOSv3/arch/x86/Makefile =================================================================== --- LinuxBIOSv3/arch/x86/Makefile 2007-06-07 17:34:17 UTC (rev 349) +++ LinuxBIOSv3/arch/x86/Makefile 2007-06-09 17:43:26 UTC (rev 350) @@ -36,14 +36,25 @@ ROM_SIZE := $(shell expr $(CONFIG_LINUXBIOS_ROMSIZE_KB) \* 1024) -$(obj)/linuxbios.rom: $(obj)/linuxbios.bootblock $(obj)/util/lar/lar lzma $(obj)/linuxbios.initram $(obj)/linuxbios.stage2 $(obj)/option_table payload +$(obj)/linuxbios.rom: $(obj)/linuxbios.bootblock $(obj)/util/lar/lar lzma $(obj)/linuxbios.initram $(obj)/linuxbios.stage2 $(obj)/option_table payload_compress $(Q)rm -rf $(obj)/lar.tmp $(Q)mkdir $(obj)/lar.tmp $(Q)mkdir $(obj)/lar.tmp/normal $(Q)cp $(obj)/linuxbios.initram $(obj)/lar.tmp/normal/initram $(Q)cp $(obj)/linuxbios.stage2 $(obj)/lar.tmp/normal/stage2 $(Q)cp $(obj)/option_table $(obj)/lar.tmp/normal/option_table - $(Q)cp $(CONFIG_PAYLOAD) $(obj)/lar.tmp/normal/payload +ifeq ($(CONFIG_PAYLOAD_NONE),y) + $(Q)printf " PAYLOAD none (as specified by user)\n" +else + $(Q)# TODO: Print sth. other than $(CONFIG_PAYLOAD_FILE) if compressed. + $(Q)if [ -r $(CONFIG_PAYLOAD_FILE) ]; then \ + printf " PAYLOAD $(CONFIG_PAYLOAD_FILE)\n"; \ + cp $(CONFIG_PAYLOAD_FILE) $(obj)/lar.tmp/normal/payload; \ + else \ + printf "Error: payload file '$(CONFIG_PAYLOAD_FILE)' not found.\n"; \ + exit 1; \ + fi +endif $(Q)printf " LAR $(subst $(shell pwd)/,,$(@))\n" $(Q)cd $(obj)/lar.tmp && ../util/lar/lar -c ../linuxbios.rom . \ -s $(ROM_SIZE) -b $(obj)/linuxbios.bootblock @@ -147,15 +158,17 @@ # -# The payload as we love it. Get it from somewhere. -# Is this a place to incorporate buildrom? +# TODO: Compress the payload (CONFIG_PAYLOAD_FILE) with the default compressor. # -# TODO: This is not implemented yet. -# TODO: This needs to be compressed with the default compressor. -# -payload: - $(Q)printf " BUILD PAYLOAD (skipped)\n" +payload_compress: +ifeq ($(CONFIG_PAYLOAD_NONE),y) +else +ifeq ($(CONFIG_DEFAULT_COMPRESSION_NONE),y) +else + $(Q)printf " ZIP $(CONFIG_PAYLOAD_FILE) (skipped)\n" +endif +endif # Modified: LinuxBIOSv3/lib/Makefile =================================================================== --- LinuxBIOSv3/lib/Makefile 2007-06-07 17:34:17 UTC (rev 349) +++ LinuxBIOSv3/lib/Makefile 2007-06-09 17:43:26 UTC (rev 350) @@ -33,7 +33,9 @@ # lzma: +ifeq ($(CONFIG_DEFAULT_COMPRESSION_LZMA),y) $(Q)printf " BUILD LZMA (skipped)\n" +endif $(obj)/lib/%.o: $(src)/lib/%.c $(Q)mkdir -p $(obj)/lib

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[LinuxBIOS] [PATCH] Add generic Intel i82801 support
by Corey Osgood 09 Jun '07

09 Jun '07

See patch. I'm still waiting on a response from Steve just to confirm GPLv2 on a couple files, and I'd like Yinghai to make sure those details are correct as well (ie were you working for Tyan at the time, and is that the right email address to use?). Other than that, it's as done as I'm getting it. BTW, i810 will be on its way again soon, I'm trying to get vga working first. -Corey

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Re: [LinuxBIOS] Advantech SOM-4455F
by Peter Stuge 08 Jun '07

08 Jun '07

Going back on list.. On Sat, Jun 09, 2007 at 12:07:39AM +0600, Richard Neill Dabney wrote: > The illegal instruction is in the callbiosint16 function where CR0 > is loaded to turn of protected mode. Aha. > I looked at the emulator code and sure enough, that sequence of > 'movl %cr0,%eax' (0x0f, 0x20,0xc0) is illegal. > It makes no sense. Did this ever work? It does work for several other VGA BIOSes. They probably do not try to switch to PM. So I guess x86emu doesn't handle protected mode. Could vm86 work instead of x86emu? //Peter

2 1

[LinuxBIOS] Advantech SOM-4455F
by Richard Neill Dabney 08 Jun '07

08 Jun '07

I have LBv2 booting with EB/Filo on this board but I'm having trouble with the VGA, both onboard and PCI. With a S3 968 card it jumps into the VGA BIOS through the emulator and then goes off into the weeds. I've read the BIOS code put of memory and compared it to a ROM dump. Where have I gone wrong? Richard Dabney LASG Albuquerque,NM ------------------------------------------------------------------------ LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 starting... _MSR GLCP_SYS_RSTPLL (4c000014) value is: 0000039c:07de002a Done cpuRegInit SMBUS READ ERROR:03 device:a2 Ram1.00 Ram2.00 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 Ram3 DRAM controller init done. RAM DLL lock Ram4 Testing DRAM : 00000000-000a0000 DRAM fill: 00000000-000a0000 00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000 DRAM filled DRAM verify: 00000000-000a0000 00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000 DRAM range verified. Done. POST 02 Past wbinvd Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 booting... end bc8cf26, start 2 32-bit delta 1160 calibrate_tsc 32-bit result is 1160 clocks_per_usec: 1160 Enumerating buses... scan_static_bus for Root Device >> >> Entering northbridge.c: enable_dev with path 6 >> >> Entering northbridge.c: pci_domain_enable >> Enter northbridge_init_early writeglmsr: MSR 0x10000020, val 0x20000000:0x000fff80 writeglmsr: MSR 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: MSR 0x1000002c, val 0x20000000:0x00000003 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SysmemInit: enable for 256MBytes usable RAM: 268304383 bytes SysmemInit: MSR 0x10000028, val 0x2000000f:0xfdf00100 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SMMGL0Init: 268304384 bytes SMMGL0Init: offset is 0x80400000 SMMGL0Init: MSR 0x10000026, val 0x28fbe080:0x400fffe0 writeglmsr: MSR 0x10000080, val 0x00000000:0x00000003 writeglmsr: MSR 0x40000020, val 0x20000000:0x000fff80 writeglmsr: MSR 0x40000021, val 0x20000000:0x080fffe0 writeglmsr: MSR 0x4000002e, val 0x20000000:0x00000003 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SysmemInit: enable for 256MBytes usable RAM: 268304383 bytes SysmemInit: MSR 0x4000002a, val 0x2000000f:0xfdf00100 SMMGL1Init: SMMGL1Init: MSR 0x40000023, val 0x20000080:0x400fffe0 writeglmsr: MSR 0x40000080, val 0x00000000:0x00000001 writeglmsr: MSR 0x400000e3, val 0x60000000:0x033000f0 CPU_RCONF_DEFAULT (1808): 0x25FFF802:0x10FFDF00 CPU_RCONF_BYPASS (180A): 0x00000000 : 0x00000000 L2 cache enabled Enabling cache GLPCI R1: system msr.lo 0x00100130 msr.hi 0x0ffdf000 GLPCI R2: system msr.lo 0x80400120 msr.hi 0x8041f000 Exit northbridge_init_early Done cpubug fixes Not Doing ChipsetFlashSetup() Before VSA: do_vsmbios buf ilen 35441 olen60466 buf 00060000 *buf 186 buf[256k] 0 buf[0x20] signature is b0:10:e6:80 Call real_mode_switch_call_vsm biosint: INT# 0x15 biosint: eax 0xbea7 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x23f34 esp 0xff0 edi 0x240000 esi 0x10038 biosint: ip 0x5b3 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea7 biosint: INT# 0x15 biosint: eax 0xbea4 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x23f34 esp 0xfee edi 0x240000 esi 0x10038 biosint: ip 0x5c1 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea4 do_vsmbios: VSA2 VR signature verified After VSA: Graphics init... VRC_VG value: 0x2808 Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled >> >> Entering northbridge.c: enable_dev with path 7 >> APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... >> >> Entering northbridge.c: pci_domain_scan_bus >> PCI: pci_scan_bus for bus 00 PCI: devfn 0x0, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00024000 malloc 0x00024000 PCI: 00:01.0 [1022/2080] ops PCI: 00:01.0 [1022/2080] enabled malloc Enter, size 668, free_mem_ptr 0002429c malloc 0x0002429c PCI: 00:01.1 [1022/2081] enabled malloc Enter, size 668, free_mem_ptr 00024538 malloc 0x00024538 PCI: 00:01.2 [1022/2082] enabled PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff >> >> Entering northbridge.c: enable_dev with path 2 >> PCI: 00:06.0 [8086/1209] enabled malloc Enter, size 668, free_mem_ptr 000247d4 malloc 0x000247d4 PCI: 00:07.0 [1283/8888] enabled PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00024a70 malloc 0x00024a70 PCI: 00:0c.0 [5333/88f0] enabled PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff cs5536: southbridge_enable: dev is 0001da40 PCI: 00:0f.0 [1022/2090] bus ops PCI: 00:0f.0 [1022/2090] enabled cs5536: southbridge_enable: dev is 0001d7a0 Disabling static device: PCI: 00:0f.1 cs5536: southbridge_enable: dev is 0001d500 PCI: 00:0f.2 [1022/209a] ops PCI: 00:0f.2 [1022/209a] enabled cs5536: southbridge_enable: dev is 0001d260 PCI: 00:0f.3 [1022/2093] enabled cs5536: southbridge_enable: dev is 0001cfc0 PCI: 00:0f.4 [1022/2094] enabled cs5536: southbridge_enable: dev is 0001cd20 PCI: 00:0f.5 [1022/2095] enabled malloc Enter, size 668, free_mem_ptr 00024d0c malloc 0x00024d0c PCI: 00:0f.6 [1022/2096] enabled malloc Enter, size 668, free_mem_ptr 00024fa8 malloc 0x00024fa8 PCI: 00:0f.7 [1022/2097] enabled PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:0f.0 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled scan_static_bus for PCI: 00:0f.0 done PCI: pci_scan_bus returning with max=000 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 >> >> Entering northbridge.c: pci_domain_read_resources >> PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00000400 - 0x000004ff] io PCI: 00:0f.0 20 * [0x00000800 - 0x0000087f] io PCI: 00:0f.3 10 * [0x00000880 - 0x000008ff] io PCI: 00:06.0 14 * [0x00000c00 - 0x00000c3f] io PCI: 00:0f.0 18 * [0x00000c40 - 0x00000c7f] io PCI: 00:0f.0 24 * [0x00000c80 - 0x00000cbf] io PCI: 00:0f.0 1c * [0x00000cc0 - 0x00000cdf] io PCI: 00:0f.2 20 * [0x00000ce0 - 0x00000cef] io PCI: 00:0f.0 10 * [0x00000cf0 - 0x00000cf7] io PCI: 00:01.0 10 * [0x00000d00 - 0x00000d03] io Root Device compute_allocate_io: base: 00000d04 size: 00000904 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0c.0 10 * [0x00000000 - 0x01ffffff] mem PCI: 00:01.1 10 * [0x02000000 - 0x02ffffff] mem PCI: 00:06.0 18 * [0x03000000 - 0x0301ffff] mem PCI: 00:0c.0 30 * [0x03020000 - 0x0302ffff] mem PCI: 00:01.1 14 * [0x03030000 - 0x03033fff] mem PCI: 00:01.1 18 * [0x03034000 - 0x03037fff] mem PCI: 00:01.1 1c * [0x03038000 - 0x0303bfff] mem PCI: 00:01.1 20 * [0x0303c000 - 0x0303ffff] mem PCI: 00:01.2 10 * [0x03040000 - 0x03043fff] mem PCI: 00:0f.6 10 * [0x03044000 - 0x03045fff] mem PCI: 00:06.0 10 * [0x03046000 - 0x03046fff] mem PCI: 00:0f.4 10 * [0x03047000 - 0x03047fff] mem PCI: 00:0f.5 10 * [0x03048000 - 0x03048fff] mem PCI: 00:0f.7 10 * [0x03049000 - 0x03049fff] mem Root Device compute_allocate_mem: base: 0304a000 size: 0304a000 align: 25 gran: 0 done Done reading resources. Allocating VGA resource PCI: 00:0c.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000904 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00001000 - 0x000010ff] io PCI: 00:0f.0 20 * [0x00001400 - 0x0000147f] io PCI: 00:0f.3 10 * [0x00001480 - 0x000014ff] io PCI: 00:06.0 14 * [0x00001800 - 0x0000183f] io PCI: 00:0f.0 18 * [0x00001840 - 0x0000187f] io PCI: 00:0f.0 24 * [0x00001880 - 0x000018bf] io PCI: 00:0f.0 1c * [0x000018c0 - 0x000018df] io PCI: 00:0f.2 20 * [0x000018e0 - 0x000018ef] io PCI: 00:0f.0 10 * [0x000018f0 - 0x000018f7] io PCI: 00:01.0 10 * [0x00001900 - 0x00001903] io Root Device compute_allocate_io: base: 00001904 size: 00000904 align: 8 gran: 0 done Root Device compute_allocate_mem: base: fa000000 size: 0304a000 align: 25 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0c.0 10 * [0xfa000000 - 0xfbffffff] mem PCI: 00:01.1 10 * [0xfc000000 - 0xfcffffff] mem PCI: 00:06.0 18 * [0xfd000000 - 0xfd01ffff] mem PCI: 00:0c.0 30 * [0xfd020000 - 0xfd02ffff] mem PCI: 00:01.1 14 * [0xfd030000 - 0xfd033fff] mem PCI: 00:01.1 18 * [0xfd034000 - 0xfd037fff] mem PCI: 00:01.1 1c * [0xfd038000 - 0xfd03bfff] mem PCI: 00:01.1 20 * [0xfd03c000 - 0xfd03ffff] mem PCI: 00:01.2 10 * [0xfd040000 - 0xfd043fff] mem PCI: 00:0f.6 10 * [0xfd044000 - 0xfd045fff] mem PCI: 00:06.0 10 * [0xfd046000 - 0xfd046fff] mem PCI: 00:0f.4 10 * [0xfd047000 - 0xfd047fff] mem PCI: 00:0f.5 10 * [0xfd048000 - 0xfd048fff] mem PCI: 00:0f.7 10 * [0xfd049000 - 0xfd049fff] mem Root Device compute_allocate_mem: base: fd04a000 size: 0304a000 align: 25 gran: 0 done Root Device assign_resources, bus 0 link: 0 >> >> Entering northbridge.c: pci_domain_set_resources >> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.1 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 00:01.1 14 <- [0x00fd030000 - 0x00fd033fff] mem PCI: 00:01.1 18 <- [0x00fd034000 - 0x00fd037fff] mem PCI: 00:01.1 1c <- [0x00fd038000 - 0x00fd03bfff] mem PCI: 00:01.1 20 <- [0x00fd03c000 - 0x00fd03ffff] mem PCI: 00:01.2 10 <- [0x00fd040000 - 0x00fd043fff] mem PCI: 00:06.0 10 <- [0x00fd046000 - 0x00fd046fff] mem PCI: 00:06.0 14 <- [0x0000001800 - 0x000000183f] io PCI: 00:06.0 18 <- [0x00fd000000 - 0x00fd01ffff] mem PCI: 00:0c.0 10 <- [0x00fa000000 - 0x00fbffffff] mem PCI: 00:0c.0 30 <- [0x00fd020000 - 0x00fd02ffff] romem PCI: 00:0f.0 10 <- [0x00000018f0 - 0x00000018f7] io PCI: 00:0f.0 14 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 18 <- [0x0000001840 - 0x000000187f] io PCI: 00:0f.0 1c <- [0x00000018c0 - 0x00000018df] io PCI: 00:0f.0 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:0f.0 24 <- [0x0000001880 - 0x00000018bf] io PCI: 00:0f.0 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] io PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] irq PCI: 00:0f.0 assign_resources, bus 0 link: 0 PCI: 00:0f.2 20 <- [0x00000018e0 - 0x00000018ef] io PCI: 00:0f.3 10 <- [0x0000001480 - 0x00000014ff] io PCI: 00:0f.4 10 <- [0x00fd047000 - 0x00fd047fff] mem PCI: 00:0f.5 10 <- [0x00fd048000 - 0x00fd048fff] mem PCI: 00:0f.6 10 <- [0x00fd044000 - 0x00fd045fff] mem PCI: 00:0f.7 10 <- [0x00fd049000 - 0x00fd049fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:01.0 cmd <- 145 PCI: 00:01.1 cmd <- 142 PCI: 00:01.2 cmd <- 142 PCI: 00:06.0 subsystem <- 00/00 PCI: 00:06.0 cmd <- 143 PCI: 00:07.0 cmd <- 147 PCI: 00:0c.0 cmd <- 1c3 cs5536: cs5536_pci_dev_enable_resources() PCI: 00:0f.0 cmd <- 149 w83627hf hwm smbus enabled PCI: 00:0f.2 cmd <- 141 PCI: 00:0f.3 subsystem <- 00/00 PCI: 00:0f.3 cmd <- 141 PCI: 00:0f.4 subsystem <- 00/00 PCI: 00:0f.4 cmd <- 142 PCI: 00:0f.5 subsystem <- 00/00 PCI: 00:0f.5 cmd <- 142 PCI: 00:0f.6 cmd <- 142 PCI: 00:0f.7 cmd <- 142 done. Initializing devices... Root Device init SOM4455F ENTER init SOM4455F EXIT init PCI: 00:06.0 init PCI: 00:0f.0 init cs5536: southbridge_init RTC Init GPIO_ADDR: 00001000 Not disabling COM1 due to a bug ... cs5536: southbridge_init: enable_ide_nand_flash is 0 PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.5 init PNP: 002e.b init PCI: 00:0f.2 init cs5536_ide: ide_init PCI: 00:0f.3 init PCI: 00:0f.4 init PCI: 00:0f.5 init APIC_CLUSTER: 0 init >> >> Entering northbridge.c: cpu_bus_init >> malloc Enter, size 668, free_mem_ptr 00025244 malloc 0x00025244 Initializing CPU #0 CPU: vendor AMD device 5a2 CPU: family 05, model 0a, stepping 02 model_lx_init Enabling cache A20 (0x92): 2 A20 (0x92): 2 CPU model_lx_init DONE CPU #0 Initialized PCI: 00:01.0 init >> >> Entering northbridge.c: northbridge_init >> PCI: 00:01.1 init PCI: 00:01.2 init PCI: 00:07.0 init PCI: 00:0c.0 init rom address for PCI: 00:0c.0 = fd020000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0138 PCI ROM Image, Vendor 5333, Device 88f0, PCI ROM Image, Class Code 000003, Code Type 00 copying VGA ROM Image from 0xfd020000 to 0xc0000, 0x8000 bytes entering emulator 0000:60b6: 20 ILLEGAL EXTENDED X86 OPCODE! halt_sys: file /home/rdabney/linuxbios/LinuxBIOSv2.053107/src/devices/emulator/x86emu/ops2.c, line 60 PCI: 00:0f.6 init PCI: 00:0f.7 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 /home/rdabney/linuxbios/LinuxBIOSv2.053107/src/arch/i386/boot/pirq_routing.c: 36:check_pirq_routing_table() - checksum is: 0x0e but should be: 0x62 done. write_pirq_routing_table(8000785C, BABA) PIR Entry 0 Dev/Fn: 78 Slot: 0 INT: A bitmap: 400 PIRQ: 10 INT: B bitmap: 800 PIRQ: 11 INT: C bitmap: 400 PIRQ: 10 INT: D bitmap: 800 PIRQ: 11 PIR Entry 1 Dev/Fn: 8 Slot: 0 INT: A bitmap: 400 PIRQ: 10 INT: B bitmap: 0 PIRQ: 0 INT: C bitmap: 0 PIRQ: 0 INT: D bitmap: 0 PIRQ: 0 PIR Entry 2 Dev/Fn: 48 Slot: 1 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 3 Dev/Fn: 50 Slot: 2 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 4 Dev/Fn: 58 Slot: 3 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 5 Dev/Fn: 60 Slot: 4 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 6 Dev/Fn: 30 Slot: 5 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 7 Dev/Fn: 28 Slot: 6 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 000006d4 checksum 751a Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfff89000 - 0xfffeffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(10): Etherboot n_type: 00000002 n_name(8): ELFBoot n_desc(6): 5.2.6 Loading Etherboot version: 5.2.6 Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 000254e0 malloc 0x000254e0 New segment addr 0x20000 size 0x3c050 offset 0xb0 filesize 0x10ac8 (cleaned up) New segment addr 0x20000 size 0x3c050 offset 0xb0 filesize 0x10ac8 lb: [0x0000000000004000, 0x0000000000028000) segment: [0x0000000000020000, 0x0000000000030ac8, 0x000000000005c050) malloc Enter, size 32, free_mem_ptr 00025500 malloc 0x00025500 late: [0x0000000000028000, 0x0000000000030ac8, 0x000000000005c050) bounce: [0x000000000f7b4000, 0x000000000f7bc000, 0x000000000f7bc000) Loading Segment: addr: 0x000000000f7b4000 memsz: 0x0000000000008000 filesz: 0x0000000000008000 [ 0x000000000f7b4000, 000000000f7bc000, 0x000000000f7bc000) <- 00000000000000b0 Loading Segment: addr: 0x0000000000028000 memsz: 0x0000000000034050 filesz: 0x0000000000008ac8 [ 0x0000000000028000, 0000000000030ac8, 0x000000000005c050) <- 00000000000080b0 Clearing Segment: addr: 0x0000000000030ac8 memsz: 0x000000000002b588 Loaded segments verified segments closed down stream Jumping to boot code at 0x20000 entry = 0x00020000 lb_start = 0x00004000 lb_size = 0x00024000 adjust = 0x0f7b8000 buffer = 0x0f798000 elf_boot_notes = 0x0001eb00 adjusted_boot_notes = 0x0f7d6b00 ROM segment 0xcf79 length 0x01c2 reloc 0x00020000 CPU 515 Mhz Etherboot 5.2.6 (GPL) http://etherboot.org Tagged ELF for [EEPRO100][FILO] Relocating _text from: [00020000,0005d590) to [0f6c2a70,0f700000) Boot from (N)etwork (D)isk or (Q)uit? Probing pci disk... [FILO]FILO version 0.4.1 (rdabney@rdabney-linux) Thu Jun 7 10:00:32 MDT 2007 boot: hda1:/vmlinuz initrd=/initrd.img ro root=/dev/hda1 acpi=no console=tty0 console=ttyS0,115200 hda: LBA: Maxtor 91366U4 Mounted ext2fs Found Linux version 2.6.20.4 (root@scout-rdabney) #1 Wed May 30 09:15:58 MDT 2007 bzImage. Loading kernel... ok Loading initrd... ok Jumping to entry point... Linux version 2.6.20.4 (root@scout-rdabney) (gcc version 4.1.2 (Ubuntu 4.1.2-0ubuntu4)) #1 Wed May 30 09:15:58 MDT 2007 BIOS-provided physical RAM map: sanitize start sanitize end copy_e820_map() start: 0000000000000000 size: 0000000000001000 end: 0000000000001000 type: 16 copy_e820_map() start: 0000000000001000 size: 000000000009f000 end: 00000000000a0000 type: 1 copy_e820_map() type is E820_RAM copy_e820_map() start: 00000000000f0000 size: 0000000000010000 end: 0000000000100000 type: 16 copy_e820_map() start: 0000000000100000 size: 000000000f6e0000 end: 000000000f7e0000 type: 1 copy_e820_map() type is E820_RAM BIOS-e820: 0000000000000000 - 0000000000001000 type 16 BIOS-e820: 0000000000001000 - 00000000000a0000 (usable) BIOS-e820: 00000000000f0000 - 0000000000100000 type 16 BIOS-e820: 0000000000100000 - 000000000f7e0000 (usable) Malformed early option 'acpi' 247MB LOWMEM available. Zone PFN ranges: DMA 0 -> 4096 Normal 4096 -> 63456 early_node_map[1] active PFN ranges 0: 0 -> 63456 DMI not present or invalid. ACPI: Unable to locate RSDP Allocating PCI resources starting at 10000000 (gap: 0f7e0000:f0820000) Detected 499.931 MHz processor. Built 1 zonelists. Total pages: 62961 Kernel command line: ro root=/dev/hda1 acpi=no console=tty0 console=ttyS0,115200 Initializing CPU#0 PID hash table entries: 1024 (order: 10, 4096 bytes) Console: colour dummy device 80x25 Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) Memory: 247492k/253824k available (2398k kernel code, 5836k reserved, 901k data, 164k init, 0k highmem) virtual kernel memory layout: fixmap : 0xffff8000 - 0xfffff000 ( 28 kB) vmalloc : 0xd0000000 - 0xffff6000 ( 767 MB) lowmem : 0xc0000000 - 0xcf7e0000 ( 247 MB) .init : 0xc043c000 - 0xc0465000 ( 164 kB) .data : 0xc035786f - 0xc0438d0c ( 901 kB) .text : 0xc0100000 - 0xc035786f (2398 kB) Checking if this processor honours the WP bit even in supervisor mode... Ok. Calibrating delay using timer specific routine.. 1001.09 BogoMIPS (lpj=2002188) Mount-cache hash table entries: 512 CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) CPU: L2 Cache: 128K (32 bytes/line) Compat vDSO mapped to ffffe000. CPU: AMD Geode(TM) Integrated Processor by AMD PCS stepping 02 Checking 'hlt' instruction... OK. NET: Registered protocol family 16 PCI: Using configuration type 1 Setting up standard PCI resources ACPI: Interpreter disabled. SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb PCI: Probing PCI hardware PCI: Firmware left 0000:00:06.0 e100 interrupts enabled, disabling 0000:00:0f.2: cannot adjust BAR0 (not I/O) 0000:00:0f.2: cannot adjust BAR1 (not I/O) 0000:00:0f.2: cannot adjust BAR2 (not I/O) 0000:00:0f.2: cannot adjust BAR3 (not I/O) PCI: Using IRQ router default [1022/2090] at 0000:00:0f.0 PCI: Ignore bogus resource 6 [0:0] of 0000:00:01.1 NET: Registered protocol family 2 IP route cache hash table entries: 2048 (order: 1, 8192 bytes) TCP established hash table entries: 8192 (order: 3, 32768 bytes) TCP bind hash table entries: 4096 (order: 2, 16384 bytes) TCP: Hash tables configured (established 8192 bind 4096) TCP reno registered scx200: NatSemi SCx200 Driver NTFS driver 2.1.28 [Flags: R/W DEBUG]. io scheduler noop registered io scheduler anticipatory registered (default) io scheduler deadline registered io scheduler cfq registered vga16fb: mapped to 0xc00a0000 Console: switching to colour frame buffer device 80x30 fb0: VGA16 VGA frame buffer device Real Time Clock Driver v1.12ac Non-volatile memory driver v1.2 AMD Geode RNG detected Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize loop: loaded (max 8 devices) e100: Intel(R) PRO/100 Network Driver, 3.5.17-k2-NAPI e100: Copyright(c) 1999-2006 Intel Corporation PCI: Guessed IRQ 11 for device 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.4 PCI: Sharing IRQ 11 with 0000:00:0f.5 e100: eth0: e100_probe: addr 0xfd046000, irq 11, MAC addr 00:D0:C9:9F:63:84 Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx hda: Maxtor 91366U4, ATA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 hda: max request size: 128KiB hda: Host Protected Area detected. current capacity is 26587576 sectors (13612 MB) native capacity is 26588016 sectors (13613 MB) hda: task_no_data_intr: status=0x51 { DriveReady SeekComplete Error } hda: task_no_data_intr: error=0x04 { DriveStatusError } ide: failed opcode was: 0xf9 hda: 26587576 sectors (13612 MB) w/2048KiB Cache, CHS=26376/16/63 hda: cache flushes not supported hda: hda1 hda2 < hda5 > SCSI Media Changer driver v0.25 PCI: Guessed IRQ 11 for device 0000:00:0f.5 PCI: Sharing IRQ 11 with 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.4 ehci_hcd 0000:00:0f.5: EHCI Host Controller ehci_hcd 0000:00:0f.5: new USB bus registered, assigned bus number 1 ehci_hcd 0000:00:0f.5: irq 11, io mem 0xfd048000 ehci_hcd 0000:00:0f.5: USB 2.0 started, EHCI 1.00, driver 10 Dec 2004 usb usb1: configuration #1 chosen from 1 choice hub 1-0:1.0: USB hub found hub 1-0:1.0: 4 ports detected PCI: Guessed IRQ 11 for device 0000:00:0f.4 PCI: Sharing IRQ 11 with 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.5 ohci_hcd 0000:00:0f.4: OHCI Host Controller ohci_hcd 0000:00:0f.4: new USB bus registered, assigned bus number 2 ohci_hcd 0000:00:0f.4: irq 11, io mem 0xfd047000 usb usb2: configuration #1 chosen from 1 choice hub 2-0:1.0: USB hub found hub 2-0:1.0: 4 ports detected USB Universal Host Controller Interface driver v3.0 Initializing USB Mass Storage driver... usbcore: registered new interface driver usb-storage USB Mass Storage support registered. usbcore: registered new interface driver hiddev usbcore: registered new interface driver usbhid drivers/usb/input/hid-core.c: v2.6:USB HID core driver serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: AT Translated Set 2 keyboard as /class/input/input0 input: PC Speaker as /class/input/input1 input: ImPS/2 Generic Wheel Mouse as /class/input/input2 i2c /dev entries driver **WARNING** I2C adapter driver [CS5536 ACB0] forgot to specify physical device; fix it! Advanced Linux Sound Architecture Driver Version 1.0.14rc1 (Tue Jan 09 09:56:17 2007 UTC). PCI: Guessed IRQ 11 for device 0000:00:0f.3 ALSA device list: #0: CS5535 Audio cs5535audio at 0x1480, irq 11 IPv4 over IPv4 tunneling driver TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 1 NET: Registered protocol family 17 NET: Registered protocol family 15 Using IPI Shortcut mode BIOS EDD facility v0.16 2004-Jun-25, 0 devices found Time: tsc clocksource has been installed. EDD information not available. kjournald starting. Commit interval 5 seconds EXT3-fs: mounted filesystem with ordered data mode. VFS: Mounted root (ext3 filesystem) readonly. Freeing unused kernel memory: 164k freed * Setting preliminary keymap... [ OK ] * Preparing restricted drivers... [ OK ] * Starting basic networking... [ OK ] * Starting kernel event manager... udevd[965]: add_to_rules: invalid SUBSYSTEMS operation udevd[965]: add_to_rules: invalid rule '/etc/udev/rules.d/99-sdcard.rules:3' udevd[965]: add_to_rules: invalid SUBSYSTEMS operation udevd[965]: add_to_rules: invalid rule '/etc/udev/rules.d/99-sdcard.rules:6' [ OK ] * Loading hardware drivers... e100: eth1: e100_watchdog: link up, 100Mbps, full-duplex PCI: Guessed IRQ 10 for device 0000:00:01.2 PCI: Sharing IRQ 10 with 0000:00:01.1 geode-aes: GEODE AES engine enabled. [ OK ] * Loading kernel modules... * Loading manual drivers... [ OK ] * Activating swap... [ OK ] * Checking root file system... fsck 1.40-WIP (14-Nov-2006) /dev/hda1: clean, 213733/1586144 files, 1262340/3170821 blocks [ OK ] * Checking file systems... fsck 1.40-WIP (14-Nov-2006) [ OK ] * Mounting local filesystems... [ OK ] * Activating swapfile swap... [ OK ] * Configuring network interfaces... [ OK ] * Setting sensors limits... [ OK ] * Starting system log daemon... [ OK ] * Starting kernel log... [ OK ] * Starting internet superserver inetd [ OK ] * Starting deferred execution scheduler atd [ OK ] * Starting periodic command scheduler crond [ OK ] * Enabling additional executable binary formats binfmt-support [ OK ] * Running local boot scripts (/etc/rc.local) [ OK ] * Stopping internet superserver inetd [ OK ] * Shutting down ALSA... [ OK ] * Terminating all remaining processes... [ OK ] * Sending all processes the KILL signal... [ OK ] * Deactivating swap... [ OK ] * Unmounting local filesystems... [ OK ] * Will now restart Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 booting... LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 starting... _MSR GLCP_SYS_RSTPLL (4c000014) value is: 0000039c:0000182a Configuring PLL LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 starting... _MSR GLCP_SYS_RSTPLL (4c000014) value is: 0000039c:07de002a Done cpuRegInit SMBUS READ ERROR:03 device:a2 Ram1.00 Ram2.00 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 SMBUS READ ERROR:03 device:a2 Ram3 DRAM controller init done. RAM DLL lock Ram4 Testing DRAM : 00000000-000a0000 DRAM fill: 00000000-000a0000 00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000 DRAM filled DRAM verify: 00000000-000a0000 00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000 DRAM range verified. Done. POST 02 Past wbinvd Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0Normal Thu Jun 7 13:45:30 MDT 2007 booting... end bca1d22, start 2 32-bit delta 1160 calibrate_tsc 32-bit result is 1160 clocks_per_usec: 1160 Enumerating buses... scan_static_bus for Root Device >> >> Entering northbridge.c: enable_dev with path 6 >> >> Entering northbridge.c: pci_domain_enable >> Enter northbridge_init_early writeglmsr: MSR 0x10000020, val 0x20000000:0x000fff80 writeglmsr: MSR 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: MSR 0x1000002c, val 0x20000000:0x00000003 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SysmemInit: enable for 256MBytes usable RAM: 268304383 bytes SysmemInit: MSR 0x10000028, val 0x2000000f:0xfdf00100 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SMMGL0Init: 268304384 bytes SMMGL0Init: offset is 0x80400000 SMMGL0Init: MSR 0x10000026, val 0x28fbe080:0x400fffe0 writeglmsr: MSR 0x10000080, val 0x00000000:0x00000003 writeglmsr: MSR 0x40000020, val 0x20000000:0x000fff80 writeglmsr: MSR 0x40000021, val 0x20000000:0x080fffe0 writeglmsr: MSR 0x4000002e, val 0x20000000:0x00000003 sizeram: _MSR MC_CF07_DATA: 10076013:00003a40 sizeram: sizem 0x100MB SysmemInit: enable for 256MBytes usable RAM: 268304383 bytes SysmemInit: MSR 0x4000002a, val 0x2000000f:0xfdf00100 SMMGL1Init: SMMGL1Init: MSR 0x40000023, val 0x20000080:0x400fffe0 writeglmsr: MSR 0x40000080, val 0x00000000:0x00000001 writeglmsr: MSR 0x400000e3, val 0x60000000:0x033000f0 CPU_RCONF_DEFAULT (1808): 0x25FFF802:0x10FFDF00 CPU_RCONF_BYPASS (180A): 0x00000000 : 0x00000000 L2 cache enabled Enabling cache GLPCI R1: system msr.lo 0x00100130 msr.hi 0x0ffdf000 GLPCI R2: system msr.lo 0x80400120 msr.hi 0x8041f000 Exit northbridge_init_early Done cpubug fixes Not Doing ChipsetFlashSetup() Before VSA: do_vsmbios buf ilen 35441 olen60466 buf 00060000 *buf 186 buf[256k] 0 buf[0x20] signature is b0:10:e6:80 Call real_mode_switch_call_vsm biosint: INT# 0x15 biosint: eax 0xbea7 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x23f34 esp 0xff0 edi 0x240000 esi 0x10038 biosint: ip 0x5b3 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea7 biosint: INT# 0x15 biosint: eax 0xbea4 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x23f34 esp 0xfee edi 0x240000 esi 0x10038 biosint: ip 0x5c1 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea4 do_vsmbios: VSA2 VR signature verified After VSA: Graphics init... VRC_VG value: 0x2808 Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled >> >> Entering northbridge.c: enable_dev with path 7 >> APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... >> >> Entering northbridge.c: pci_domain_scan_bus >> PCI: pci_scan_bus for bus 00 PCI: devfn 0x0, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00024000 malloc 0x00024000 PCI: 00:01.0 [1022/2080] ops PCI: 00:01.0 [1022/2080] enabled malloc Enter, size 668, free_mem_ptr 0002429c malloc 0x0002429c PCI: 00:01.1 [1022/2081] enabled malloc Enter, size 668, free_mem_ptr 00024538 malloc 0x00024538 PCI: 00:01.2 [1022/2082] enabled PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff >> >> Entering northbridge.c: enable_dev with path 2 >> PCI: 00:06.0 [8086/1209] enabled malloc Enter, size 668, free_mem_ptr 000247d4 malloc 0x000247d4 PCI: 00:07.0 [1283/8888] enabled PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00024a70 malloc 0x00024a70 PCI: 00:0c.0 [5333/88f0] enabled PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff cs5536: southbridge_enable: dev is 0001da40 PCI: 00:0f.0 [1022/2090] bus ops PCI: 00:0f.0 [1022/2090] enabled cs5536: southbridge_enable: dev is 0001d7a0 Disabling static device: PCI: 00:0f.1 cs5536: southbridge_enable: dev is 0001d500 PCI: 00:0f.2 [1022/209a] ops PCI: 00:0f.2 [1022/209a] enabled cs5536: southbridge_enable: dev is 0001d260 PCI: 00:0f.3 [1022/2093] enabled cs5536: southbridge_enable: dev is 0001cfc0 PCI: 00:0f.4 [1022/2094] enabled cs5536: southbridge_enable: dev is 0001cd20 PCI: 00:0f.5 [1022/2095] enabled malloc Enter, size 668, free_mem_ptr 00024d0c malloc 0x00024d0c PCI: 00:0f.6 [1022/2096] enabled malloc Enter, size 668, free_mem_ptr 00024fa8 malloc 0x00024fa8 PCI: 00:0f.7 [1022/2097] enabled PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:0f.0 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled scan_static_bus for PCI: 00:0f.0 done PCI: pci_scan_bus returning with max=000 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 >> >> Entering northbridge.c: pci_domain_read_resources >> PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00000400 - 0x000004ff] io PCI: 00:0f.0 20 * [0x00000800 - 0x0000087f] io PCI: 00:0f.3 10 * [0x00000880 - 0x000008ff] io PCI: 00:06.0 14 * [0x00000c00 - 0x00000c3f] io PCI: 00:0f.0 18 * [0x00000c40 - 0x00000c7f] io PCI: 00:0f.0 24 * [0x00000c80 - 0x00000cbf] io PCI: 00:0f.0 1c * [0x00000cc0 - 0x00000cdf] io PCI: 00:0f.2 20 * [0x00000ce0 - 0x00000cef] io PCI: 00:0f.0 10 * [0x00000cf0 - 0x00000cf7] io PCI: 00:01.0 10 * [0x00000d00 - 0x00000d03] io Root Device compute_allocate_io: base: 00000d04 size: 00000904 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0c.0 10 * [0x00000000 - 0x01ffffff] mem PCI: 00:01.1 10 * [0x02000000 - 0x02ffffff] mem PCI: 00:06.0 18 * [0x03000000 - 0x0301ffff] mem PCI: 00:0c.0 30 * [0x03020000 - 0x0302ffff] mem PCI: 00:01.1 14 * [0x03030000 - 0x03033fff] mem PCI: 00:01.1 18 * [0x03034000 - 0x03037fff] mem PCI: 00:01.1 1c * [0x03038000 - 0x0303bfff] mem PCI: 00:01.1 20 * [0x0303c000 - 0x0303ffff] mem PCI: 00:01.2 10 * [0x03040000 - 0x03043fff] mem PCI: 00:0f.6 10 * [0x03044000 - 0x03045fff] mem PCI: 00:06.0 10 * [0x03046000 - 0x03046fff] mem PCI: 00:0f.4 10 * [0x03047000 - 0x03047fff] mem PCI: 00:0f.5 10 * [0x03048000 - 0x03048fff] mem PCI: 00:0f.7 10 * [0x03049000 - 0x03049fff] mem Root Device compute_allocate_mem: base: 0304a000 size: 0304a000 align: 25 gran: 0 done Done reading resources. Allocating VGA resource PCI: 00:0c.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000904 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00001000 - 0x000010ff] io PCI: 00:0f.0 20 * [0x00001400 - 0x0000147f] io PCI: 00:0f.3 10 * [0x00001480 - 0x000014ff] io PCI: 00:06.0 14 * [0x00001800 - 0x0000183f] io PCI: 00:0f.0 18 * [0x00001840 - 0x0000187f] io PCI: 00:0f.0 24 * [0x00001880 - 0x000018bf] io PCI: 00:0f.0 1c * [0x000018c0 - 0x000018df] io PCI: 00:0f.2 20 * [0x000018e0 - 0x000018ef] io PCI: 00:0f.0 10 * [0x000018f0 - 0x000018f7] io PCI: 00:01.0 10 * [0x00001900 - 0x00001903] io Root Device compute_allocate_io: base: 00001904 size: 00000904 align: 8 gran: 0 done Root Device compute_allocate_mem: base: fa000000 size: 0304a000 align: 25 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0c.0 10 * [0xfa000000 - 0xfbffffff] mem PCI: 00:01.1 10 * [0xfc000000 - 0xfcffffff] mem PCI: 00:06.0 18 * [0xfd000000 - 0xfd01ffff] mem PCI: 00:0c.0 30 * [0xfd020000 - 0xfd02ffff] mem PCI: 00:01.1 14 * [0xfd030000 - 0xfd033fff] mem PCI: 00:01.1 18 * [0xfd034000 - 0xfd037fff] mem PCI: 00:01.1 1c * [0xfd038000 - 0xfd03bfff] mem PCI: 00:01.1 20 * [0xfd03c000 - 0xfd03ffff] mem PCI: 00:01.2 10 * [0xfd040000 - 0xfd043fff] mem PCI: 00:0f.6 10 * [0xfd044000 - 0xfd045fff] mem PCI: 00:06.0 10 * [0xfd046000 - 0xfd046fff] mem PCI: 00:0f.4 10 * [0xfd047000 - 0xfd047fff] mem PCI: 00:0f.5 10 * [0xfd048000 - 0xfd048fff] mem PCI: 00:0f.7 10 * [0xfd049000 - 0xfd049fff] mem Root Device compute_allocate_mem: base: fd04a000 size: 0304a000 align: 25 gran: 0 done Root Device assign_resources, bus 0 link: 0 >> >> Entering northbridge.c: pci_domain_set_resources >> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.1 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 00:01.1 14 <- [0x00fd030000 - 0x00fd033fff] mem PCI: 00:01.1 18 <- [0x00fd034000 - 0x00fd037fff] mem PCI: 00:01.1 1c <- [0x00fd038000 - 0x00fd03bfff] mem PCI: 00:01.1 20 <- [0x00fd03c000 - 0x00fd03ffff] mem PCI: 00:01.2 10 <- [0x00fd040000 - 0x00fd043fff] mem PCI: 00:06.0 10 <- [0x00fd046000 - 0x00fd046fff] mem PCI: 00:06.0 14 <- [0x0000001800 - 0x000000183f] io PCI: 00:06.0 18 <- [0x00fd000000 - 0x00fd01ffff] mem PCI: 00:0c.0 10 <- [0x00fa000000 - 0x00fbffffff] mem PCI: 00:0c.0 30 <- [0x00fd020000 - 0x00fd02ffff] romem PCI: 00:0f.0 10 <- [0x00000018f0 - 0x00000018f7] io PCI: 00:0f.0 14 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 18 <- [0x0000001840 - 0x000000187f] io PCI: 00:0f.0 1c <- [0x00000018c0 - 0x00000018df] io PCI: 00:0f.0 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:0f.0 24 <- [0x0000001880 - 0x00000018bf] io PCI: 00:0f.0 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] io PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] irq PCI: 00:0f.0 assign_resources, bus 0 link: 0 PCI: 00:0f.2 20 <- [0x00000018e0 - 0x00000018ef] io PCI: 00:0f.3 10 <- [0x0000001480 - 0x00000014ff] io PCI: 00:0f.4 10 <- [0x00fd047000 - 0x00fd047fff] mem PCI: 00:0f.5 10 <- [0x00fd048000 - 0x00fd048fff] mem PCI: 00:0f.6 10 <- [0x00fd044000 - 0x00fd045fff] mem PCI: 00:0f.7 10 <- [0x00fd049000 - 0x00fd049fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:01.0 cmd <- 145 PCI: 00:01.1 cmd <- 142 PCI: 00:01.2 cmd <- 142 PCI: 00:06.0 subsystem <- 00/00 PCI: 00:06.0 cmd <- 143 PCI: 00:07.0 cmd <- 147 PCI: 00:0c.0 cmd <- 1c3 cs5536: cs5536_pci_dev_enable_resources() PCI: 00:0f.0 cmd <- 149 w83627hf hwm smbus enabled PCI: 00:0f.2 cmd <- 141 PCI: 00:0f.3 subsystem <- 00/00 PCI: 00:0f.3 cmd <- 141 PCI: 00:0f.4 subsystem <- 00/00 PCI: 00:0f.4 cmd <- 142 PCI: 00:0f.5 subsystem <- 00/00 PCI: 00:0f.5 cmd <- 142 PCI: 00:0f.6 cmd <- 142 PCI: 00:0f.7 cmd <- 142 done. Initializing devices... Root Device init SOM4455F ENTER init SOM4455F EXIT init PCI: 00:06.0 init PCI: 00:0f.0 init cs5536: southbridge_init RTC Init GPIO_ADDR: 00001000 Not disabling COM1 due to a bug ... cs5536: southbridge_init: enable_ide_nand_flash is 0 PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.5 init PNP: 002e.b init PCI: 00:0f.2 init cs5536_ide: ide_init PCI: 00:0f.3 init PCI: 00:0f.4 init PCI: 00:0f.5 init APIC_CLUSTER: 0 init >> >> Entering northbridge.c: cpu_bus_init >> malloc Enter, size 668, free_mem_ptr 00025244 malloc 0x00025244 Initializing CPU #0 CPU: vendor AMD device 5a2 CPU: family 05, model 0a, stepping 02 model_lx_init Enabling cache A20 (0x92): 2 A20 (0x92): 2 CPU model_lx_init DONE CPU #0 Initialized PCI: 00:01.0 init >> >> Entering northbridge.c: northbridge_init >> PCI: 00:01.1 init PCI: 00:01.2 init PCI: 00:07.0 init PCI: 00:0c.0 init rom address for PCI: 00:0c.0 = fd020000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0138 PCI ROM Image, Vendor 5333, Device 88f0, PCI ROM Image, Class Code 000003, Code Type 00 copying VGA ROM Image from 0xfd020000 to 0xc0000, 0x8000 bytes entering emulator 0000:60b6: 20 ILLEGAL EXTENDED X86 OPCODE! halt_sys: file /home/rdabney/linuxbios/LinuxBIOSv2.053107/src/devices/emulator/x86emu/ops2.c, line 60 PCI: 00:0f.6 init PCI: 00:0f.7 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 /home/rdabney/linuxbios/LinuxBIOSv2.053107/src/arch/i386/boot/pirq_routing.c: 36:check_pirq_routing_table() - checksum is: 0x0e but should be: 0x62 done. write_pirq_routing_table(8000785C, BABA) PIR Entry 0 Dev/Fn: 78 Slot: 0 INT: A bitmap: 400 PIRQ: 10 INT: B bitmap: 800 PIRQ: 11 INT: C bitmap: 400 PIRQ: 10 INT: D bitmap: 800 PIRQ: 11 PIR Entry 1 Dev/Fn: 8 Slot: 0 INT: A bitmap: 400 PIRQ: 10 INT: B bitmap: 0 PIRQ: 0 INT: C bitmap: 0 PIRQ: 0 INT: D bitmap: 0 PIRQ: 0 PIR Entry 2 Dev/Fn: 48 Slot: 1 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 3 Dev/Fn: 50 Slot: 2 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 4 Dev/Fn: 58 Slot: 3 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 5 Dev/Fn: 60 Slot: 4 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 6 Dev/Fn: 30 Slot: 5 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 PIR Entry 7 Dev/Fn: 28 Slot: 6 INT: A bitmap: 800 PIRQ: 11 INT: B bitmap: 400 PIRQ: 10 INT: C bitmap: 800 PIRQ: 11 INT: D bitmap: 400 PIRQ: 10 Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 000006d4 checksum 751a Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfff89000 - 0xfffeffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(10): Etherboot n_type: 00000002 n_name(8): ELFBoot n_desc(6): 5.2.6 Loading Etherboot version: 5.2.6 Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 000254e0 malloc 0x000254e0 New segment addr 0x20000 size 0x3c050 offset 0xb0 filesize 0x10ac8 (cleaned up) New segment addr 0x20000 size 0x3c050 offset 0xb0 filesize 0x10ac8 lb: [0x0000000000004000, 0x0000000000028000) segment: [0x0000000000020000, 0x0000000000030ac8, 0x000000000005c050) malloc Enter, size 32, free_mem_ptr 00025500 malloc 0x00025500 late: [0x0000000000028000, 0x0000000000030ac8, 0x000000000005c050) bounce: [0x000000000f7b4000, 0x000000000f7bc000, 0x000000000f7bc000) Loading Segment: addr: 0x000000000f7b4000 memsz: 0x0000000000008000 filesz: 0x0000000000008000 [ 0x000000000f7b4000, 000000000f7bc000, 0x000000000f7bc000) <- 00000000000000b0 Loading Segment: addr: 0x0000000000028000 memsz: 0x0000000000034050 filesz: 0x0000000000008ac8 [ 0x0000000000028000, 0000000000030ac8, 0x000000000005c050) <- 00000000000080b0 Clearing Segment: addr: 0x0000000000030ac8 memsz: 0x000000000002b588 Loaded segments verified segments closed down stream Jumping to boot code at 0x20000 entry = 0x00020000 lb_start = 0x00004000 lb_size = 0x00024000 adjust = 0x0f7b8000 buffer = 0x0f798000 elf_boot_notes = 0x0001eb00 adjusted_boot_notes = 0x0f7d6b00 ROM segment 0x0000 length 0x0000 reloc 0x00020000 CPU 515 Mhz Etherboot 5.2.6 (GPL) http://etherboot.org Tagged ELF for [EEPRO100][FILO] Relocating _text from: [00020000,0005d590) to [0f6c2a70,0f700000) Boot from (N)etwork (D)isk or (Q)uit? Probing pci disk... [FILO]FILO version 0.4.1 (rdabney@rdabney-linux) Thu Jun 7 10:00:32 MDT 2007 boot: hda1:/vmlinuz initrd=/initrd.img ro root=/dev/hda1 acpi=no console=tty0 console=ttyS0,115200 hda: LBA: Maxtor 91366U4 Mounted ext2fs Found Linux version 2.6.20.4 (root@scout-rdabney) #1 Wed May 30 09:15:58 MDT 2007 bzImage. Loading kernel... ok Loading initrd... ok Jumping to entry point... Linux version 2.6.20.4 (root@scout-rdabney) (gcc version 4.1.2 (Ubuntu 4.1.2-0ubuntu4)) #1 Wed May 30 09:15:58 MDT 2007 BIOS-provided physical RAM map: sanitize start sanitize end copy_e820_map() start: 0000000000000000 size: 0000000000001000 end: 0000000000001000 type: 16 copy_e820_map() start: 0000000000001000 size: 000000000009f000 end: 00000000000a0000 type: 1 copy_e820_map() type is E820_RAM copy_e820_map() start: 00000000000f0000 size: 0000000000010000 end: 0000000000100000 type: 16 copy_e820_map() start: 0000000000100000 size: 000000000f6e0000 end: 000000000f7e0000 type: 1 copy_e820_map() type is E820_RAM BIOS-e820: 0000000000000000 - 0000000000001000 type 16 BIOS-e820: 0000000000001000 - 00000000000a0000 (usable) BIOS-e820: 00000000000f0000 - 0000000000100000 type 16 BIOS-e820: 0000000000100000 - 000000000f7e0000 (usable) Malformed early option 'acpi' 247MB LOWMEM available. Zone PFN ranges: DMA 0 -> 4096 Normal 4096 -> 63456 early_node_map[1] active PFN ranges 0: 0 -> 63456 DMI not present or invalid. ACPI: Unable to locate RSDP Allocating PCI resources starting at 10000000 (gap: 0f7e0000:f0820000) Detected 499.956 MHz processor. Built 1 zonelists. Total pages: 62961 Kernel command line: ro root=/dev/hda1 acpi=no console=tty0 console=ttyS0,115200 Initializing CPU#0 PID hash table entries: 1024 (order: 10, 4096 bytes) Console: colour dummy device 80x25 Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) Memory: 247492k/253824k available (2398k kernel code, 5836k reserved, 901k data, 164k init, 0k highmem) virtual kernel memory layout: fixmap : 0xffff8000 - 0xfffff000 ( 28 kB) vmalloc : 0xd0000000 - 0xffff6000 ( 767 MB) lowmem : 0xc0000000 - 0xcf7e0000 ( 247 MB) .init : 0xc043c000 - 0xc0465000 ( 164 kB) .data : 0xc035786f - 0xc0438d0c ( 901 kB) .text : 0xc0100000 - 0xc035786f (2398 kB) Checking if this processor honours the WP bit even in supervisor mode... Ok. Calibrating delay using timer specific routine.. 1001.09 BogoMIPS (lpj=2002195) Mount-cache hash table entries: 512 CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) CPU: L2 Cache: 128K (32 bytes/line) Compat vDSO mapped to ffffe000. CPU: AMD Geode(TM) Integrated Processor by AMD PCS stepping 02 Checking 'hlt' instruction... OK. NET: Registered protocol family 16 PCI: Using configuration type 1 Setting up standard PCI resources ACPI: Interpreter disabled. SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb PCI: Probing PCI hardware PCI: Firmware left 0000:00:06.0 e100 interrupts enabled, disabling 0000:00:0f.2: cannot adjust BAR0 (not I/O) 0000:00:0f.2: cannot adjust BAR1 (not I/O) 0000:00:0f.2: cannot adjust BAR2 (not I/O) 0000:00:0f.2: cannot adjust BAR3 (not I/O) PCI: Using IRQ router default [1022/2090] at 0000:00:0f.0 PCI: Ignore bogus resource 6 [0:0] of 0000:00:01.1 NET: Registered protocol family 2 IP route cache hash table entries: 2048 (order: 1, 8192 bytes) TCP established hash table entries: 8192 (order: 3, 32768 bytes) TCP bind hash table entries: 4096 (order: 2, 16384 bytes) TCP: Hash tables configured (established 8192 bind 4096) TCP reno registered scx200: NatSemi SCx200 Driver NTFS driver 2.1.28 [Flags: R/W DEBUG]. io scheduler noop registered io scheduler anticipatory registered (default) io scheduler deadline registered io scheduler cfq registered vga16fb: mapped to 0xc00a0000 Console: switching to colour frame buffer device 80x30 fb0: VGA16 VGA frame buffer device Real Time Clock Driver v1.12ac Non-volatile memory driver v1.2 AMD Geode RNG detected Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize loop: loaded (max 8 devices) e100: Intel(R) PRO/100 Network Driver, 3.5.17-k2-NAPI e100: Copyright(c) 1999-2006 Intel Corporation PCI: Guessed IRQ 11 for device 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.4 PCI: Sharing IRQ 11 with 0000:00:0f.5 e100: eth0: e100_probe: addr 0xfd046000, irq 11, MAC addr 00:D0:C9:9F:63:84 Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx hda: Maxtor 91366U4, ATA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 hda: max request size: 128KiB hda: Host Protected Area detected. current capacity is 26587576 sectors (13612 MB) native capacity is 26588016 sectors (13613 MB) hda: task_no_data_intr: status=0x51 { DriveReady SeekComplete Error } hda: task_no_data_intr: error=0x04 { DriveStatusError } ide: failed opcode was: 0xf9 hda: 26587576 sectors (13612 MB) w/2048KiB Cache, CHS=26376/16/63 hda: cache flushes not supported hda: hda1 hda2 < hda5 > SCSI Media Changer driver v0.25 PCI: Guessed IRQ 11 for device 0000:00:0f.5 PCI: Sharing IRQ 11 with 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.4 ehci_hcd 0000:00:0f.5: EHCI Host Controller ehci_hcd 0000:00:0f.5: new USB bus registered, assigned bus number 1 ehci_hcd 0000:00:0f.5: irq 11, io mem 0xfd048000 ehci_hcd 0000:00:0f.5: USB 2.0 started, EHCI 1.00, driver 10 Dec 2004 usb usb1: configuration #1 chosen from 1 choice hub 1-0:1.0: USB hub found hub 1-0:1.0: 4 ports detected PCI: Guessed IRQ 11 for device 0000:00:0f.4 PCI: Sharing IRQ 11 with 0000:00:06.0 PCI: Sharing IRQ 11 with 0000:00:0c.0 PCI: Sharing IRQ 11 with 0000:00:0f.5 ohci_hcd 0000:00:0f.4: OHCI Host Controller ohci_hcd 0000:00:0f.4: new USB bus registered, assigned bus number 2 ohci_hcd 0000:00:0f.4: irq 11, io mem 0xfd047000 usb usb2: configuration #1 chosen from 1 choice hub 2-0:1.0: USB hub found hub 2-0:1.0: 4 ports detected USB Universal Host Controller Interface driver v3.0 Initializing USB Mass Storage driver... usbcore: registered new interface driver usb-storage USB Mass Storage support registered. usbcore: registered new interface driver hiddev usbcore: registered new interface driver usbhid drivers/usb/input/hid-core.c: v2.6:USB HID core driver serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: AT Translated Set 2 keyboard as /class/input/input0 input: PC Speaker as /class/input/input1 input: ImPS/2 Generic Wheel Mouse as /class/input/input2 i2c /dev entries driver **WARNING** I2C adapter driver [CS5536 ACB0] forgot to specify physical device; fix it! Advanced Linux Sound Architecture Driver Version 1.0.14rc1 (Tue Jan 09 09:56:17 2007 UTC). PCI: Guessed IRQ 11 for device 0000:00:0f.3 ALSA device list: #0: CS5535 Audio cs5535audio at 0x1480, irq 11 IPv4 over IPv4 tunneling driver TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 1 NET: Registered protocol family 17 NET: Registered protocol family 15 Using IPI Shortcut mode BIOS EDD facility v0.16 2004-Jun-25, 0 devices found Time: tsc clocksource has been installed. EDD information not available. kjournald starting. Commit interval 5 seconds EXT3-fs: mounted filesystem with ordered data mode. VFS: Mounted root (ext3 filesystem) readonly. Freeing unused kernel memory: 164k freed * Setting preliminary keymap... [ OK ] * Preparing restricted drivers... [ OK ] * Starting basic networking... [ OK ] * Starting kernel event manager... [ OK ] * Loading hardware drivers... e100: eth1: e100_watchdog: link up, 100Mbps, full-duplex PCI: Guessed IRQ 10 for device 0000:00:01.2 PCI: Sharing IRQ 10 with 0000:00:01.1 geode-aes: GEODE AES engine enabled. [ OK ] * Loading kernel modules... * Loading manual drivers... [ OK ] * Activating swap... [ OK ] * Checking root file system... fsck 1.40-WIP (14-Nov-2006) /dev/hda1: clean, 213733/1586144 files, 1262354/3170821 blocks [ OK ] * Checking file systems... fsck 1.40-WIP (14-Nov-2006) [ OK ] * Mounting local filesystems... [ OK ] * Activating swapfile swap... [ OK ] * Configuring network interfaces... [ OK ] * Setting sensors limits... [ OK ] * Starting system log daemon... [ OK ] * Starting kernel log... [ OK ] * Starting internet superserver inetd [ OK ] * Starting deferred execution scheduler atd [ OK ] * Starting periodic command scheduler crond [ OK ] * Enabling additional executable binary formats binfmt-support [ OK ] * Running local boot scripts (/etc/rc.local) [ OK ] ^L^H

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coreboot June 2007