coreboot May 2007

coreboot@coreboot.org

98 participants
436 discussions

[LinuxBIOS] VIA Auto Power ON
by Marcel Graber 04 May '07

04 May '07

Hi, Is there a solution to get the via epia-m2 board to auto Power on (like the MAINBOARD_POWER_ON in other southbridges)? I've seen that the fastboot Bios from VIA (which is also linuxbios) can do it Tnx for help, marcel

4 3

[LinuxBIOS] Question about raminit.c
by joe＠smittys.pointclark.net 04 May '07

04 May '07

Quick question about raminit.c Seems like it sets register values just enough to get going (function sdram_set_registers) and then detects spd on the memory and the resets the register values according to the memory. Correct? Wouldn't make sense to just detect the spd values first and then set the registers?? Or, does it have to set the register values just enough to get going so it can then detect spd? Thanks - Joe

3 6

[LinuxBIOS] r2627 build service
by LinuxBIOS information 04 May '07

04 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stuge" checked in revision 2627 to the LinuxBIOS source repository and caused the following changes: Change Log: Add WinBond Super IO helpers. * These helpers severely clear up winbond superio usage. * Removed board_iwill_dk8_htx as it can be replaced by board_agami_aruma (Mondrian Nuessle). * Renamed board_agami_aruma to w83627hf_gpio24_raise. * Clarified comments in w83627hf_gpio24_raise, and added some things from the old iwill code. * Moved all board functions name argument to const. (warning breaks build) * Moved iwill entry in board_pciid_enables. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of arima:hdama is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] [patch] flashrom: w863xx helpers and w86327hf_gpio42_raise
by Luc Verhaegen 04 May '07

04 May '07

2 4

[LinuxBIOS] r2627 - trunk/LinuxBIOSv2/util/flashrom
by svn＠openbios.org 04 May '07

04 May '07

Author: stuge Date: 2007-05-04 06:47:04 +0200 (Fri, 04 May 2007) New Revision: 2627 Modified: trunk/LinuxBIOSv2/util/flashrom/board_enable.c Log: Add WinBond Super IO helpers. * These helpers severely clear up winbond superio usage. * Removed board_iwill_dk8_htx as it can be replaced by board_agami_aruma (Mondrian Nuessle). * Renamed board_agami_aruma to w83627hf_gpio24_raise. * Clarified comments in w83627hf_gpio24_raise, and added some things from the old iwill code. * Moved all board functions name argument to const. (warning breaks build) * Moved iwill entry in board_pciid_enables. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/LinuxBIOSv2/util/flashrom/board_enable.c =================================================================== --- trunk/LinuxBIOSv2/util/flashrom/board_enable.c 2007-05-04 00:51:17 UTC (rev 2626) +++ trunk/LinuxBIOSv2/util/flashrom/board_enable.c 2007-05-04 04:47:04 UTC (rev 2627) @@ -23,109 +23,88 @@ #include "flash.h" #include "debug.h" -static int board_iwill_dk8_htx(const char *name) +/* + * Helper functions for many Winbond superIOs of the w836xx range. + */ +#define W836_INDEX 0x2E +#define W836_DATA 0x2F + +/* Enter extended functions */ +static void +w836xx_ext_enter(void) { - /* Extended function index register, either 0x2e or 0x4e. */ -#define EFIR 0x2e - /* Extended function data register, one plus the index reg. */ -#define EFDR EFIR + 1 - char b; + outb(0x87, W836_INDEX); + outb(0x87, W836_INDEX); +} - /* Disable the flash write protect (which is connected to the - * Winbond W83627HF GPIOs). - */ - outb(0x87, EFIR); /* Sequence to unlock extended functions */ - outb(0x87, EFIR); +/* Leave extended functions */ +static void +w836xx_ext_leave(void) +{ + outb(0xAA, W836_INDEX); +} - /* Activate logical device. */ - outb(0x7, EFIR); - outb(8, EFDR); +/* General functions for read/writing WB SuperIOs */ +static unsigned char +wbsio_read(unsigned char index) +{ + outb(index, W836_INDEX); + return inb(W836_DATA); +} - /* Set GPIO regs. */ - outb(0x2b, EFIR); /* GPIO multiplexed pin reg. */ - b = inb(EFDR) | 0xd0; - outb(0x2b, EFIR); - outb(b, EFDR); +static void +wbsio_write(unsigned char index, unsigned char data) +{ + outb(index, W836_INDEX); + outb(data, W836_DATA); +} - outb(0x30, EFIR); /* GPIO2 */ - b = inb(EFDR) | 0x01; - outb(0x30, EFIR); - outb(b, EFDR); +static void +wbsio_mask(unsigned char index, unsigned char data, + unsigned char mask) +{ + unsigned char tmp; - outb(0xf0, EFIR); /* IO sel */ - b = inb(EFDR) | 0xef; - outb(0xf0, EFIR); - outb(b, EFDR); - - outb(0xf1, EFIR); /* GPIO data reg */ - b = inb(EFDR) | 0x16; - outb(0xf1, EFIR); - outb(b, EFDR); - - outb(0xf2, EFIR); /* GPIO inversion reg */ - b = inb(EFDR) | 0x00; - outb(0xf2, EFIR); - outb(b, EFDR); - - /* Lock extended functions again. */ - outb(0xaa, EFIR); /* Command to exit extended functions */ - - return 0; + outb(index, W836_INDEX); + tmp = inb(W836_DATA) & ~mask; + outb(tmp | (data & mask), W836_DATA); } /* - * Match on pci-ids, no report received, just data from the mainboard - * specific code: - * main: 0x1022:0x746B, which is the SMBUS controller. - * card: 0x1022:0x36C0... + * WinBond w83627hf: raise GPIO24. + * + * Suited for: + * * Agami Aruma + * * IWILL DK8-HTX */ -static int board_agami_aruma(char *name) +static int w83627hf_gpio24_raise(const char *name) { - /* Extended function index register, either 0x2e or 0x4e */ -#define EFIR 0x2e - /* Extended function data register, one plus the index reg. */ -#define EFDR EFIR + 1 - char b; + w836xx_ext_enter(); - /* Disable the flash write protect. The flash write protect is - * connected to the WinBond w83627hf GPIO 24. - */ - outb(0x87, EFIR); /* sequence to unlock extended functions */ - outb(0x87, EFIR); - - outb(0x20, EFIR); /* SIO device ID register */ - b = inb(EFDR); - printf_debug("\nW83627HF device ID = 0x%x\n",b); - - if (b != 0x52) { - fprintf(stderr, "\nIncorrect device ID, aborting write protect disable\n"); + /* Is this the w83627hf? */ + if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */ + fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", + name, wbsio_read(0x20)); + w836xx_ext_leave(); return -1; } - outb(0x2b, EFIR); /* GPIO multiplexed pin reg. */ - b = inb(EFDR) | 0x10; - outb(0x2b, EFIR); - outb(b, EFDR); /* select GPIO 24 instead of WDTO */ + /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ + wbsio_mask(0x2B, 0x10, 0x10); - outb(0x7, EFIR); /* logical device select */ - outb(0x8, EFDR); /* point to device 8, GPIO port 2 */ + wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */ - outb(0x30, EFIR); /* logic device activation control */ - outb(0x1, EFDR); /* activate */ + wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */ - outb(0xf0, EFIR); /* GPIO 20-27 I/O selection register */ - b = inb(EFDR) & ~0x10; - outb(0xf0, EFIR); - outb(b, EFDR); /* set GPIO 24 as an output */ + wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */ - outb(0xf1, EFIR); /* GPIO 20-27 data register */ - b = inb(EFDR) | 0x10; - outb(0xf1, EFIR); - outb(b, EFDR); /* set GPIO 24 */ + wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - outb(0xaa, EFIR); /* command to exit extended functions */ + wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */ + w836xx_ext_leave(); + return 0; } @@ -135,7 +114,7 @@ * We don't need to do this when using linuxbios, GPIO15 is never lowered there. */ -static int board_via_epia_m(char *name) +static int board_via_epia_m(const char *name) { struct pci_dev *dev; unsigned int base; @@ -164,33 +143,11 @@ } /* - * Winbond LPC super IO. - * - * Raises the ROM MEMW# line. - */ - -static void w83697_rom_memw_enable(void) -{ - uint8_t val; - - outb(0x87, 0x2E); /* enable extended functions */ - outb(0x87, 0x2E); - - outb(0x24, 0x2E); /* rom bits live here */ - - val = inb(0x2F); - if (!(val & 0x02)) /* flash rom enabled? */ - outb(val | 0x08, 0x2F); /* enable MEMW# */ - - outb(0xAA, 0x2E); /* disable extended functions */ -} - -/* * Suited for Asus A7V8X-MX SE and A7V400-MX. * */ -static int board_asus_a7v8x_mx(char *name) +static int board_asus_a7v8x_mx(const char *name) { struct pci_dev *dev; uint8_t val; @@ -206,8 +163,14 @@ val &= 0x7F; pci_write_byte(dev, 0x59, val); - w83697_rom_memw_enable(); + /* Raise ROM MEMW# line on Winbond w83697 SuperIO */ + w836xx_ext_enter(); + if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */ + wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */ + + w836xx_ext_leave(); + return 0; } @@ -241,18 +204,18 @@ char *lb_part; char *name; - int (*enable)(char *name); + int (*enable)(const char *name); }; struct board_pciid_enable board_pciid_enables[] = { + { 0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise }, { 0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", board_agami_aruma }, + "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise }, { 0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m }, { 0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx }, - { 0x1022, 0x7468, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - "iwill", "dk8_htx", "IWILL DK8-HTX", board_iwill_dk8_htx }, { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL } /* Keep this */ };

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Re: [LinuxBIOS] Fast path resume, high-level design
by Jim Gettys 04 May '07

04 May '07

> On 5/3/07, Peter Stuge <stuge-linuxbios(a)cdy.org> wrote: > > On Thu, May 03, 2007 at 05:55:39PM -0400, Jim Gettys wrote: > > > Mitch wrote a fast path resume from RAM for the OLPC Geode > > > hardware. > > > > The fastest path is obviously attractive also in LinuxBIOS. > > > > > > > Once you've done that, you find that you've done just about > > > everything to initialize the hardware in the first place; so that > > > code is now used both at boot time and at suspend from RAM time. > > > > This is an interesting observation. > > > > > > Perhaps all chip init would best be written in some macro language? > > (one specific for the task?) > > We've talked about this. It only really works on OLPC because OLPC is > so incredibly simple. Add an opteron of the type that stefan used to > port to -- variable number of CPUs, 31 PCI busses, etc. etc. -- and > it's a bit harder. > > Also, let's pretend that someday there is an OLPC with SPD. The > problem starts to get ugly again as you add back in SMBUS support, > etc. etc. -- all that stuff that linuxbios can do pretty well. > > I also still believe, having watched how things played out, that I > want linux as my bios. Nothing in what I have seen on OLPC changes my > belief, and some things that have happened on OLPC strongly confirm > it. > > Again, the OLPC code can be found at openbios.org, it's pretty > trivial, and works mainly because the OLPC hardware has hardcoded dram > timing, etc. etc. And, as Jordan pointed out, things can fall apart > when some of these constants change. > Heh. Accusing a Geode as being "simple" is a false accusation.... Rather... As Ron points out, with the exception of SD and USB (at fixed locations), the XO-1 is a *fixed configuration* system. There are additional complications. Since fast resume is *so* important to us, we are sometimes going to initialize hardware in OFW early in resume, so that Linux PM will not have to start the process and then wait (or wait as long) to be able to complete hardware re-initialization of that particular device. Mark Foster described (at the Power management summit a year ago) a more general scheme for paralleling initialization using tables and data structures. Something like that might be adaptable enough for more complex systems: but that isn't what's been implemented here; we haven't needed to do so. Regards, - Jim -- Jim Gettys One Laptop Per Child

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[LinuxBIOS] r2626 build service
by LinuxBIOS information 04 May '07

04 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2626 to the LinuxBIOS source repository and caused the following changes: Change Log: Cosmetics (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2626 - in trunk/LinuxBIOSv2/src: mainboard/tyan/s1846 northbridge/intel/i440bx
by svn＠openbios.org 04 May '07

04 May '07

Author: uwe Date: 2007-05-04 02:51:17 +0200 (Fri, 04 May 2007) New Revision: 2626 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c Log: Cosmetics (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c 2007-05-03 21:36:51 UTC (rev 2625) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c 2007-05-04 00:51:17 UTC (rev 2626) @@ -101,10 +101,10 @@ * Do _not_ check the area from 640 KB - 1 MB, as that's not really * RAM, but rather reserved for various other things: * - * - 640 KB 768 KB: Video Buffer Area - * - 768 KB 896 KB: Expansion Area - * - 896 KB 960 KB: Extended System BIOS Area - * - 960 KB 1 MB: Memory (BIOS Area) - System BIOS Area + * - 640 KB - 768 KB: Video Buffer Area + * - 768 KB - 896 KB: Expansion Area + * - 896 KB - 960 KB: Extended System BIOS Area + * - 960 KB - 1 MB: Memory (BIOS Area) - System BIOS Area * * Trying to check these areas will fail. */ Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c 2007-05-03 21:36:51 UTC (rev 2625) +++ trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c 2007-05-04 00:51:17 UTC (rev 2626) @@ -242,7 +242,7 @@ RPS, 0x0000, 0x0000, /* SDRAMC - SDRAM Control Register - * 0x76-0x77 + * 0x76 - 0x77 * * [15:10] Reserved * [09:08] Idle/Pipeline DRAM Leadoff Timing (IPDLT) @@ -519,8 +519,6 @@ /* 4. Mode register set. Wait two memory cycles. */ PRINT_DEBUG("RAM Enable 4: Mode register set\r\n"); do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0); - // TODO: Is 0x1d0 correct? - // do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0000); mdelay(10); mdelay(10);

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[LinuxBIOS] [PATCH] flashrom patch for iwill dk8_htx
by Mondrian Nuessle 04 May '07

04 May '07

The attached patch enables flashing on the Iwill DK8-HTX board. Basically, it configures the SuperIO to set the right GPIO pins, so write protection is disabled. Signed-off-by: Mondrian Nuessle <nuessle(a)uni-mannheim.de> --- So, this is the second try :-) Only pci vendor id/device id is given, no subsystem id. Therefor, flashing when booted from factory BIOS will only work, if -m iwill:dk8_htx switch is given. I guess this could go in the wiki doc to this board... Regards, Mondrian -- Mondrian Nuessle University of Mannheim Phone: +49 621 181 2717 Computer Architecture Group Fax: +49 621 181 2713 http://ra.ti.uni-mannheim.de mailto:nuessle@uni-mannheim.de

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[LinuxBIOS] r2625 build service
by LinuxBIOS information 04 May '07

04 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2625 to the LinuxBIOS source repository and caused the following changes: Change Log: Add missing license headers to some Geode LX related files. The following original authors agreed to the license: - Ronald G. Minnich <rminnich(a)gmail.com> - Indrek Kruusa <indrek.kruusa(a)artecdesign.ee> - Stefan Reinauer <stepan(a)coresystems.de> - Andrei Birjukov <andrei.birjukov(a)artecdesign.ee> Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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coreboot May 2007