coreboot April 2007

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[LinuxBIOS] r2617 build service
by LinuxBIOS information 25 Apr '07

25 Apr '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2617 to the LinuxBIOS source repository and caused the following changes: Change Log: Increase image size for abuild. This should fix the build of these boards: - tyan/s2912 - nvidia/l1_2pvv - gigabyte/m57sli Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:rumba has been broken Compilation of arima:hdama is still broken Compilation of artecgroup:dbe61 has been broken Compilation of asus:p2b has been broken Compilation of bitworks:ims has been broken Compilation of dell:s1850 has been broken Compilation of densitron:dpx114 has been broken Compilation of digitallogic:adl855pc has been broken Compilation of digitallogic:msm800sev has been broken Compilation of eaglelion:5bcm has been broken Compilation of gigabyte:m57sli has been fixed Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iei:nova4899r has been broken Compilation of intel:jarrell has been broken Compilation of intel:xe7501devkit has been broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken Compilation of lippert:frontrunner has been broken Compilation of nvidia:l1_2pvv has been fixed Compilation of olpc:btest has been broken Compilation of olpc:rev_a has been broken Compilation of supermicro:x6dai_g has been broken Compilation of supermicro:x6dhe_g has been broken Compilation of supermicro:x6dhe_g2 has been broken Compilation of supermicro:x6dhr_ig has been broken Compilation of supermicro:x6dhr_ig2 has been broken Compilation of tyan:s1846 has been broken Compilation of tyan:s2735 has been broken Compilation of tyan:s2912 has been fixed Compilation of via:epia has been broken If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2616 build service
by LinuxBIOS information 24 Apr '07

24 Apr '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2616 to the LinuxBIOS source repository and caused the following changes: Change Log: trivial: fix filename in comment. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken Compilation of gigabyte:m57sli is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken Compilation of nvidia:l1_2pvv is still broken Compilation of tyan:s2912 is still broken If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2617 - trunk/LinuxBIOSv2/util/abuild
by svn＠openbios.org 24 Apr '07

24 Apr '07

Author: uwe Date: 2007-04-24 23:54:21 +0200 (Tue, 24 Apr 2007) New Revision: 2617 Modified: trunk/LinuxBIOSv2/util/abuild/abuild Log: Increase image size for abuild. This should fix the build of these boards: - tyan/s2912 - nvidia/l1_2pvv - gigabyte/m57sli Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/util/abuild/abuild =================================================================== --- trunk/LinuxBIOSv2/util/abuild/abuild 2007-04-24 18:40:02 UTC (rev 2616) +++ trunk/LinuxBIOSv2/util/abuild/abuild 2007-04-24 21:54:21 UTC (rev 2617) @@ -142,14 +142,14 @@ cat <<EOF romimage "normal" option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x17000 + option ROM_IMAGE_SIZE=0x20000 option LINUXBIOS_EXTRA_VERSION=".0-normal" payload __PAYLOAD__ end romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x17000 + option ROM_IMAGE_SIZE=0x20000 option LINUXBIOS_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end

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[LinuxBIOS] lxbios bug?
by Ward Vandewege 24 Apr '07

24 Apr '07

I've just tried running lxbios on a gigabyte m57sli-s4 board that's running LinuxBIOS. This was the output: # ./lxbios -y ../LinuxBIOSv2/src/mainboard/gigabyte/m57sli/cmos.layout -a boot_option = Fallback last_boot = Fallback ECC_memory = Disable baud_rate = 1200 hw_scrubber = Enable interleave_chip_selects = Enable max_mem_clock = 100Mhz dual_core = Disable power_on_after_fail = Disable # Bad value -> debug_level = 0xf # Bad value -> boot_first = 0x7 boot_second = Network # Bad value -> boot_third = 0x4 boot_index = 0xe boot_countdown = 0xfa # Bad value -> slow_cpu = 0xd nmi = Enable iommu = Enable lxbios: Can not read LinuxBIOS parameter user_data because layout info specifies CMOS area that is too wide. lxbios: Warning: LinuxBIOS CMOS checksum is bad. As you can see there's an error at the bottom, and a bunch of 'bad value' warnings. I first tried without passing it the cmos layout file, and got the same result as above. What am I doing wrong? This is lxbios 2.0.1. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

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[LinuxBIOS] r2616 - trunk/LinuxBIOSv2/src/cpu/x86/mtrr
by svn＠openbios.org 24 Apr '07

24 Apr '07

Author: stepan Date: 2007-04-24 20:40:02 +0200 (Tue, 24 Apr 2007) New Revision: 2616 Modified: trunk/LinuxBIOSv2/src/cpu/x86/mtrr/mtrr.c Log: trivial: fix filename in comment. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/cpu/x86/mtrr/mtrr.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/x86/mtrr/mtrr.c 2007-04-22 19:08:13 UTC (rev 2615) +++ trunk/LinuxBIOSv2/src/cpu/x86/mtrr/mtrr.c 2007-04-24 18:40:02 UTC (rev 2616) @@ -1,5 +1,5 @@ /* - * intel_mtrr.c: setting MTRR to decent values for cache initialization on P6 + * mtrr.c: setting MTRR to decent values for cache initialization on P6 * * Derived from intel_set_mtrr in intel_subr.c and mtrr.c in linux kernel *

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[LinuxBIOS] Question about how to add data at fixed address before POST
by AlexHuang 24 Apr '07

24 Apr '07

Dear All, I would like to port a linuxbois on some platform. Before the system into the POST, hardware will read data at address 0xffffd. Where and How can I do this data assignment?? Thanks for your help. Alex

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[LinuxBIOS] Question about how to add data at fixed address before POST
by AlexHuang 24 Apr '07

24 Apr '07

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[LinuxBIOS] What is RC0 and RC1
by Feng, Libo 23 Apr '07

23 Apr '07

The SPD address is composed with RC0, RC1 and DIMM0, DIMM1. But what is RC0 and RC1? Different mainboard has different RC0 and RC1, who defines the two? DIMM sockets or processor or others? Thank you. Best Regards 丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406

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[LinuxBIOS] SAS boot
by Thomas Ekstrand 23 Apr '07

23 Apr '07

Hi! I'm wondering what payloads can be used to boot from a sas-controller? I want to be able to try network boot first and if it fails go to sas or ide, can this be done? what network boot possibilities are there with a kernel in flash? Thanks! /Thomas

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[LinuxBIOS] READ_CPU/WRITE_CPU command on Geode GX1
by Juergen Beisert 23 Apr '07

23 Apr '07

Hi all, has someone experience with the READ_CPU/WRITE_CPU command on Geode GX1 CPUs? My system bases on LinuxBIOS, so the scratch pad ram will not be setup. Now I'm trying to write an xorg driver with acceleration for this system. But for some operations I need the scratch pad ram *and* the so called BB0 and BB1 pointer. Scratch pad ram works now. But I cannot setup the BB0/BB1 pointer. In my Geode GX1 manual page 97 says: Opcodes "0f 3c" is CPU_WRITE Opcodes "0f 3d" is CPU_READ In the same manual page 207 says: Opcodes "0f 3c" is CPU_READ Opcodes "0f 3d" is CPU_WRITE Has someone experience in gcc inline assembler? I try to set a new value and read back to check this setting. It fails, so maybe my code is wrong. /* this runs in linux kernel space */ static void geode_gx1_set_blitbase_0(unsigned long value) { __asm__ __volatile__ ( "movl $0xFFFFFF0C, %%ebx" : : : "ebx"); __asm__ __volatile__ ( "movl %0, %%eax": : "r" (value) ); __asm__ __volatile__ ( ".byte 0x0f" ); /* CPU_WRITE */ __asm__ __volatile__ ( ".byte 0x3c" ); __asm__ __volatile__ ( ".byte 0x0f" ); /* BB0_RESET */ __asm__ __volatile__ ( ".byte 0x3a" ); } /* this runs in my xorg driver */ static unsigned long read_bb0_base(void) { unsigned long rc; __asm__ __volatile__ ( "pushl %ebx" ); __asm__ __volatile__ ( "movl $0xFFFFFF0C, %ebx"); __asm__ __volatile__ ( ".byte 0x0f" ); /* CPU_READ */ __asm__ __volatile__ ( ".byte 0x3d" : : : "eax"); __asm__ __volatile__ ( "popl %ebx" ); __asm__ __volatile__ ( "movl %%eax, %0" : "=a" (rc):); return rc; } Maybe the opcodes are wrong or my code. Can anyone help? Regards Juergen

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coreboot April 2007