coreboot December 2007

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[LinuxBIOS] r3020 - trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10
by svn＠openbios.org 19 Dec '07

19 Dec '07

Author: cozzie Date: 2007-12-19 19:29:59 +0100 (Wed, 19 Dec 2007) New Revision: 3020 Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb Log: Fix for newer iasl versions (trivial) Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb 2007-12-19 17:59:50 UTC (rev 3019) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb 2007-12-19 18:29:59 UTC (rev 3020) @@ -90,7 +90,7 @@ object fadt.o makerule dsdt.c depends "$(MAINBOARD)/dx/dsdt_lb.dsl" - action "iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl" + action "iasl -p $(PWD)/dsdt_lb -tc $(MAINBOARD)/dx/dsdt_lb.dsl" action "mv dsdt_lb.hex dsdt.c" end object ./dsdt.o @@ -100,28 +100,28 @@ if ACPI_SSDTX_NUM makerule ssdt2.c depends "$(MAINBOARD)/dx/pci2.asl" - action "iasl -tc $(MAINBOARD)/dx/pci2.asl" + action "iasl -p $(PWD)/pci2 -tc $(MAINBOARD)/dx/pci2.asl" action "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex" action "mv pci2.hex ssdt2.c" end object ./ssdt2.o makerule ssdt3.c depends "$(MAINBOARD)/dx/pci3.asl" - action "iasl -tc $(MAINBOARD)/dx/pci3.asl" + action "iasl -p $(PWD)/pci3 -tc $(MAINBOARD)/dx/pci3.asl" action "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex" action "mv pci3.hex ssdt3.c" end object ./ssdt3.o makerule ssdt4.c depends "$(MAINBOARD)/dx/pci4.asl" - action "iasl -tc $(MAINBOARD)/dx/pci4.asl" + action "iasl -p $(PWD)/pci4 -tc $(MAINBOARD)/dx/pci4.asl" action "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex" action "mv pci4.hex ssdt4.c" end object ./ssdt4.o makerule ssdt5.c depends "$(MAINBOARD)/dx/pci5.asl" - action "iasl -tc $(MAINBOARD)/dx/pci5.asl" + action "iasl -p $(PWD)/pci5 -tc $(MAINBOARD)/dx/pci5.asl" action "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex" action "mv pci5.hex ssdt5.c" end

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Re: [LinuxBIOS] r3019 - trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10
by Corey Osgood 19 Dec '07

19 Dec '07

svn(a)openbios.org wrote: > Author: stepan > Date: 2007-12-19 18:59:50 +0100 (Wed, 19 Dec 2007) > New Revision: 3019 > > Modified: > trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb > Log: > trivial fix for abuild. > > Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> > Acked-by: Stefan Reinauer <stepan(a)coresystems.de> > > > Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb > =================================================================== > --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2007-12-19 08:07:37 UTC (rev 3018) > +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2007-12-19 17:59:50 UTC (rev 3019) > @@ -42,6 +42,8 @@ > uses ROM_SECTION_OFFSET > uses CONFIG_ROM_PAYLOAD > uses CONFIG_ROM_PAYLOAD_START > +uses CONFIG_COMPRESSED_PAYLOAD_LZMA > +uses CONFIG_COMPRESSED_PAYLOAD_NRV2B > uses PAYLOAD_SIZE > uses _ROMBASE > uses XIP_ROM_SIZE Still the same error as before: LinuxBIOSv2/src/stream/rom_stream.c:47:90: error: invalid suffix "x" on integer constant Uwe tracked this down on another board, but I can't remember what it was. I thought it was the ROM_SIZE fix. -Corey

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[LinuxBIOS] r3019 - trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10
by svn＠openbios.org 19 Dec '07

19 Dec '07

Author: stepan Date: 2007-12-19 18:59:50 +0100 (Wed, 19 Dec 2007) New Revision: 3019 Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb Log: trivial fix for abuild. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2007-12-19 08:07:37 UTC (rev 3018) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2007-12-19 17:59:50 UTC (rev 3019) @@ -42,6 +42,8 @@ uses ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START +uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_COMPRESSED_PAYLOAD_NRV2B uses PAYLOAD_SIZE uses _ROMBASE uses XIP_ROM_SIZE

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[LinuxBIOS] r3018 build service
by LinuxBIOS information 19 Dec '07

19 Dec '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "cozzie" checked in revision 3018 to the LinuxBIOS source repository and caused the following changes: Change Log: Small fix to make the abuild happy, add ROM_SIZE to target/*/Config.lb, using the default from src/mainboard/*/Options.lb (trivial) Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Build Log: Configuration of amd:serengeti_cheetah_fam10 is still broken If something broke during this checkin please be a pain in cozzie's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r3018 - trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10
by svn＠openbios.org 19 Dec '07

19 Dec '07

Author: cozzie Date: 2007-12-19 09:07:37 +0100 (Wed, 19 Dec 2007) New Revision: 3018 Modified: trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10/Config.lb Log: Small fix to make the abuild happy, add ROM_SIZE to target/*/Config.lb, using the default from src/mainboard/*/Options.lb (trivial) Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10/Config.lb =================================================================== --- trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10/Config.lb 2007-12-19 01:52:11 UTC (rev 3017) +++ trunk/LinuxBIOSv2/targets/amd/serengeti_cheetah_fam10/Config.lb 2007-12-19 08:07:37 UTC (rev 3018) @@ -29,6 +29,9 @@ # At a maximum only compile in this level of debugging option MAXIMUM_CONSOLE_LOGLEVEL=11 +# 512KB ROM +option ROM_SIZE=512*1024 + # Cheetah Family 10 #romimage "normal" # 1MB ROM

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[LinuxBIOS] r3017 build service
by LinuxBIOS information 19 Dec '07

19 Dec '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "mjones" checked in revision 3017 to the LinuxBIOS source repository and caused the following changes: Change Log: Changed the stop_this_cpu() to just hlt. Removed local APIC INIT (don't worry the APIC and AP are still initialized). The local APIC INIT seemed to be the incorrect thing to do to stop an AP. The Intel Multiprocessor specification indicated that a vector should be set and a START should happen following an INIT. Then AP will execute the instructions pointed to by the vector. There is no vector or start in stop_this_cpu(). This seems to put the AP in an in-between state. In the case of Barcelona the AP's MSRs and PCI register are not accessible by the hardware debugger. The better solution seems to be to just put the AP in a hlt and allow the AP to go into C1. Then APIC managing software running on the BSP can program the AP as needed. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Reviewed-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of amd:serengeti_cheetah_fam10 is still broken If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r3016 build service
by LinuxBIOS information 19 Dec '07

19 Dec '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "mjones" checked in revision 3016 to the LinuxBIOS source repository and caused the following changes: Change Log: Initial AMD Serengeti_Cheetah_FAM10 platform for Barcelona support. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Reviewed-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of amd:serengeti_cheetah_fam10 is still broken If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] Asus A8N-E sm-bus issue? (Unknown Trwt )
by extinct man 19 Dec '07

19 Dec '07

greetings ! the latest A8NE revision shows up on the serial console like this: 1. LinuxBIOS-2.0.0_Fallback Mon Dec 17 23:47:15 EST 2007 starting... 2. core0 started: 3. started ap apicid: 4. SBLink=00 5. NC node|link=00 6. SMBus controller enabled 7. Ram1.00 8. Ram2.00 9. Unknown Trwt // and then "dies" Trwt is RAM timing parameter, the mail list quotes the "die" line when "clock" is to big or small. Then again maybe it is because of SMbus problem. the issue came up (see mail) with a similar CK804 board (lanparty?). one might modify the sources to enable dump-spd registers for more output (in car-auto.c). should I first enable more detailed output or proceed in another way? this is what I learned from IRC chat, tks Corey & Stephan. maybe also there is something wrong with abuild, since it comes up with .rom files which are too small on a8ne target, namely 508KB while a "manual" build produces a proper 512KB image. -Q Heute schon einen Blick in die Zukunft von E-Mails wagen? www.yahoo.de/mail

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[LinuxBIOS] [PATCH] AMD Barcelona(family 10) support 4 of 4
by Marc Jones 19 Dec '07

19 Dec '07

Changes to core lapic.h. This file is used by Intel multiprocessor CPUs as well as AMDs. Could someone with Intel APIC experience take a close look at this and try it? Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Changed the stop_this_cpu() to just hlt. Removed local APIC INIT (don't worry the APIC and AP are still initialized). The local APIC INIT seemed to be the incorrect thing to do to stop an AP. The Intel Multiprocessor specification indicated that a vector should be set and a START should happen following an INIT. Then AP will execute the instructions pointed to by the vector. There is no vector or start in stop_this_cpu(). This seems to put the AP in an in-between state. In the case of Barcelona the AP's MSRs and PCI register are not accessible by the hardware debugger. The better solution seems to be to just put the AP in a hlt and allow the AP to go into C1. Then APIC managing software running on the BSP can program the AP as needed. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Reviewed-by: Jordan Crouse <jordan.crouse(a)amd.com> Index: LinuxBIOSv2/src/include/cpu/x86/lapic.h =================================================================== --- LinuxBIOSv2.orig/src/include/cpu/x86/lapic.h 2007-12-12 11:59:13.000000000 -0700 +++ LinuxBIOSv2/src/include/cpu/x86/lapic.h 2007-12-12 14:30:03.000000000 -0700 @@ -54,22 +54,7 @@ static inline __attribute__((always_inline)) void stop_this_cpu(void) { - unsigned apicid; - apicid = lapicid(); - - /* Send an APIC INIT to myself */ - lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); - lapic_write(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT); - /* Wait for the ipi send to finish */ - lapic_wait_icr_idle(); - - /* Deassert the APIC INIT */ - lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); - lapic_write(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT); - /* Wait for the ipi send to finish */ - lapic_wait_icr_idle(); - - /* If I haven't halted spin forever */ + /* Called by an AP when it is ready to halt and wait for a new task */ for(;;) { hlt(); }

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[LinuxBIOS] r3017 - trunk/LinuxBIOSv2/src/include/cpu/x86
by svn＠openbios.org 19 Dec '07

19 Dec '07

Author: mjones Date: 2007-12-19 02:52:11 +0100 (Wed, 19 Dec 2007) New Revision: 3017 Modified: trunk/LinuxBIOSv2/src/include/cpu/x86/lapic.h Log: Changed the stop_this_cpu() to just hlt. Removed local APIC INIT (don't worry the APIC and AP are still initialized). The local APIC INIT seemed to be the incorrect thing to do to stop an AP. The Intel Multiprocessor specification indicated that a vector should be set and a START should happen following an INIT. Then AP will execute the instructions pointed to by the vector. There is no vector or start in stop_this_cpu(). This seems to put the AP in an in-between state. In the case of Barcelona the AP's MSRs and PCI register are not accessible by the hardware debugger. The better solution seems to be to just put the AP in a hlt and allow the AP to go into C1. Then APIC managing software running on the BSP can program the AP as needed. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Reviewed-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/include/cpu/x86/lapic.h =================================================================== --- trunk/LinuxBIOSv2/src/include/cpu/x86/lapic.h 2007-12-19 01:49:44 UTC (rev 3016) +++ trunk/LinuxBIOSv2/src/include/cpu/x86/lapic.h 2007-12-19 01:52:11 UTC (rev 3017) @@ -54,22 +54,7 @@ static inline __attribute__((always_inline)) void stop_this_cpu(void) { - unsigned apicid; - apicid = lapicid(); - - /* Send an APIC INIT to myself */ - lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); - lapic_write(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT); - /* Wait for the ipi send to finish */ - lapic_wait_icr_idle(); - - /* Deassert the APIC INIT */ - lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); - lapic_write(LAPIC_ICR, LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT); - /* Wait for the ipi send to finish */ - lapic_wait_icr_idle(); - - /* If I haven't halted spin forever */ + /* Called by an AP when it is ready to halt and wait for a new task */ for(;;) { hlt(); }

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coreboot December 2007