coreboot April 2006

coreboot@coreboot.org

50 participants
115 discussions

[LinuxBIOS] PCI max buses patch
by Richard Smith 23 Apr '06

23 Apr '06

The following patch adds a CONFIG_MAX_PCI_BUSES to pci_locate_device() It defaults to 5 buses which should be plenty for 99% of us. I only added the actual option to the epia-m config but the global defaut should pickup for all the other boards. Please someone apply and auto-build to see if I broke anything. If not then I'll commit. -- Richard A. Smith

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[LinuxBIOS] Make testbios understand PCI bus:dev.func
by Richard Smith 23 Apr '06

23 Apr '06

The following patch makes testbios understand what to do with a device that is specified as bus:dev.func or dev.func. If you just give it one number then its works like the original. so '-d 0:9.0' or '-d 9.0' will translate to devfn of 0x48 It also add a sanity check for the device if you appear to be running an option ROM. So if you fail to specify a device or your -d parameter works out to 0 it prints a warning message. -- Richard A. Smith

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Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???
by Christian Sühs 23 Apr '06

23 Apr '06

> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 > Setting PCI_BRIDGE_CTL_VGA for bridge Root Device > > This means that the primary VGA device was set to 12.4. Which means > that 12.4 gets the legacy IO range. > Well, but why. I have told about the config script, that 9.0 is the one to use :( > Go into src/devices/device.c and change line 416 from a 1 to a 0. > Accrding to the comments that should use the last vga device as > primary rather than the first one. I will try this. But few things more. How does I handle the config.lb (attachment) first the old section: This produced LB, if I insert the wiki lines at least. After the other initializing stuff. If I insert device pci 9.0 on ... bla bla after device pci 0.0 on the second section is produced. ok, both don't bring up the console, but there are lot of differents In the second one 9.0 is allocated as VGA first but not as subsystem! Also there is no init which fails later?? chris ###################################### ## old one ################################### PCI: 00:12.3 disabled PCI: 00:12.4 disabled PCI: pci_scan_bus returning with max=00 done Allocating resources... Reading resources... Done reading resources. Allocating VGA resource PCI: 00:12.4 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fe000000 - 0x00fe00ffff] romem PCI: 00:12.1 10 <- [0x00fe012000 - 0x00fe0120ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe013000 - 0x00fe01307f] mem PCI: 00:12.4 10 <- [0x00fe010000 - 0x00fe010fff] mem PCI: 00:13.0 10 <- [0x00fe011000 - 0x00fe011fff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 cmd <- 142 PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 143 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:09.0 init rom address for PCI: 00:09.0 = fe000000 Incorrect Expansion ROM Header Signature 0202 PCI: 00:12.1 init PCI: 00:12.2 init ############################################################# ## new one #################################### PCI: pci_scan_bus returning with max=00 done Allocating resources... Reading resources... Done reading resources. Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 142 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init

2 1

Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036
by Richard Smith 23 Apr '06

23 Apr '06

> > If it does not work under factory with previously non-posted chip then > > you are going to have to re-enable the IO printfs and see whats up. > > > > What exact is the meaning of posted and non-posted. Sorry. My bad. I forget about the lingo sometimes. post or rather POST. Power On Self Test. The video bios people call a card that has been initialized by the BIOS 'posted.' Probally because it happens during the BIOS which used to be much more of a POST. Nowdays BIOS is a whole different beast but the 'posting' term remained. posted = initialized. -- Richard A. Smith

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Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???
by Richard Smith 23 Apr '06

23 Apr '06

Crap.. Forgot to reply to all.... > This allocated vga resource is part of the cs5530. This chip has an > included vga engine, which is not used for the board. Normally disabled > by Config.lb, but the PCI_RUN bring up that item. Ah well thats a problem. So the on board CS5530 VGA is device 12 and the Cyberpro 5000 is device 9? I don't have my PCI book handy but IIRC you have to use the highest number for guessing which is the primary display to enable the legacy IO ranges. Which is not the the chip you want. You said you were using the the eaglelion/5bcm config.lb config file right? I looked at it and I see: device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio device pci 12.4 off end # VGA Group question: If so then why does is the vga IO enabled? Is the PCI resource allocator for VGA supposed to use this config? -- -- Richard A. Smith

1 0

[LinuxBIOS] Tyan Tomcat K8E (S2865)
by Christian E. Jørgensen 23 Apr '06

23 Apr '06

Hi! I'm on the lookout for a socket 939 board that supports LinuxBIOS. Will this one do? If not, are there others? Best regards, Christian E. Jørgensen

1 0

Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036
by Richard Smith 22 Apr '06

22 Apr '06

On 4/22/06, Christian Sühs <chris(a)suehsi.de> wrote: > > > > > Set your device and try again. If it still dosen't work then try my > > alternate card method and run testbios on a non-posted card under > > factory. > > > > I have tried -d 0:9.0 > > -d 0:9:0 > > how is the right syntax for -d Its in the wiki testbios FAQ. * How to get pci busdevfn * lspci * look for your video card o Example: 2:00:00 2 (00 << 3) | 00 = 0x200 o Example: 00:12.0: 0 (12 << 3) | 0 = 0x90 So for you its 0 (9 << 3) | 0 = 0x048 so '-d 0x48' -- Richard A. Smith

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Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036
by Richard Smith 22 Apr '06

22 Apr '06

Oops forgot to Reply to all: > 8-) > > sorry I need to learn more about this. > > Ok, it doesn't work. I will try the second method with another card. doesn't work how? More details please or we can't help much. What output did you get? If it does not work under factory with previously non-posted chip then you are going to have to re-enable the IO printfs and see whats up. Note. Comparing the IO logs between the posted and non-posted runs won't do you much good. One of the first things video bios does is check to see if the card has already been posted and if it has then it will take a different path and skip a lot of the init stuff. Welcome to the single hardest thing in Linuxbios. *grin* Well perhaps second to trying to enable RAM without a proper datasheet. Definitely the hardest from a user standpoint. -- Richard A. Smith

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Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036
by Christian Sühs 22 Apr '06

22 Apr '06

> > > Running the bios under the emu is tricky. It may be bailling out > early although normally it prints a messge. Search the archives for > info. You will probally have to add debug printf's to see whats going > on. > Ok, yesterday evening I have found the testbios faq on the linuxbios page. I have tried it twice. 1. extracted vgabios from fuctory bios. 2. bios get with dd command from /dev/mem The result of first try I have described before, it happens nothing. The second try seems to be more successfully :D The screen goes to black :D after a second. No more. The connected TFT holds the signal. There is a short flickering after 30 seconds I think. (The reason for no output on the console is the FB Mode. I have sometimes problems, if I start a normal program, than there is no output too and I need to press <return> for a while to get a prompt) The system is still running but the only way to get a new try is <ctrl><alt><del> to shutdown and reboot the system. Than I have made tests with my host system, to see what happens. I get a vga.bin with dd and try it. (PCI Nvidia Graphic Card) I get a lot of numbers on the console for about 5 seconds, than the screen switched to black and the monitor lost the signal and goes to stand by. The system is still running but only <strg><alt><del> helps. Mmmh, both systems runs in FB Mode, could that be the reason for no more output? Should I try the bios on a real console? What does USER Space mean in the wiki? chris > -- > Richard A. Smith >

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[LinuxBIOS] Bios memory init
by Hugo MERCIER 22 Apr '06

22 Apr '06

Hi, I'm investigating the Linuxbios port to the ASUS A7V600 motherboard. I'm currently at an early phase of the development. I'm just trying to get the bios executing code ... and I noticed some strange behavior ... I wrote a little piece of asm to make the speaker beep. I created an "empty" bios image (full of 0xFF) except a jmp at FFFFFFF0 to a beep routine and flashed it. Result : nothing happens. I then copied and overwrite the original bios in order to make it beep only (modification of the jmp and insertion of the beep function). I flashed it and it beeps ... So, it seems the flash memory has to contain some correct bytes before the processor is "launched". Right ? Consequently, I took this modified beeping image, and iteratively filled it with 0xFF and tested if it beeps, in a dichotomic manner, in order to find what part of the memory is needed. Result: Two blocks in the memory have to be present before execution of any instruction: a 1024bytes block at FFFF7C00 and a 16bytes block at FFFFFFD0. The second block begins with "0x00 0x7C 0xFF 0xFF", so it seems to be a pointer to the first block. I can't figure out what these blocks mean. It is divided into 4 subblocks. It's not x86 code. Some sort of init table ... processor microcode ? other chipsets init ? The dump of the two blocks are in attachment. Any ideas ?

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coreboot April 2006