coreboot January 2005

coreboot@coreboot.org

43 participants
155 discussions

20 Jan '05

Is it mandatory to report Reserved Memory region to the OS? For example, the IOAPICs memory-mapped addresses? Would that be a problem if Linux kernel didn't see it be claimed as RESERVED? It seems Linuxbios doesn't claim any memory regions as RESERVED. gin

2 1

problem with PPC
by Greg Watson 20 Jan '05

20 Jan '05

Well, I have a problem. The PPC code, which was working in November, is now no longer working. I rebuilt the Sandpoint image using the same configuration file, but now I just get garbage on the screen. To help me track this down, can anyone who has made changes that are likely to have cause this, please let me know. Greg

1 0

what cpu model is a PIII?
by Richard Smith 19 Jan '05

19 Jan '05

I'm trying to setup my /cpu/intel/socket_PGA370 directory. What cpu model should I use? -- Richard A. Smith

1 0

Re: Small and fast systerm.
by Bari Ari 18 Jan '05

18 Jan '05

Frank wrote: >> >>Just FYI we're working on V2 for the CN400 (Epia-nano). >> >>-Bari > > > The board looks very attractive for an application I'm thinking > about. If I were to go out and buy an Epia board tomorrow, which > one should I get if I want to use V2... Anyone know the status of all the Epia's working with V2? -Bari

4 7

ACPI and Linux
by Stefan Reinauer 18 Jan '05

18 Jan '05

*Sigh* When Linux has IOAPICs and Local Apics configured via an ACPI MADT it will not read the mptable at all. It will reference mptable information though and not find any bus. Only way out seems to add a DSDT als well. Or whatever table it wants for that. It is really broken. Stefan

1 0

linkb_to_host
by YhLu 18 Jan '05

18 Jan '05

Committed. Please check it. i wonder what the different between offs = ( pci_read_config16(dev, pos + PCI_CAP_FLAGS) & (1<<10)) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS; and offs = ( (pci_read_config16(dev, pos + PCI_CAP_FLAGS) >> 10) & 1) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;

2 1

Re: SMP linux
by YhLu 18 Jan '05

18 Jan '05

You are kidding. I put junk in the CVS server? I guess he still need some time to figure out how to modify his mptable.c. YH -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Tuesday, January 18, 2005 11:35 AM To: Gin Cc: 'LinuxBIOS' Subject: Re: SMP linux "Gin" <ginlin(a)nexcom.com.tw> writes: > I've been stuck at this problem for a while. My linuxbios boots a > NON-SMP kernel ok but not the SMP one. > The SMP kernel gets loaded and run. When it tries to access an IDE > drive, an IDE command timed out before anything returns(kernel > messages). My I/O APIC settings correspond to the MP table. > > All ISA devices are mapped to the I/O IOAPIC at 0xFEC00000. But where do > we set this I/O APIC up? How does it know to route the IRQs to the local > APIC? Linux looks at the mptable. > Another question is, does linuxbios setup the local APIC as Virtual Wire > mode that via I/O APIC? Usually we simply setup the local apic in virtual wire mode. > My board is similar to Tyan/s2735, does anyone get this booted with a > SMP linux before?? Good question. Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

3 3

Intel 7520 support
by YhLu 18 Jan '05

18 Jan '05

Eric, When can you put the E7520 support on the CVS server? I have worked out all amd64 dual core support even on 8 way system and want to play something else. Regards YH

2 1

Re: SMP linux
by YhLu 18 Jan '05

18 Jan '05

I moved that from V1 to V2 before you change the cpu initialization structure..... YH

1 0

RE: Overlaping IO resource for AMD K8
by YhLu 18 Jan '05

18 Jan '05

It works on S2895 + NV (Vendor 10de, Device 00fd) card. You did a great job. Please disable the printk_debug instruction biosemu.c. YH

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coreboot January 2005