coreboot January 2005

coreboot@coreboot.org

43 participants
155 discussions

dead bios
by Amaury Jacquot 28 Jan '05

28 Jan '05

hi guys I just attempted to flash my epia M10000 with the official latest bios from via (and their stupid awfl<something> program) and the mobo is dead. what can I do to revive the thing ?

3 5

Boot Windows Please!
by Digital Infra, Inc. 27 Jan '05

27 Jan '05

Hello. As my understanding, current LinuxBIOS can not boot Windows and the reason for it is that it depends on 16bit bios feature much. So far is right? If right, how about this way. Have you noticed already? First, LinuxBIOS is loaded from flash ROM. Then, it moves itself to uppder 16M area. and it loads some free 16bit BIOS image from somewhere ( e.g. HDD, USB memory or even network) to under 1M area. And LinuxBIOS jumps to 16bit BIOS. Of course, this sequence should not be invoked automatically but by user command, e.g. run_windows or such. Or, can you add function to load FreeDOS from LinuxBIOS? if it is possible, we can run at least Win95/98/Me with LOADLIN.exe. and I would think maybe there is a way to boot Win2K/XP from FreeDOS. --- Okajima, Jun. Tokyo, Japan. Memory map: ----4G-------- LinuxBIOS ----16M------- Reserved for HIMEM.SYS ----1M-------- 16bitBIOS -------------- Note: if you understand Japanese, it is also welcome to mail me privately with Japanese.

7 18

linuxbios on geode gx1 with sst-39SF020A and CompactFlash
by ramesh bios 27 Jan '05

27 Jan '05

Hi everyone, Thanks to all of you for having created this project. I'm excited about trying it out and hopefully I'll be able to contribute something back in the future. I've purchased two custom made boards that have a nsc geode gx1 processor and a cs5530A companion chip. It is a typical embedded geode board and has two winbond W83977F superio chips, and realtek 8100BL ethernet. Currently, both boards have PhoenixBIOS on them. The flash chip that appears to be used to store the BIOS is an SST 39SF020A chip. The board has a CompactFlash slot on ide0 for the operating system. My intent is to replace the PhoenixBIOS with LinuxBIOS. Given that the 39sf020a appears to be a 2Mbit chip, I was wondering if LinuxBIOS will work. My plan is to have LinuxBIOS on the 2Mbit flash and have the normal kernel and then all of userspace on partitions on the compact flash. Is that a reasonable config to attempt? I'm going to start looking at the example config for the nano board and hopefully I'll be able to figure my way around. I'm kind of worried that I might have to fit the kernel into the 2mbit flash, or at least a very stripped down version of the kernel into the 2mbit flash, because I suspect that the bootstrap code would be unlikely to be able to read the kernel of the compactflash. I guess once I start trying then I'll know for sure. In the meantime, any advice or suggestons that anyone could provide would be much appreciated. Thanks, Ramesh --------------------------------- Do you Yahoo!? Yahoo! Mail - Find what you need with new enhanced search. Learn more.

10 56

Open Source BIOS is not only choice.
by Digital Infra, Inc. 27 Jan '05

27 Jan '05

Sorry for forking a new thread. I have read your discussion about booting Windows from linuxbios and understand that compatibility of open source bios is the issue. then, how about this idea. WARN: I dont know this is legal in your country. consult an attorney before you do something. Proposal: Just use proprietary BIOS. you can buy it from BIOS upgrading company. and even I think you MIGHT be able to use a BIOS comes with your PC. I mean, you back up your proprietary BIOS before burn linuxBIOS and use it. For example, you save the bios image to HDD and use it. --- Okajima, Jun. Tokyo, Japan.

6 8

RE: Open Source BIOS is not only choice.
by Dmitriy Budko 27 Jan '05

27 Jan '05

> > For booting Windows after you installed linuxbios. > > You still aren't makeing sense to me. Booting a COTS bios after you > boot linuxbios to boot windows is a regression not an advancement. > You aren't getting any extra features. You are just adding > complexity. If you are going to boot a COTS bios then just boot the > COTS bios you don't need linuxbios. > > -- > Richard A. Smith It makes sense if you usually want to boot Linux, but sometimes want to boot Windows. Dmitriy Budko, VMware

2 1

Hypertransport Speed
by Stefan Reinauer 26 Jan '05

26 Jan '05

Hi, I would like to check the applied patch into LinuxBIOS CVS if nobody happens to disagree loudly: 1) hypertransport clocking This patch allows to disable the speed cuts during hypertransport setup using cmos variables "amdk8_1GHz" and "amd8131_800MHz". I've tried them on hardware which worked perfectly fine with the higher speed links for both devices (K8 and 8131). Since it is disabled per default and needs cmos and compile time activation, it will not break anything. Affected files: src/config/Options.lb src/devices/hypertransport.c src/northbridge/amd/amdk8/coherent_ht.c src/northbridge/amd/amdk8/incoherent_ht.c 2) ram init This patch allows to use 8x (and probably 16x) dimms with LinuxBIOS on K8. Affected files: src/northbridge/amd/amdk8/raminit.c 3) Debugging This patch will print the pci vendor/device id in print_pci_devices() which makes determining the early bus structure a lot easier. It also only prints the first 128 bytes of SPDROM during dump_spd_registers() since they are defined to be 128byte. Affected files: src/northbridge/amd/amdk8/debug.c Stefan

2 2

devices/hypertransport.c
by YhLu 26 Jan '05

26 Jan '05

I add one OPT_HT_LINK in it to disable the ht_setup_link. for the ht_setup_link is already done in auto.c stage. YH

1 0

RE: Hypertransport Speed
by YhLu 26 Jan '05

26 Jan '05

For 1) Please don't do that on amd8131_800Mhz. Also I suggest you need to check the CPU rev to decide if set to 1GMhz. For 2) That bit only control x4 DIMM, So please don't do that on x8 or x16. All the Normal BIOS only compare that to 4 only, and AMD document only said x4 Only. For 3) Should be OK. YH > -----Original Message----- > From: Stefan Reinauer [mailto:stepan@openbios.org] > Sent: Wednesday, January 26, 2005 2:17 AM > To: linuxbios(a)clustermatic.org > Subject: Hypertransport Speed > > Hi, > > I would like to check the applied patch into LinuxBIOS CVS if > nobody happens to disagree loudly: > > 1) hypertransport clocking > > This patch allows to disable the speed cuts during hypertransport > setup using cmos variables "amdk8_1GHz" and "amd8131_800MHz". > I've tried them on hardware which worked perfectly fine > with the higher speed links for both devices (K8 and 8131). > Since it is disabled per default and needs cmos and compile time > activation, it will not break anything. > > Affected files: > src/config/Options.lb > src/devices/hypertransport.c > src/northbridge/amd/amdk8/coherent_ht.c > src/northbridge/amd/amdk8/incoherent_ht.c > > 2) ram init > > This patch allows to use 8x (and probably 16x) dimms with LinuxBIOS > on K8. > > Affected files: > src/northbridge/amd/amdk8/raminit.c > > 3) Debugging > This patch will print the pci vendor/device id in > print_pci_devices() > which makes determining the early bus structure a lot easier. > > It also only prints the first 128 bytes of SPDROM during > dump_spd_registers() since they are defined to be 128byte. > > Affected files: > src/northbridge/amd/amdk8/debug.c > > > > Stefan > > > >

2 1

RE: fallback reset_vector offset
by YhLu 25 Jan '05

25 Jan '05

Yes the posion in rom Linbios_ram.rom auto.c entry failover reset_vector just need to make sure entry/failover is in 64k limit. So enable_rom in failover can be executed. YH > Progress however unless I am mistaken this will fail > miserably on an 8111 that only enables 64KiB of ROM by default. > > I think all of failover.c needs to be put in the magic > position, if we are going to allow arbitrary memory size code. > > Eric >

1 0

kernel configuration
by Andreas Bach Aaen (AH/TED) 25 Jan '05

25 Jan '05

Hi, I am planning to user a new 2.6 kernel for linuxbios, to be able to use klibc and a cpio archive as an early boot image. Any hints on how to use kexec or similar to pass the control to another kernel loaded from network/disk? To strip down the 2.6 kernel I intent to use patches from: www.selenic.com/tiny-about/ Unfortunately this site sem to down right now... Regards, -- Andreas Bach Aaen System Developer, M. Sc. Ericsson Telebit A/S tel: +45 89 38 51 00 Skanderborgvej 232 fax: +45 89 38 51 01 8260 Viby J Denmark andreas.bach.aaen(a)ericsson.com

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot January 2005