coreboot June 2003

coreboot@coreboot.org

55 participants
94 discussions

timer.h - No such file or directory
by roger 08 Jun '03

08 Jun '03

Using the smartcore-p5 tree: gcc ... -o ide.o /home/roger/src/linuxbios/freebios/src/pc80/ide/ide.c /home/roger/src/linuxbios/freebios/src/pc80/ide/ide.c:27:19: timer.h: No such file or directory I'm seeing a freebios/src/etherboot/timer.h & freebios/src/arch/ppc/include/timer.h but nothing for the i386/ -- Roger http://www.eskimo.com/~roger/index.html

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docprobe can't find DOC
by roger 08 Jun '03

08 Jun '03

Ok. I've been bit-banging all day and cannot get docprobe to find the DOC chips. This board is a tyan tiger 1832DL 440BX (2x750P3). I'm wonder if there are any known issues with DOC's on the 440bx boards? Or any known issues with any of the lately issued DOC Millinium chips? It looks as if docprobe is a) not recognizing the DOC or b) isn't probing the correct address. (i've fiddled with the high (etc) settings for the driver in the kernel config too.) I've gotten as far as this: Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 89 found at 0xc8000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 31 found at 0xca000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xcc000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xce000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 0C found at 0xd0000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 66 found at 0xd2000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xd4000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xd6000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xd8000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xda000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xdc000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xde000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 00 found at 0xe0000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID C2 found at 0xe2000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 75 found at 0xe4000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID 6C found at 0xe6000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xe8000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xea000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xec000 Jun 7 16:17:16 Possible DiskOnChip with unknown ChipID FF found at 0xee000 Jun 7 16:17:16 No recognised DiskOnChip devices found -- Roger http://www.eskimo.com/~roger/index.html

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Additions to list of injuries
by roger 08 Jun '03

08 Jun '03

1) 2-3 index & thumb fingures sustained several stabbings and blood lossage. 1) 1st degree burn. Thumb mysteriously has the letters "WA" imprinted. Could this be evidence that i'm the one that burned a now labeled "A**RD" bios chip? wow. and the darn thing still boots. i wonder if these bios chips could last a trip through the sun and still boot? Amazing as to how many bendings these pins can handle and still not break! -- Roger http://www.eskimo.com/~roger/index.html

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Re: tusl2-c with kernel
by Yap Ee Huey 08 Jun '03

08 Jun '03

Hi , Thansk for the reply. I have been following the list , I noticed that there are two different things RAMTEST and MEMTEST in linuxbios. My linuxbios (on 815ep) passed the RAMTEST few weeks ago. Is there any HOWTO on MEMTEST ? Thanks. Regards, eehuey >From: ron minnich <rminnich(a)lanl.gov> >To: Yap Ee Huey <yapeehuey(a)hotmail.com> >CC: linuxbios(a)clustermatic.org >Subject: Re: tusl2-c with kernel >Date: Fri, 6 Jun 2003 07:40:24 -0600 (MDT) > >Have you just tried memtest first? > >I am wondering if you do in fact have a dram problem. > >ron > _________________________________________________________________ Download the latest MSN Messenger http://messenger.msn.com.my

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PPC
by Greg Watson 07 Jun '03

07 Jun '03

Just thought you might like to know that I booted a linux kernel using linuxbios on a PPC yesterday. There are still a few issues to sort out, but it's looking very promising. For those that are attending USENIX next week, I'll have the machine at the BOF so you can see it really works! Cheers, Greg

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new config language
by ron minnich 06 Jun '03

06 Jun '03

comments welcome. This doc is in the RFC section. ron New config language for LinuxBIOS \begin{abstract} We describe the new configuration language for LinuxBIOS. \end{abstract} \section{Scope} This document defines the new configuration language for LinuxBIOS. \section{Goals} The goals of the new language are these: \begin{itemize} \item Simplified Makefiles so people can see what is set \item Move from the regular-expression-based language to something a bit more comprehensible and flexible \item make the specification easier for people to use and understand \item allow unique register-set-specifiers for each chip \end{itemize} \section{Language} Here is the new language. It is very similar to the old one, differing in only a few respects. It borrows heavily from Greg Watson's suggestions. I am presenting it in a pseudo-BNF in the hopes it will be easier. Things in '' are keywords; things in ``'' are strings in the actual text. \begin{verbatim} #exprs are composed of factor or factor + factor etc. expr ::= factor ( ``+'' factor | ``-'' factor | )* #factors are term or term * term or term / term or ... factor ::= term ( ``*'' term | ``/'' term | ... )* # unary-op ::= ``!'' ID # term is a number, hexnumber, ID, unary-op, or a full-blown expression term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)'' # Option command. Can be an expression or quote-string. # Options are used in the config tool itself (in expressions and 'if') # and are also passed to the C compiler when building linuxbios. # It is an error to have two option commands in a file. # It is an error to have an option command after the ID has been used # in an expression (i.e. 'set after used' is an error) option ::= 'option' ID '=' (``value'' | term) # Default command. The ID is set to this value if no option command # is scanned. # Multiple defaults for an ID will produce warning, but not errors. # It is OK to scan a default command after use of an ID. # Options always over-ride defaults. default ::= 'default' ID '=' (``value'' | term) # the mainboard, southbridge, northbridge commands # cause sourcing of Config.lb files as in the old config tool # as parts are sourced, a device tree is built. The structure # of the tree is determined by the structure of the components # as they are specified. To attach a superio to a southbridge, for # example, one would do this: # southbridge acer/5432 # superio NSC/123 # end # end # the tool generates static initializers for this hierarchy. # add C code to the current component (motherboard, etc. ) # to initialise the component-INDEPENDENT structure members init ::= 'init' ``CODE'' # add C code to the current component (motherboard, etc. ) # to initialise the component-DEPENDENT structure members register ::= 'register' ``CODE'' # mainboard command # statements in this block will set variables controlling the mainboard, # and will also place components (northbridge etc.) in the device tree # under this mainboard mainboard ::= 'mainboard' PATH (statements)* 'end' # standard linuxbios commands southbridge ::= 'southbridge' PATH (statemnts)* 'end' northbridge ::= 'northbridge' PATH (statemnts)* 'end' superio ::= 'superio PATH (statemnts)* 'end' cpu ::= 'cpu' PATH (statemnts)* 'end' arch ::= 'arch' PATH (statemnts)* 'end' # files for building linuxbios # include a file in crt0.S mainboardinit ::= 'mainboardinit' PATH # object file object ::= 'object' PATH # driver objects are just built into the image in a different way driver ::= 'driver' PATH # Use the Config.lb file in the PATH dir ::= 'dir' PATH # add a file to the set of ldscript files ldscript ::= 'ldscript' PATH # dependencies or actions for the makerule command dep ::= 'dep' ``dependency-string'' act ::= 'act' ``actions'' depsacts ::= (dep | act)* # set up a makerule # makerule ::= 'makerule' PATH depsacts #defines for use in makefiles only # note usable in the config tool, not passed to cc makedefine ::= 'makedefine' ``RAWTEXT'' # add an action to an existing make rule addaction ::= 'addaction' PATH ``ACTION'' # statements statement ::= option | default | cpu | arch | northbridge | southbridge | superio | object | driver | mainboardinit | makerule | makedefine | addaction | init | register | iif | dir | ldscript statements ::= (statement)* # target directory specification target ::= 'target' PATH # and the whole thing board ::= target (option)* mainboard \end{verbatim} A sample file: \begin{verbatim} target x # over-ride the default rom size in the mainboard file option ROM_SIZE=0x100000 mainboard amd/solo end \end{verbatim} Sample mainboard file \begin{verbatim} # ### ### Set all of the defaults for an x86 architecture ### arch i386 end cpu k8 end # option DEBUG=1 default USE_FALLBACK_IMAGE=1 option A=(1+2) option B=0xa # ### ### Build our 16 bit and 32 bit linuxBIOS entry code ### mainboardinit cpu/i386/entry16.inc mainboardinit cpu/i386/entry32.inc ldscript cpu/i386/entry16.lds ldscript cpu/i386/entry32.lds # ### ### Build our reset vector (This is where linuxBIOS is entered) ### if USE_FALLBACK_IMAGE mainboardinit cpu/i386/reset16.inc ldscript cpu/i386/reset16.lds end if USE_NORMAL_IMAGE mainboardinit cpu/i386/reset32.inc ldscript cpu/i386/reset32.lds end . . . if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end # ### ### Romcc output ### #makerule ./failover.E dep "$(MAINBOARD)/failover.c" act "$(CPP) -I$(TOP)/src $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failever.E" #makerule ./failover.inc dep "./romcc ./failover.E" act "./romcc -O ./failover.E > failover.inc" #mainboardinit ./failover.inc makerule ./auto.E dep "$(MAINBOARD)/auto.c" act "$(CPP) -I$(TOP)/src -$(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" makerule ./auto.inc dep "./romcc ./auto.E" act "./romcc -O ./auto.E > auto.inc" mainboardinit ./auto.inc # ### ### Setup RAM ### mainboardinit ram/ramtest.inc mainboardinit southbridge/amd/amd8111/smbus.inc mainboardinit sdram/generic_dump_spd.inc # ### ### Include the secondary Configuration files ### northbridge amd/amdk8 end southbridge amd/amd8111 end #mainboardinit arch/i386/smp/secondary.inc superio NSC/pc87360 register "com1={1} com2={0} floppy=1 lpt=1 keyboard=1" end dir /pc80 ##dir /src/superio/winbond/w83627hf cpu p5 end cpu p6 end cpu k7 end cpu k8 end # ### ### Build the objects we have code for in this directory. ### ##object mainboard.o driver mainboard.o object static_devices.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end ### Location of the DIMM EEPROMS on the SMBUS ### This is fixed into a narrow range by the DIMM package standard. ### option SMBUS_MEM_DEVICE_START=(0xa << 3) option SMBUS_MEM_DEVICE_END=(SMBUS_MEM_DEVICE_START +1) option SMBUS_MEM_DEVICE_INC=1 # ### The linuxBIOS bootloader. ### option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) # \end{verbatim} I've found the output of the new tool to be easier to handle. Makefile.settings looks like this, for example: \begin{verbatim} TOP:=/home/rminnich/src/yapps2/freebios2 TARGET_DIR:=x export MAINBOARD:=/home/rminnich/src/yapps2/freebios2/src/mainboard/amd/solo export ARCH:=i386 export _RAMBASE:=0x4000 export ROM_IMAGE_SIZE:=65535 export PAYLOAD_SIZE:=131073 export MAX_CPUS:=1 export HEAP_SIZE:=8192 export STACK_SIZE:=8192 export MEMORY_HOLE:=0 export LINUXBIOS_VERSION:=1.1.0 export CC:=$(CROSS_COMPILE)gcc \end{verbatim} In other words, instead of expressions, we see the values. It's easier to deal with.

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tusl2-c with kernel
by Yap Ee Huey 06 Jun '03

06 Jun '03

Hi all, After failing to load with both Etherboot and ADLO, I tried to reduce the size of kernel to 192k bytes ( which can only boot and execute simple command ) to fit into my 256k rom. But after "Jumping to boot code", it reboots. Does that mean my ram initialization is buggy ? Thanks. Below is my log : regards, eehuey Wrote linuxbios table at: 00000500 - 0000065c checksum 2d0c Jumping to linuxbiosmain()... Welcome to start32, the open sourced starter. This space will eventually hold more diagnostic information. January 2000, James Hendricks, Dale Webster, and Ron Minnich. Version 0.1 37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000ffff Gunzip setup gunzip_setup output data is 0x00100000 Gunzipping boot code flush 0x00100000 count 0x00008000 flush 0x00108000 count 0x00008000 flush 0x00110000 count 0x00008000 flush 0x00118000 count 0x00008000 flush 0x00120000 count 0x00008000 flush 0x00128000 count 0x00008000 flush 0x00130000 count 0x00008000 flush 0x00138000 count 0x00008000 flush 0x00140000 count 0x00008000 flush 0x00148000 count 0x00008000 flush 0x00150000 count 0x00008000 flush 0x00158000 count 0x00008000 flush 0x00160000 count 0x00000b30 <990> command line - [root=/dev/hda5] Jumping to boot code LinuxBIOS-1.0.0 Fri Jun 6 20:09:28 EDT 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. _________________________________________________________________ Download the latest MSN Messenger http://messenger.msn.com.my

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GDT in entry16/32.inc
by Xavier Pegenaute 05 Jun '03

05 Jun '03

Hello, for curiosity is there any specific reason for put values in the first entry of GDT in the file src/cpu/i386/entry[16|32].inc ?. The content of the first entry is: .globl EXT(gdtptr) gdt: EXT(gdtptr): .word gdt_end - gdt -1 /* compute the table limit */ .long gdt /* we know the offset */ .word 0 ... etc ... Xavi. Regards.

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boot problem with compact flash
by Serafino Sorrenti 04 Jun '03

04 Jun '03

Command? Max cpuid index : 1 Command? Vendor ID : AuthenticAMD Command? Processor Type : 0x00 Command? Processor Family : 0x06 >>>>> >>>>> Too many errors encountered; the rest of the message is ignored: > Processor Model : 0x08 > Processor Mask : 0x00 > Processor Stepping : 0x00 > Feature flags : 0x0183f9ff > > > MTRR check > Fixed MTRRs : Enabled > Variable MTRRs: Enabled > > Disabling local apic...done. > CPU #0 Initialized > Allocating PCI resources... > ASSIGN RESOURCES, bus 0 > PCI: 00:00.0 10 <- [0xf8000000 - 0xfbffffff] mem > PCI: 00:00.1 10 <- [0x00002c90 - 0x00002c93] io > PCI: 00:00.1 14 <- [0x00002ca0 - 0x00002ca3] io > PCI: 00:00.1 18 <- [0x00002cb0 - 0x00002cb3] io > PCI: 00:00.1 1c <- [0x00002cc0 - 0x00002cc3] io > PCI: 00:00.1 20 <- [0x00002c80 - 0x00002c8f] io > PCI: 00:01.1 10 <- [0x00002000 - 0x000020ff] io > PCI: 00:01.1 14 <- [0xfc100000 - 0xfc100fff] mem > PCI: 00:01.2 10 <- [0xfc101000 - 0xfc101fff] mem > PCI: 00:01.3 10 <- [0xfc102000 - 0xfc102fff] mem > PCI: 00:01.4 10 <- [0x00002400 - 0x000024ff] io > PCI: 00:01.4 14 <- [0xfc103000 - 0xfc103fff] mem > PCI: 00:01.6 10 <- [0x00002800 - 0x000028ff] io > PCI: 00:01.6 14 <- [0x00002c00 - 0x00002c7f] io > PCI: 00:02.0 1c <- [0x00001000 - 0x00001fff] bus 1 ÿÿÿÿÿÿio > PCI: 00:02.0 24 <- [0xf0000000 - 0xf7ffffff] bus 1 ÿÿÿÿÿÿprefmem > PCI: 00:02.0 20 <- [0xfc000000 - 0xfc0fffff] bus 1 ÿÿÿÿÿÿmem > ASSIGN RESOURCES, bus 1 > PCI: 01:00.0 10 <- [0xf0000000 - 0xf7ffffff] prefmem > PCI: 01:00.0 14 <- [0xfc000000 - 0xfc01ffff] mem > PCI: 01:00.0 18 <- [0x00001000 - 0x0000107f] io > Allocating VGA resource > done. > Enabling PCI resourcess...PCI: 00:00.0 cmd <- 07 > PCI: 00:00.1 cmd <- 01 > PCI: 00:01.0 cmd <- 0c > PCI: 00:01.1 cmd <- 03 > PCI: 00:01.2 cmd <- 02 > PCI: 00:01.3 cmd <- 02 > PCI: 00:01.4 cmd <- 03 > PCI: 00:01.6 cmd <- 01 > PCI: 00:02.0 cmd <- 27PCI: 01:00.0 cmd <- 03 > done. > Initializing PCI devices... > PCI devices initialized > Enabled in SIS 503 regs 0x40 and 0x45 > handle_superio start, s 0000b040 nsuperio 1 s->super 0000b318 > handle_superio Pass 1, check #0, s 0000b040 s->super 0000b318 > handle_superio: Pass 1, Superio SiS 950 > handle_superio port 0x2e, defaultport 0x2e > handle_superio Using port 0x2e > handle_superio Pass 1, done #0 > handle_superio done > PCCHIPS M810LMR (and similar)...Entering the initregs process > Southbridge fixup done for SIS 503 > handle_superio start, s 0000b040 nsuperio 1 s->super 0000b318 > handle_superio Pass 2, check #0, s 0000b040 s->super 0000b318 > handle_superio: Pass 2, Superio SiS 950 > handle_superio port 0x2e, defaultport 0x2e > handle_superio Using port 0x2e > Call finishup > handle_superio Pass 2, done #0 > handle_superio done > Copying IRQ routing tables to 0xf0000...done. > Wrote linuxbios table at: 00000500 - 0000066c checksum bc14 > > Welcome to elfboot, the open sourced starter. > January 2002, Eric Biederman. > Version 1.2 > > 37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000ffff > Found ELF candiate at offset 0 > New segment addr 0x400000 size 0xcba0 offset 0x60 filesize 0x8789 > (cleaned up) New segment addr 0x400000 size 0xcba0 offset 0x60 filesize 0x8789 > Loading Segment: addr: 0x0000000000400000 memsz: 0x000000000000cba0 filesz: > 0x0000000000008789 > Clearing Segment: addr: 0x0000000000408789 memsz: 0x0000000000004417 > Jumping to boot code > ROM segment 0x0000 length 0x0000 reloc 0x0000 > Etherboot 5.0.6 (GPL) ELF for [SIS900] > Boot from (N)etwork or from (L)ocal? clocks_per_tick = 941374 > N > I am now initializing the ide system > init_drive sectors_per_track = [32], num_heads = [16],num_cylinders=[984], > num_sectors = [503808] > LBA mode supported > > Boot: (hd0,0)/kernel > rawread (post_loop) ide_read_sector failed > File not found > Probing...[SIS900]Found SIS900 ROM address 0x0000 > The PCI BIOS has not enabled this device! > Updating PCI command 0003->0007. pci_bus 00 pci_device_fn 09 > Found SIS 85C503/5513 PCI to ISA bridge ROM address 0x0000 > > sis900_probe: MAC addr 00:0A:E6:4B:4A:AF at ioaddr 0X2000 > sis900_probe: Vendor:0X1039 Device:0X0900 > sis900_probe: No MII transceivers found! > No adapter found > <sleep> > <abort> > Boot from (N)etwork or from (L)ocal? N > I am now initializing the ide system > init_drive sectors_per_track = [32], num_heads = [16],num_cylinders=[984], > num_sectors = [503808] > LBA mode supported > > Boot: (hd0,0)/kernel > File not found > Probing...[SIS900]Found SIS900 ROM address 0x0000 > Found SIS 85C503/5513 PCI to ISA bridge ROM address 0x0000 > > sis900_probe: MAC addr 00:0A:E6:4B:4A:AF at ioaddr 0X2000 > sis900_probe: Vendor:0X1039 Device:0X0900 > sis900_probe: No MII transceivers found! > No adapter found > <sleep> > <abort> > Boot from (N)etwork or from (L)ocal? N > I am now initializing the ide system > init_drive sectors_per_track = [32], num_heads = [16],num_cylinders=[984], > num_sectors = [503808] > LBA mode supported > > Boot: (hd0,0)/kernel > File not found > Probing...[SIS900]Found SIS900 ROM address 0x0000 > Found SIS 85C503/5513 PCI to ISA bridge ROM address 0x0000 > > sis900_probe: MAC addr 00:0A:E6:4B:4A:AÆ > > > > > > this is the error on boot in my serial console, but in the Compact flash the > file /kernel is here and don't have any problem. > > Tnx Serafino

1 0

Request for Status update of LinuxBios for SC1200 chipset
by Narendra PAtel 04 Jun '03

04 Jun '03

Dear Christer, After going through the mar2002 freebios mailing list I read about your achievement of SC1200 board working with linuxbios!!! As you mentioned in that mail that you had not tested graphics and Audio. Could you please update us with the present status of Linuxbios development for NSC's SCx2xx chipset? Does that final working code or patch being uploaded or can the final working code be available to us for our application which is very similar to Dorado II platform(SC1200 based)? Did you achieved booting WinCe using Linuxbios? Linuxbios homepage has posted one news that Linuxbios can boot windows 2000!!!! but the code is not yet posted. Thanks and regards, Narendra Patel. _________________________________________________________________ Technical writer?. Earn more now! http://server1.msn.co.in/msnleads/tis/index.asp Find out how.

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coreboot June 2003