coreboot June 2003

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Re: K7SEM Serial Boot Log....What next...
by Alex Scarbro 24 Jun '03

24 Jun '03

Based on the Sis 630 HOWTO by Ron Minnich. HOWTO written by Brenden Bixler This file contains instructions for the K7SEM, Socket 7 (k7/Duron) based mainboards. Unfortunately, there is a step in this HOWTO that could be hazardous. The hazards include (but are not limited to) 1) destroying your motherboard 2) hurting yourself 3) killing yourself Because of these hazards, you must take full responsibility if you decide to install LinuxBIOS following these procedures. Neither Los Alamos National Labs or any lab personnel can be held responsible for any adverse consequences of your attempt to follow these procedures. WARNING: We assume you've built kernels, know how to open up your PC, and how to yank the flash part out while power is on and put in a different part. There is NO WARRANTY, express or implied, with this software. In fact, if you don't know what you're doing, and you get careless, you're going to end up with a nice paperweight instead of a motherboard, an emergency room bill, or a funeral service. YOU HAVE BEEN WARNED. Additional information available at: http://www.acl.lanl.gov/linuxbios/ Linux distribution: Most modern distributions are supported. This HOWTO tested using RedHat 7.2 Other software notes: You MUST have 'as' version 2.9.5 or later. You MUST have ssh to connect to sourceforge Recommended: you might want to get a 32-DIP Zero Insertion Force (ZIF) socket for the flash part. This makes taking out flash and putting in Disk On Chip much easier. You need to have a LinuxBIOS machine (the machine that runs LinuxBIOS) and a build machine (which will let you build LinuxBIOS). These can be one and the same machine. In this HOWTO we assume they're the same. We nevertheless refer to a 'build' machine and 'LinuxBIOS' machine in case you want to use a different machine. Also, freebios and LinuxBIOS still share the same source tree. We use the name 'LinuxBIOS' where it makes sense, and 'freebios' otherwise. But they are the same source base. ---- The steps for loading LinuxBIOS are simple: 1) Get Linux installed on your LinuxBIOS machine. 2) Get LinuxBIOS source from Sourceforge. 3) Get a 2.4.0 kernel, patch it, then compile. 4) Configure and build LinuxBIOS. 5) Get the MTD utilities from http://www.linux-mtd.infradead.org/ and build the 'erase' utility. 6) Set up the 'flash_on' program in your path. 7) Put a Disk On Chip into the flash socket. 8) Burn the chip. 9) Reset the machine -- did it work? --- Step 1) Get Linux installed on your LinuxBIOS machine. Tested on RedHat 7.2 Note: Do not format disk partitions as ext3! It's not supported by the LinuxBIOS kernel patch for 2. 4.7. Stick with ext2 -- it makes things much easier. Step 2) Grab the LinuxBIOS source. cd to the directory you want the source tree to be. Note: This HOWTO uses /usr/src as the base directory. After running the following commands from this directory, you should have a directory (/usr/src/freebios) with all the source code. export CVS_RSH=ssh (or in tcsh setenv CVS_RSH ssh) cvs -d:pserver:anonymous@cvs.freebios.sourceforge.net:/cvsroot/freebios login (at the password prompt, just hit <return>) cvs -z3 -d:pserver:anonymous@cvs.freebios.sourceforge.net:/cvsroot/freebios co freebios Step 3) Surf to www.kernel.org and get linux-2.4.7.tar.gz from the kernel archives. Once you have pulled this file down and untar'ed it, apply the proper patch from the freebios/src/kernel_patches directory. (tar xzvf linux-2.4.7.tar.gz; mv linux linux_2.4.7; cd /usr/src/linux_2.4.7) The patch is: linux-2.4.7-sis.patch Your patch command will look like this: patch -p1 < /usr/src/freebios/src/kernel_patches/linux-2.4.7-sis.patch Now cp /usr/src/freebios/src/kernel_patches/config-2.4.7-sis to .config make oldconfig make dep make vmlinux make modules make modules_install make bzdisk (You should test boot this floppy disk just to be safe) You now have a kernel for LinuxBIOS. Now, try booting the floppy to ensure that the LinuxBIOS kernel works. On our machine, we received a few errors but the machine did boot completely. We were without networking, so you certainly want to keep your original kernel if you need to boot back to pull files of the Internet. If you want, you can also install this kernel on the LinuxBIOS machine, and install the modules as well, since you will need the Disk On Chip modules to burn the Disk On Chip part. In our experience, we found it's easiest to work within your stock kernel and only boot the LinuxBIOS kernel off the floppy when you're ready to burn the DOC. Step 4) You now need to figure out where you want to put your build images. We used /usr/src/build a directory we created. DO NOT PUT THESE IN THE LinuxBIOS SOURCE TREE. You want to put them OUTSIDE THE TREE, so you can always cvs update and not lose any of your build directory. LinuxBIOS does all the builds in a single directory, much as BSD does. To build LinuxBIOS requires a Makefile, a crt0.S file, and a ld script file. These are generated by a config tool located in freebios/utils/config. The config tool is a Python program originally written by Dean Risinger of the ACL. To build the initial Makefile, assembly stub, and ld script, you need to build a config file, run the config tool, cd to the build directory, and type 'make'. That said, first create your config file using the text editor of your choice. This file can be located anywhere... we used /usr/src/sis.config. Here is the config file for the k7SEM: # This will dump all the files in /usr/src/build target /usr/src/build # Elitegroup K7sem mainboard elitegroup/k7sem # Request this level of debugging output option DEFAULT_CONSOLE_LOGLEVEL=8 # At a maximum only compile in this level of debugging option MAXIMUM_CONSOLE_LOGLEVEL=8 #option DEBUG # Enable Serial Console for debugging # It will come up at 115200,8n1 option SERIAL_CONSOLE=1 option SERIAL_POST=1 # Use the internal VGA frame buffer device option HAVE_FRAMEBUFFER=1 #floppy is nice option MUST_ENABLE_FLOPPY=1 # We're using disk on chip. Tell it where to find the docipl code option USE_DOC_MIL=1 docipl northsouthbridge/sis/730/ipl.S # Path to your kernel (vmlinux) # NOTE; you need a path to your kernel here. linux /usr/src/linux_2.4.7/ # Kernel command line parameters commandline root=/dev/hda3 single console=ttyS0,115200 console=tty0 video=sisfb:1024x768-8@60 The target command names the build directory. The mainboard command names the mainboard. We have set options for a serial console which will get you LinuxBIOS debug output via the serial port. You have to tell it where to find the vmlinux you build (the 'linux' command); and finally you need a commandline for now. To run the config tool, you need two arguments: the first is the name of a config file, and the second is the (absolute) pathname of the freebios source tree. The config tool is NLBConfig.py. Make sure you use that and not LBConfig.py, the older version. Now, just run the configuration tool to generate the Makefile. python /usr/src/freebios/util/config/NLBConfig.py sis.config /usr/src/freebios Assuming no errors, cd into /usr/src/build and type make. If you receive an error message then verify your configuration file is correct and/or consult the LinuxBios website. After running make, we now have three files to be loaded into the Disk On Chip. The first is called docipl. It is 512 bytes. The second is called LinuxBIOS.strip, and is the binary image of the LinuxBIOS that gets loaded into Doc. The third file is your kernel, and is stripped and compressed, linux.bin.gz -rw------- 1 rminnich CIC-ACL 512 Dec 20 08:41 docipl -rwx------ 1 rminnich CIC-ACL 33494 Dec 20 08:41 LinuxBIOS.strip* -rwx------ 1 rminnich CIC-ACL 756069 Dec 20 08:41 linux.bin.gz* Ensure that all of the above files exist. Very important: mv linux.bin.gz vmlinux.bin.gz This is your compressed kernel image. You're now ready to burn the Disk On Chip, but first .... Step 5) Get the MTD utilities from http://www.linux-mtd.infradead.org/ cd /usr/src (this is going to create another sub-directory) cvs -d :pserver:anoncvs@cvs.infradead.org:/home/cvs login (password: anoncvs) cvs -d :pserver:anoncvs@cvs.infradead.org:/home/cvs co mtd cd /mtd/util/ sh -x MAKEDEV make This creates the 'erase' utility. Install the erase utility where it is in your path. One such method is to use vi and edit the .bashrc PATH=$PATH:/usr/src/mtd/util; export PATH . .bashrc (run in the same directory as the .bashrc file is located) Step 6) Set up flash_on utility. cd /usr/src/freebios/util/sis/ flash_on.c is found in freebios/util/sis/flash_on.c Make the utility, and put it in your path. Path in the .bashrc file should look like this now: PATH=$PATH:/usr/src/mtd/util:/usr/src/freebios/util/sis; export PATH Make sure to re-read the path by running the file again: . .bashrc echo $PATH to ensure both directories are included. Step 7) NOTE: BE ADVISED THAT THIS STEP CAN HURT OR KILL YOU! YOU ARE WORKING WITH A POWERED-ON COMPUTER AT THIS POINT. THE COMPUTER NEEDS TO BE OPENED UP, AND YOU NEED TO REMOVE A CHIP WHILE THE COMPUTER IS ON. IF YOU HAVE NOT DONE THIS TYPE OF WORK, DO NOT DO IT! WE TAKE NO RESPONSIBILITY FOR ANYTHING THAT HAPPENS AT THIS STEP. BEFORE DOING THIS STEP WITH POWER ON, YOU SHOULD TRY IT WITH POWER OFF. Reboot the machine and boot off the floppy. You need to be running the LinuxBIOS kernel with all the loaded DOC modules to successfully burn the chip. Open the machine (LEAVE THE POWER ON), yank the flash, and plug in the DoC. We recommend you practice this first with the power off. Make sure that whatever you do, you are not shorting things out. Avoid using a metal tool! NOTE: YOU CAN HURT YOURSELF AT THIS STEP. We can't take any responsibility for what happens to you here. If you haven't done this, or are not trained, or have a history of getting hurt by hardware, DON'T DO IT. Step 8) cd to /usr/src/build (imperative -- won't burn correctly unless you run the script while inside this directory) Run /usr/src/freebios/util/mtd/burn_mtd Step 9) POWER OFF THE MACHINE. DoC requires this. Turn it back on. LinuxBIOS should come up in a few seconds. DEBUGGING ___________ If you can, hook up a serial line to your LinuxBIOS machine, settings 115200,8n1 and see what messages come out. If you can capture them, send them to linuxbios(a)lanl.gov with a description of your problem.

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K7SEM Serial Boot Log....What next...
by Alex Scarbro 24 Jun '03

24 Jun '03

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mtd drivers and diskonchip millenium
by roger 24 Jun '03

24 Jun '03

hey all. just dropping a note here that I'm having a problem getting the doc2001 module(s) to recognize a diskonchip millenium being placed in the old motherboard bios chip socket. seems I have to induce a kernel oops to get the diskonchip recognized. i've already emailed the problem to the mtd mailling lists and david mentioned something about using a memory map module prior to loading. so my installation of linuxbios has been stalled. basically, on reboot, the both boxes act similar to as if there is no bios chip installed. also have the docipl + 440bx support issue. As a work around tho, I plan on buying spare bios chips. However, mtd is still buggy. So far, openbios/devbios is the only thing that will actively let me read/write to the device. (Tyan Tiger 1832DL 440BX with a second 440BX board laying around. Both with the same problem. So much for spending the extra buck on intel boards to ensure compatability eh?) -- Roger http://www.eskimo.com/~roger/index.html

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the freeze
by ron minnich 24 Jun '03

24 Jun '03

OK, I just committed the earlymtrr patch for faster boots. I think at this point we stop taking patches to the core stuff, with one remaining issue: we need the ecc patch so K7s won't blow up. So, once that's in, I think we should try to declare 1.0.1 closed. People who own various mainboards, please test with the latest cvs, save for those of you with K7 boards. ron

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I just updated the web page at www.linuxbios.org
by ron minnich 24 Jun '03

24 Jun '03

look at any STATUS you might own and see if it is right. Sorry for the delay. ron

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Re: new config language.
by YhLu 24 Jun '03

24 Jun '03

Eric, Thanks for the info about ROMCC. The code about mem init in northbridge/amd/amdk8/coherent_ht.c and northbridge/amd/amdk8/raminit.c had some overlap. On bus 0, dev 0x18 and f 1. I will add something at northbridge/amd/amdk8/coherent_ht.c regards Yinghai Lu -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年6月20日 13:08 收件人: YhLu 抄送: ron minnich; linuxbios(a)clustermatic.org 主题: Re: new config language. YhLu <YhLu(a)tyan.com> writes: > Eric, > > Thanks for the advice. > I will try to add the SMP support in the northbridge/amd/amdk8 at first. OK. There are few levels of this. Coherent Hypertransport setup. Mapping resources to their location in the coherent HT domain. Memory Initialization on secondary cpus. Starting up the secondary cpus. Stefan Reinauer is currently working on Coherent Hypertransport initialization. And there is a hardcoded version of it in northbridge/amd/amdk8/coherent_ht. c Ron is currently working on getting the new Config language going and probably in the week or two we will switch over to that. While not writing memory initialization code I am busily getting the kinks out of romcc. I think I have just squashed the last of the bugs in register allocator. I thought I was there earlier but a few extra ones cropped up after I rewrote the algorithms so they ran in a reasonable amount of time. And since the reasons for my original hesitation are no longer valid I have implemented goto support in romcc. I think I am only short enumeration constants, macros with arguments, and switch statements to have a full implementation of C. Admittedly there are some things I cannot support like non const static variables. And I still have to fix the limits on variables, currently I don't limit chars and shorts when stored in larger integers to just the low bits of the register. Eric

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Re: 答复: coherent hypertransport enumeration on opteron
by ron minnich 24 Jun '03

24 Jun '03

On 24 Jun 2003, Eric W. Biederman wrote: > Yes. It has been in the repository in src/include/device/pci_def.h > for a month now. At least according to CVS. gag. It came down to my machine here at work and not my x24. OK, more fun. ron

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答复: coherent hypertransport enumeration on opteron
by YhLu 24 Jun '03

24 Jun '03

Stefan, I swap the PCI_ADDR(0, 0x18, 0, 0x6C), 0xffffff8c, 0x00000070, //1C The 4th line. It can go through setup_coherent_ht_domain. But seems then both CPU all works. Please refer the attached. Any problem. Regards Yinghai Lu LinuxBIOS-1.1.02.0Fallback Mon Jun 23 21:39:13 EDT 2003 starting... Bootstrap cpu setting up coherent ht domain.... done. P LinuxBIOS-1.1.02.0Fallback Mon Jun 23 21:39:13 EDT 2003 starting... I :L i0n0u:x0B1.I0O0S- 1.P1C.I0:2 .000F:a0l1.l0b1ac k MoPnC IJ:u n0 02:30 2.2010:3 9:P1C3I :E D0T0 :2002.0031 s :artPCinIg:. .0.0 03Copying LinuxBIOS to ram. .00 PCI: 00:04

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Re: hidden IC2 bus on ASUS
by ebiederman＠lnxi.com 24 Jun '03

24 Jun '03

I am bouncing this to the LinuxBIOS list because most of the discusion happens there. And I am extremely busy at the moment. Rudolf Marek <MAREKR2(a)cs.felk.cvut.cz> writes: > Hello, > > I have ASUS A7S333 (Sis745). > > On I2C I got only one winbond chip and one unknown device. > No SPD eeprom no PLL. > > I read somewhere that you are curios to know if other ASUS mainboards > got this feature. So here is my answer. > > I want to enable the SPD i2c in case I can read the SPD timings. > (I wrote i2c driver patch for my 745 into lm_sensors, ten to my surprise > theese SPD and PLL devices "missing") > > Unfortunatelly I dont have SiS745 spec so I dont know where to trigger > this back. Would you give me some hint please? The only hint I have is that boards like this tend to have a mux on the i2c line. Either controlled by a gpio line. Or I have seen the controlled by an i2c device. > Thank you. > > Rudolf Marek > > CTU prague student. Welcome, Eric

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Re: coherent hypertransport enumeration on opteron
by YhLu 24 Jun '03

24 Jun '03

I remember there is one type error on arch/i386/lib/pci_ops.c. Change one *val --> value How about your new build script progress? Regards Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年6月23日 15:06 收件人: YhLu 抄送: Stefan Reinauer; ebiederman(a)lnxi.com; linuxbios(a)clustermatic.org 主题: Re: 答复: coherent hypertransport enumeration on opteron what is pci_def.h BTW? I can't build now. ron

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coreboot June 2003