coreboot June 2003

coreboot@coreboot.org

55 participants
94 discussions

Re: romcc progress.
by ebiederman＠lnxi.com 16 Jun '03

16 Jun '03

Please don't do html mail... And please CC the linuxBIOS list. I admit it is not a real substitute for documentation but with these kinds of discussions happening in public the information is distributed more widely and more people can answer question or take action based on a conversation. Jeff Pipkins <jpipkins(a)austin.rr.com> writes: > This is a really cool concept, and a very useful tool.   > > It took me a while to figure out what romcc was from reading the romcc code > and the LinuxBIOS code.  I think it would be worthwhile to put a copy of > the email below in the romcc directory in the source tree, especially if > you think it'll be a while before any formal documenation exists.   That sounds like a good idea. I will see about that. > It would > also be helpful to have a short comment in the C code that depends on romcc > to say so.  Otherwise, it's a real head-twister to see a C program setting > up mtrr's!  ;^) Well changing mtrrs is not romcc specific. We do that even in the freebios1 tree. With romcc you can just run the C code earlier. The real difference is that with romcc rdmsr wrmsr are done with builtins whereas with gcc you need to do inline asm. I am in the processes of setting of the APIs in LinuxBIOS so that most code will work with or without romcc. You comment reminds me that I still have to sync of the rdmsr/wrmsr APIs... > > Nice piece of work, thanks in advance for the fun I'm going to have with > it! Welcome. And BTW I have just committed a change that reduces the algorithmic complexity of parts of the register allocator. So the compiler now should have a much more reasonable runtime. Eric

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答复: High-End Desktop Support
by YhLu 14 Jun '03

14 Jun '03

Eric and Ron, I can get into the Etherboot now. But I meet problem again: Etherboot 5.0.10 (Last Product version) only support Intel 82544. Tyan s2725 uses Intel 82646EB. (DeviceID is ox1010). So It said" No Adapter found". Etherboot 5.1.8 seems support 82546, But I found 1. can not make EBI, have to use ELF. It is around 30KB. 2. If disable RELOCATION : got error: NO HEAP FOUND. 3. If enable RELOCATION: got error: It can not calculate the file size, and keep print " 61:rom_read_bytes() - skipping block 16" My Question is: 1. When do you plan to support 82546? In 5.0.11 or 5.2.0. 2. Is there any easy way to modify 5.0.10 to make it work with Intel 82546? Thanks and regards Yinghai Lu 222222222222222222222222222222222222222222222222222 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xffff0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 Dropping non PT_LOAD segment New segment addr 0x20000 size 0x10e80c3 offset 0xb0 filesize 0x755c (cleaned up) New segment addr 0x20000 size 0x10e80c3 offset 0xb0 filesize 0x755c Loading Segment: addr: 0x000000003ffca7e8 memsz: 0x000000000000ec0c filesz: 0x00 0000000000755c Clearing Segment: addr: 0x000000003ffd1d44 memsz: 0x00000000000076b0 Loading Segment: addr: 0x000000000002ec0c memsz: 0x00000000010d94b7 filesz: 0x00 00000000000000 Clearing Segment: addr: 0x000000000002ec0c memsz: 0x00000000010d94b7 Jumping to boot code at 0x20000 ROM segment 0x0000 length 0xfbf8 reloc 0x00020000 CPU 1343 Mhz Etherboot 5.1.8 (GPL) Tagged ELF (Multiboot) for [E1000] init_heap: No heap found. 22222222222222222222222222222222222222222222222222222222222222222 33333333333333333333333333333333333333333333333333333333333333333333333333 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xffff0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 Dropping non PT_LOAD segment New segment addr 0x20000 size 0x1106000 offset 0xb0 filesize 0x76bcc3 (cleaned up) New segment addr 0x20000 size 0x1106000 offset 0xb0 filesize 0x76bc c3 Loading Segment: addr: 0x000000003ffca7e8 memsz: 0x000000000000ec0c filesz: 0x00 0000000000ec0c Loading Segment: addr: 0x000000000002ec0c memsz: 0x00000000010f73f4 filesz: 0x00 0000000075d0b7 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 61:rom_read_bytes() - skipping block 16 3333333333333333333333333333333333333333333333333333333333333333333333333333 3 -----�ʼ�ԭ��----- ��: YhLu ��ʱ��: 2003��6��13�� 0:27 �ռ��: ron minnich; ebiederman(a)lnxi.com ��: linuxbios(a)clustermatic.org ��: ��: High-End Desktop Support Eric, I am working on porting linuxbios to Tyan s2725. The southbridge is ICH5. I have copied 82801ca to 82801er. And update pci_ids.h to add some ICH5 device id. I compare the Intel whitepaper, only need to comment out several line in ich5_ioapi.c. because ICH5 has no operation to index 3 reg. I didn't initialize USB and Serial ATA. I used e1000.ebi from Etherboot 5.0.8. I only got the following result. The ebi size is 18164, so I set ROM_IMAGE_SIZE to 46*1024. I wonder why the size if not right: 0x4564 = 17764. But the EBI is 18164. Regards Yinghai Lu Console output: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xffff0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x94000 size 0x7168 offset 0x60 filesize 0x4564 (cleaned up) New segment addr 0x94000 size 0x7168 offset 0x60 filesize 0x4564 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000007168 filesz: 0x00 00000000004564 Clearing Segment: addr: 0x0000000000098564 memsz: 0x0000000000002c04 Jumping to boot code at 0x�� -----�ʼ�ԭ��----- ��: YhLu ��ʱ��: 2003��6��12�� 17:12 �ռ��: ron minnich; Peter Fedorow ��: linuxbios(a)clustermatic.org ��: ��: High-End Desktop Support Ron, Any plan to make it support ICH5. It has USB 2.0 support and Serial ATA support. Yinghai Lu -----�ʼ�ԭ��----- ��: ron minnich [mailto:rminnich@lanl.gov] ��ʱ��: 2003��6��12�� 8:37 �ռ��: Peter Fedorow ��: linuxbios(a)clustermatic.org ��: Re: High-End Desktop Support On Thu, 12 Jun 2003, Peter Fedorow wrote: > I'm looking for a fully supported motherboard that can accept at least a > 2 GHz Pentium 4 or AMD Athlon. intel e7500, 7501, etc. are supported. ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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EPIA PCI slot
by Brian G. Rhodes 13 Jun '03

13 Jun '03

The reason I was not getting interrupts on devices in the pci slot on the EPIA is because they were not set to be bus masters, so they would never generate interrupts. A quick write to the command register fixed the problem. Command register is being set to 0x02. It should be set to 0x06. a 6 to 4. I haven't looked to see if this is pervasive throughout linuxbios, or if for other boards this is handled specifically, but it is a bug. Brian G Rhodes bgr(a)linespeed.net brhodes(a)visualcircuits.com +1 612-741-1191

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Re: romcc progress.
by ebiederman＠lnxi.com 13 Jun '03

13 Jun '03

John van Vlaanderen <john-at-thinman(a)nyc.rr.com> writes: > Hi Eric, > > I think it's really incredible that you are developing this, and once > it's done I am sure we will all wonder how we lived w/ out it. > > But, as embarrassed as I am to ask, what is it for ?? I suspect others who have not followed this to closely probably have the same question. romcc is a C compiler that does not use a stack. Instead it keeps all variables in registers. Currently LinuxBIOS has a lot of assembly code simply because memory initialization is difficult in the general case. This code cannot be written with a standard compiler because there is no memory to put a stack in. Nor on x86 are there cache blocks that can be locked into place. As code generated with romcc does not use a stack it can be used during memory initialization. It is true romcc is not *done*, it is quite usable at this point. In the freebios2 I have been gradually making the primary API ones that can be used before memory is initialized. The biggest difference is that if you want to return multiple values instead of passing in the address of a variable the a multi valued structure must be returned. The biggest current known bug is that if you have a small type like short when it is stored in a register nothing ensures it does not take on a larger value than will fit in a short. unsigned short i; i = 65535; i = i + 1; /* i == 65536 oops */ The biggest shortcoming comes from it's nature and I have used it enough at this point I don't want to live without it again. Eric

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ELF boot and Multiboot
by SONE Takeshi 13 Jun '03

13 Jun '03

Eric, In the source of mkelfImage, linux-i386/convert_params.c, there is some code to retrieve information like memory map from Multiboot information structure. However, ELF images created by mkelfImage does not have Multiboot header, according to 'mbchk' of GRUB boot loader. In what situation is this code supposed to run (and tested)? If one added a (trivial) Multiboot header in the head.S, the resulting kernel could be loaded from GRUB, while it could also be loaded by ELF boot of LinuxBIOS and Etherboot? -- Takeshi

2 4

答复: High-End Desktop Support
by YhLu 13 Jun '03

13 Jun '03

Ron, Any plan to make it support ICH5. It has USB 2.0 support and Serial ATA support. Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年6月12日 8:37 收件人: Peter Fedorow 抄送: linuxbios(a)clustermatic.org 主题: Re: High-End Desktop Support On Thu, 12 Jun 2003, Peter Fedorow wrote: > I'm looking for a fully supported motherboard that can accept at least a > 2 GHz Pentium 4 or AMD Athlon. intel e7500, 7501, etc. are supported. ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

2 1

答复: High-End Desktop Support
by YhLu 13 Jun '03

13 Jun '03

Eric, I am working on porting linuxbios to Tyan s2725. The southbridge is ICH5. I have copied 82801ca to 82801er. And update pci_ids.h to add some ICH5 device id. I compare the Intel whitepaper, only need to comment out several line in ich5_ioapi.c. because ICH5 has no operation to index 3 reg. I didn't initialize USB and Serial ATA. I used e1000.ebi from Etherboot 5.0.8. I only got the following result. The ebi size is 18164, so I set ROM_IMAGE_SIZE to 46*1024. I wonder why the size if not right: 0x4564 = 17764. But the EBI is 18164. Regards Yinghai Lu Console output: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xffff0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x94000 size 0x7168 offset 0x60 filesize 0x4564 (cleaned up) New segment addr 0x94000 size 0x7168 offset 0x60 filesize 0x4564 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000007168 filesz: 0x00 00000000004564 Clearing Segment: addr: 0x0000000000098564 memsz: 0x0000000000002c04 Jumping to boot code at 0x�� -----�ʼ�ԭ��----- ��: YhLu ��ʱ��: 2003��6��12�� 17:12 �ռ��: ron minnich; Peter Fedorow ��: linuxbios(a)clustermatic.org ��: ��: High-End Desktop Support Ron, Any plan to make it support ICH5. It has USB 2.0 support and Serial ATA support. Yinghai Lu -----�ʼ�ԭ��----- ��: ron minnich [mailto:rminnich@lanl.gov] ��ʱ��: 2003��6��12�� 8:37 �ռ��: Peter Fedorow ��: linuxbios(a)clustermatic.org ��: Re: High-End Desktop Support On Thu, 12 Jun 2003, Peter Fedorow wrote: > I'm looking for a fully supported motherboard that can accept at least a > 2 GHz Pentium 4 or AMD Athlon. intel e7500, 7501, etc. are supported. ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

High-End Desktop Support
by Peter Fedorow 12 Jun '03

12 Jun '03

I hope this is an appropriate question to ask here. Does LinuxBIOS support any of the current high-end desktop chipsets? I checked the LinuxBIOS status page, but I didn't see any matches. I'm looking for a fully supported motherboard that can accept at least a 2 GHz Pentium 4 or AMD Athlon. Peter

2 1

config language
by ron minnich 12 Jun '03

12 Jun '03

Eric has pointed out to me that we need a tree to properly describe the new complex systems such as K8. The current config language is not sufficient to do the job. I've been thinking about mods to the language that preserve the current simplicity for the vast majority of motherboards out there, while at the same time allowing a complex hierarchy to be described. I think I have an idea. Currently we say things like this: southbridge vendor/model ... superio vendor/model ... This syntax is actually sufficient for something like 95% of the motherboards we need to support. But what if we have southbridge vendor/model ... southbridge vendor/model ... superio vendor/model ... which southbridge is the superio on? Here is my proposed change southbridge vendor/model[=<tag>] [parent=<tag>] ... superio vendor/model[=<tag>] [parent=<tag>] ... (note this syntax applies to all the types of parts) Consider the simple case. The one southbridge is given a default tag of southbridge, with the default parent of northbridge. The superio is given the default tag of superio, with the default parent of southbridge. It all works. Consider the hard case. southbridge intel/xyz=sb1 ... southbridge intel/xyz=sb2 ... superio NSC/abs parent=sb1 ... If there is more than one northbridge, then we can set the parent tag for the southbridge. This syntax allows arbitrary trees to be described; it is as simple in the base case as the current one; and it should be fairly straightforward to implement. Computing the path to a given part is then easy. Some flexibility in the tags should be possible. The tag could allude to an actual tag, or a part type (southbridge), or a part vendor/manufacturer pair (intel/xyz). As long as the tag specifies something unique, it should be acceptable. Another way to do it is this: southbridge [tag=<tag>] [parent=<tag>] any preference for syntax? Comments? ron

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linuxbios and bochs
by Brian G. Rhodes 11 Jun '03

11 Jun '03

I'm booting linuxbios with a adlo/bochs payload on a VIA EPIA 800. I have also disabled vga in bochs so thatit does not hang when vgabios is not present. Bochs will load about 10% of the time when rebooting the system. The rest of the time it will hang. I am quite certain that it is somewhere in bochs where the problem exists since I can load etherboot from linuxbios without issue. The times bochs does load from linux generally hangs shortly after lilo loads the kernel. What I am wondering is if anyone else has had this problem and come up with a workaround, or knows the reason, or atleast where I should look more closely. Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 POST: 0xf8 37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x7c00 size 0x20400 offset 0x100 filesize 0x20400 (cleaned up) New segment addr 0x7c00 size 0x20400 offset 0x100 filesize 0x20400 Loading Segment: addr: 0x00000000077649d8 memsz: 0x0000000000020400 filesz: 0x00000 Jumping to boot code at 0x7c00 POST: 0xfe Brian G Rhodes bgr(a)linespeed.net brhodes(a)visualcircuits.com +1 612-741-1191

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coreboot June 2003