Hi lists, Since it is too hard to get the detail information of Marvell CPU ( most of the information is covered under an NDA) , I decided to work on porting coreboot to Armltd Versatile PB. Most of its information is on the web of ARM ltd. and QEMU can emulate it so it is easy for me to test and use it. After applying those patches, we can now create a rom file only with bootblock. There is one problem when we add romstage to this rom file, I am trying to resolve this problem with the help of Patrick. Since no romstage and ramstage is in this rom file, no information will print to the screen. You can use the built-in gdb server in QEMU to trace the work of bootblock and walkcbfs.
It is under vendor "Armltd" and mainboard "Versatile PB". Please test it and any comments are welcome.
Thanks to you all for your kindly help.
On Fri, Jul 1, 2011 at 6:30 AM, Hamo hamo.by@gmail.com wrote:
Hi lists, Since it is too hard to get the detail information of Marvell CPU ( most of the information is covered under an NDA) , I decided to work on porting coreboot to Armltd Versatile PB. Most of its information is on the web of ARM ltd. and QEMU can emulate it so it is easy for me to test and use it. After applying those patches, we can now create a rom file only with bootblock. There is one problem when we add romstage to this rom file, I am trying to resolve this problem with the help of Patrick. Since no romstage and ramstage is in this rom file, no information will print to the screen. You can use the built-in gdb server in QEMU to trace the work of bootblock and walkcbfs.
It is under vendor "Armltd" and mainboard "Versatile PB". Please test it and any comments are welcome.
Thanks to you all for your kindly help.
Hi Hamo,
Thanks for the patches. It looks like you have made some progress. i hope that it can continue.
Marc