Greg has implemented the static tree/dynamic tree code mentioned yesterday, and today it passed its first test with flying colors.
Greg needed some ide setup done on the southbridge to make his IDE interface work.
To effect the change, he had to have certain code execute at a certain pass in the platform startup. Turned out the code could execute once PCI was configured.
His code in the mainboard Config.lb did not change:
southbridge winbond/w83c553 end
That's it.
But the C code for the southbridge had the CONF_PASS_POST_PCI code added for configuration:
void southbridge_init(struct chip *chip, enum chip_pass pass) {
struct southbridge_winbond_w83c553_config *conf = (struct southbridge_winbond_w83c553_config *)chip->chip_info;
switch (pass) { case CONF_PASS_POST_PCI: w83c553_init(); break;
default: /* nothing yet */ break; } }
The tail end of the code looks like this:
struct chip_control southbridge_winbond_w83c553_control = { enable: southbridge_init, name: "Winbond W83C553" };
This last bit is the chip_control structure, the "class definition" code for this part.
So, in short, it was trivial to set up, and showed, at least to us, that this is a good direction.
ron
* ron minnich rminnich@lanl.gov [030724 01:02]:
Greg has implemented the static tree/dynamic tree code mentioned yesterday, and today it passed its first test with flying colors.
I am still fighting this, since it broke NLBConfig in a way that is probably not worth fixing (it's missing the static_root completely, and we might not want to keep that in a generated file as well as in the config file): [..] linuxbios_c.o(.text+0x203e): In function `hardwaremain': : undefined reference to `static_root' [...]
The new config method fails, but I can't seem to find the wrong line in the config file.
~/LinuxBIOS/freebios2/targets> ./buildtarget arima/hdama/ Configuring TARGET hdama Will place Makefile, crt0.S, etc. in arima/hdama/hdama Configuring ROMIMAGE fallback Configuring DIR /config/Config.lb Configuring DIR /lib/Config.lb Configuring DIR /console/Config.lb Configuring DIR /stream/Config.lb Configuring DIR /devices/Config.lb Configuring DIR /pc80/Config.lb Configuring DIR /boot/Config.lb Configuring PART mainboard, path arima/hdama Configuring PART arch, path i386 Adding init file: config/crt0.base Configuring DIR lib/Config.lb Configuring DIR boot/Config.lb Configuring DIR smp/Config.lb End PART arch WARNING: Option CONFIG_SMP using default value 0 Configuring PART northbridge, path amd/amdk8 End PART northbridge Configuring PART southbridge, path amd/amd8111 End PART southbridge Configuring PART southbridge, path amd/amd8131 End PART southbridge Configuring PART superio, path NSC/pc87360 Trying to find one of '=' on line 153:
end ^
List of nearby tokens: (@3368) SOUTHBRIDGE = 'southbridge' (@3380) PATH = 'amd/amd8111' (@3392) END = 'end' (@3396) SOUTHBRIDGE = 'southbridge' (@3408) PATH = 'amd/amd8131' (@3420) END = 'end' (@3466) SUPERIO = 'superio' (@3474) PATH = 'NSC/pc87360' (@3487) REGISTER = 'register' (@3496) STR = '".com1={1}, .lpt=1"' ===> ERROR: Could not parse file arima/hdama/Config.lb:0 mainboard/arima/hdama/Config.lb:0
Any idea?
Thanks, Stefan
Stefan,
Sorry about that. I'll #define this better so that it's not required with the old configuration system.
The 'register' directive has changed slightly, but hasn't been updated in the tree. I've checked in the new version now.
Greg
At 3:54 PM +0200 24/7/03, Stefan Reinauer wrote:
- ron minnich rminnich@lanl.gov [030724 01:02]:
Greg has implemented the static tree/dynamic tree code mentioned yesterday, and today it passed its first test with flying colors.
I am still fighting this, since it broke NLBConfig in a way that is probably not worth fixing (it's missing the static_root completely, and we might not want to keep that in a generated file as well as in the config file): [..] linuxbios_c.o(.text+0x203e): In function `hardwaremain': : undefined reference to `static_root' [...]
The new config method fails, but I can't seem to find the wrong line in the config file.
~/LinuxBIOS/freebios2/targets> ./buildtarget arima/hdama/ Configuring TARGET hdama Will place Makefile, crt0.S, etc. in arima/hdama/hdama Configuring ROMIMAGE fallback Configuring DIR /config/Config.lb Configuring DIR /lib/Config.lb Configuring DIR /console/Config.lb Configuring DIR /stream/Config.lb Configuring DIR /devices/Config.lb Configuring DIR /pc80/Config.lb Configuring DIR /boot/Config.lb Configuring PART mainboard, path arima/hdama Configuring PART arch, path i386 Adding init file: config/crt0.base Configuring DIR lib/Config.lb Configuring DIR boot/Config.lb Configuring DIR smp/Config.lb End PART arch WARNING: Option CONFIG_SMP using default value 0 Configuring PART northbridge, path amd/amdk8 End PART northbridge Configuring PART southbridge, path amd/amd8111 End PART southbridge Configuring PART southbridge, path amd/amd8131 End PART southbridge Configuring PART superio, path NSC/pc87360 Trying to find one of '=' on line 153:
end ^
List of nearby tokens: (@3368) SOUTHBRIDGE = 'southbridge' (@3380) PATH = 'amd/amd8111' (@3392) END = 'end' (@3396) SOUTHBRIDGE = 'southbridge' (@3408) PATH = 'amd/amd8131' (@3420) END = 'end' (@3466) SUPERIO = 'superio' (@3474) PATH = 'NSC/pc87360' (@3487) REGISTER = 'register' (@3496) STR = '".com1={1}, .lpt=1"' ===> ERROR: Could not parse file arima/hdama/Config.lb:0 mainboard/arima/hdama/Config.lb:0
Any idea?
Thanks, Stefan
Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
On Thu, 24 Jul 2003, Stefan Reinauer wrote:
I am still fighting this, since it broke NLBConfig in a way that is probably not worth fixing (it's missing the static_root completely, and we might not want to keep that in a generated file as well as in the config file):
our mistake. We need to get greg to #ifdef that for now until we all cut over.
The new config method fails, but I can't seem to find the wrong line in the config file.
~/LinuxBIOS/freebios2/targets> ./buildtarget arima/hdama/ Configuring TARGET hdama Will place Makefile, crt0.S, etc. in arima/hdama/hdama Configuring ROMIMAGE fallback Configuring DIR /config/Config.lb Configuring DIR /lib/Config.lb Configuring DIR /console/Config.lb Configuring DIR /stream/Config.lb Configuring DIR /devices/Config.lb Configuring DIR /pc80/Config.lb Configuring DIR /boot/Config.lb Configuring PART mainboard, path arima/hdama Configuring PART arch, path i386 Adding init file: config/crt0.base Configuring DIR lib/Config.lb Configuring DIR boot/Config.lb Configuring DIR smp/Config.lb End PART arch WARNING: Option CONFIG_SMP using default value 0 Configuring PART northbridge, path amd/amdk8 End PART northbridge Configuring PART southbridge, path amd/amd8111 End PART southbridge Configuring PART southbridge, path amd/amd8131 End PART southbridge Configuring PART superio, path NSC/pc87360 Trying to find one of '=' on line 153:
end ^
cvs update, I fixed this yesterday.
sorry, this was a tweak to some of the initialization code.
I've got one more tweak to make today, but you should be able to build a working image. The problem I'm having now is that the 16 MB DRAM fill is so slow, any idea what would do this?
thanks
ron
* ron minnich rminnich@lanl.gov [030724 16:46]:
cvs update, I fixed this yesterday.
sorry, this was a tweak to some of the initialization code.
ah.. it works now.. thanks.
I've got one more tweak to make today, but you should be able to build a working image. The problem I'm having now is that the 16 MB DRAM fill is so slow, any idea what would do this?
hm 2nd level cache disabled?
Stefan
On Thu, 24 Jul 2003, Stefan Reinauer wrote:
hm 2nd level cache disabled?
yeah, but why? I thought I had copied the old config setup pretty well. Do you see anything?
Next bit is get SMP in there.
ron
so, stefan, it is working for you? HMM. Just stopped working for me :)
ron
* ron minnich rminnich@lanl.gov [030724 17:12]:
so, stefan, it is working for you? HMM. Just stopped working for me :)
No, it seems there is some flaw in memory setup of the second CPU. This is stil built with the old config. All the memory gets detected, but LinuxBIOS just restarts right after the timeout at: Boot from (N)etwork (D)isk (F)loppy or from (L)ocal?
Stefan
On Thu, 24 Jul 2003, Stefan Reinauer wrote:
No, it seems there is some flaw in memory setup of the second CPU. This is stil built with the old config. All the memory gets detected, but LinuxBIOS just restarts right after the timeout at: Boot from (N)etwork (D)isk (F)loppy or from (L)ocal?
you lost me. This is happening with the old or new config?
Does it all work correctly with the old config?
ron
* ron minnich rminnich@lanl.gov [030724 17:33]:
you lost me. This is happening with the old or new config?
with the current latest CVS I get the following error:
Configuring TARGET hdama Will place Makefile, crt0.S, etc. in arima/hdama/hdama ===> ERROR: Attempt to set nonexistent option MAXIMUM_CONSOLE_LOGLEVEL arima/hdama/Config.lb:0
I tried building an image with the prior version, but I assumed this would build ok if I adopt the targets/arima/hdama/Config.lb file to use my payload. I will try switching to new config method completely when it builds with above config file again.
Does it all work correctly with the old config?
as long as you don't initialize ram on the second cpu with the arima hdama, yes.
Stefan
On Thu, 24 Jul 2003, Stefan Reinauer wrote:
Configuring TARGET hdama Will place Makefile, crt0.S, etc. in arima/hdama/hdama ===> ERROR: Attempt to set nonexistent option MAXIMUM_CONSOLE_LOGLEVEL arima/hdama/Config.lb:0
put this at the top of Config.lb
uses MAXIMUM_CONSOLE_LOGLEVEL
This is a new restriction.
ron
Stefan, in a few minutes I'll be committing a simple change that greatly reduces the size of targets/arima/hdama/Config.lb.
I have tested this and it works fine, save for the slow memory test (which may be L2 cache, but may be who knows ... TOM again?)
ron
* ron minnich rminnich@lanl.gov [030724 17:05]:
Stefan, in a few minutes I'll be committing a simple change that greatly reduces the size of targets/arima/hdama/Config.lb.
I have tested this and it works fine, save for the slow memory test (which may be L2 cache, but may be who knows ... TOM again?)
Hm. Do you have the second cpu's memory controller activated? This seems to take forever here as well, since it tests at 2G but the machine has 1
Stefan
I'm now stopping with post code 0xee.
I do get past the memory test. There is a post code at 0x80 for a while.
darn it. Worked until the last cvs update.
ron