Hello,
I try to get run coreboot on a Compaq Ipaq PIII Pro Board. The board comes with a 810E Intel Chipset, SMC SuperIO, NIC and AUDIO onBoard. Also VGA is integrated to the chipset and provides 4MB graphics memory, which is soldered (not shared with system memory) near the 810E.
Currently there are two problems for me.
First, without set CONFIG_VIDEO_MB > 0 the Device is not detected (or disabled?) by coreboot. Means, there is now PCI_ROM_RUN for the onboard VGA. lspci don't list the device later.
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Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/7124] ops PCI: 00:00.0 [8086/7124] enabled PCI: 00:01.0 [8086/7125] enabled <--- (normally disabled as static PCI device, if Config_VIDEO_MB is 0
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Second, if CONFIG_VIDEO_MB is set to 1, the device inits, but later i get a vendor missmatch for vga.rom. Furthermore, the system needs about 50 seconds to boot linux. No VGA, but the Kernel FB810 Module detects the device.
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Northbridge init PCI: 00:01.0 init Check CBFS header at fffdffd0 magic is 4f524243 Found CBFS header at fffdffd0 Check pci8086,7125.rom In cbfs, rom address for PCI: 00:01.0 = fff80038 On mainboard, rom address for PCI: 00:01.0 = fff80038 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x010c PCI ROM Image, Vendor 8086, Device 7123, Device or Vendor ID mismatch Vendor 8086, Device 7123 PCI: 00:1e.0 init
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lspci shows the device as 8086:7125 on both coreboot and factory bios. If I change the vendor ID, like MS 6178 to 7123 or 7121, coreboot fails by an incorecct PCI Expansion signature which is pointed to 0x0000 (the first cbfs bytes and not the vga.bios)
To start, i have taken the Mitac files. This Board seems very closer to the Ipaq. FWH is a Intel 82802AB. It can be programed by flashrom and is normaly soldered.
Happy about any help
Sorry,
now I have understand the Patch for varios Intel Based Boards.
// return NULL;
OK, VGA comes up, but the system is very slow with activated device 1.0
is there any different between shared memory or onboard memory for configuration the chipset.
any hints.
Chris