Hello folks,
I get a HP Mininote with VIA C7 processor to try to free the bios with Coreboot. So I need some help to understand if it could be possible :
Here there are the facts :
$ lspci -tvnn -+-[0000:80]---01.0 VIA Technologies, Inc. VT1708/A [Azalia HDAC] (VIA High Definition Audio Controller) [1106:3288] -[0000:00]-+-00.0 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:0364] +-00.1 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:1364] +-00.2 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:2364] +-00.3 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:3364] +-00.4 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:4364] +-00.5 VIA Technologies, Inc. CN896/VN896/P4M900 I/O APIC Interrupt Controller [1106:5364] +-00.6 VIA Technologies, Inc. CN896/VN896/P4M900 Security Device [1106:6364] +-00.7 VIA Technologies, Inc. CN896/VN896/P4M900 Host Bridge [1106:7364] +-01.0-[0000:01]----00.0 VIA Technologies, Inc. CN896/VN896/P4M900 [Chrome 9 HC] [1106:3371] +-02.0-[0000:02-04]----00.0 Broadcom Corporation BCM4312 802.11a/b/g [14e4:4312] +-03.0-[0000:05-06]-- +-0f.0 VIA Technologies, Inc. Device [1106:5372] +-10.0 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.2 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.3 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.4 VIA Technologies, Inc. USB 2.0 [1106:3104] +-11.0 VIA Technologies, Inc. VT8237S PCI to ISA Bridge [1106:3372] +-11.7 VIA Technologies, Inc. VT8251 Ultra VLINK Controller [1106:287e] +-13.0 VIA Technologies, Inc. VT8237A Host Bridge [1106:337b] -13.1-[0000:07]----03.0 Broadcom Corporation NetXtreme BCM5788 Gigabit Ethernet [14e4:169c]
$ sudo superiotool -dV superiotool r3695 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0001, id=0x1285 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0x8512, rev=0x0 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x8512, rev=0x0 Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: sid=0x85, srid=0x00 Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Found SMSC SCH5317 (id=0x85, rev=0x12) at 0x2e No dump available for this Super I/O Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0x85/0x00, rev=0x12 Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0x85/0x00, rev=0x12 Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0x85/0x00, rev=0x12 Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0x85/0x00, rev=0x12 Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
$ sudo flashrom -V Calibrating delay loop... 482M loops per second, 100 myus = 182 us. OK. No coreboot table found. Found chipset "VIA VT8237S", enabling flash write... MMIO base at = 0xfed02000 0x6c: 0xffff (CLOCK/DEBUG) OK. Probing for AMD Am29F002(N)BB, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation Probing for AMD Am29F002(N)BT, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xf, id2 0x84 Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xf, id2 0x84 Probing for ASD AE49F2008, 256 KB: probe_jedec: id1 0xff, id2 0xff, id1 parity violation Probing for Atmel AT25DF021, 256 KB: Erreur de segmentation
The second question is a quizz :
From this pictures frolm a 2133 dissection, where is the bios chip ? Is it
easy to put a socket to easily change it ?
http://www.hp2133guide.com/hp-2133-mini-note-dissection/
Thanks for you interest,
Coreboot is Great !
Cedric.
Cirdec AREVIR wrote:
I get a HP Mininote with VIA C7 processor to try to free the bios with Coreboot. So I need some help to understand if it could be possible :
Yes, it could. At the very least you will need the chipset documentation however.
From this pictures frolm a 2133 dissection, where is the bios chip ?
http://www.hp2133guide.com/wp-content/uploads/2008/05/mobounderside3.jpg
The flash chip is U515 (written upside down on the PCB) - the 8-pin chip with a red ink dot on the corner. It's a little to the left of the ITE IT8512.
I can't read the model from the photo, but my guess is that it's an SST25VF080B.
Your version of flashrom is very old, get the latest and I think it will work on the system.
Is it easy to put a socket to easily change it ?
This chip package is called SO-8 or SOIC-8. The distance between the two rows of pins is 200 mil. I haven't seen any sockets that would be suitable for replacing a SO-8 and still have socket+chip be small enough to not be a problem with regard to the computer's case.
For development it would be best to have an emulator instead, coresystems are using the Dediprog SF-100 successfully, but it costs further money. Another option is to work on the Artec dongle VHDL code to also implement an SPI chip-compatible state machine, and logic to fetch and prefetch data from the dongle flash chip at just the right SPI clock cycles in order to meet the SPI bus timing requirements.
//Peter
On 29.08.2009 14:20, Peter Stuge wrote:
Cirdec AREVIR wrote:
I get a HP Mininote with VIA C7 processor to try to free the bios with Coreboot.
[...] ITE IT8512. [...] SST25VF080B.
Your version of flashrom is very old, get the latest and I think it will work on the system.
Most likely the flash chip is behind the IT8512 EC (embedded controller). In that case, even current flashrom will not work because you need a flashrom driver for the IT8512. Some of us have access to the docs of that EC, but the EC is highly configurable and the exact flashing routine depends on the firmware running on the EC. If you're unlucky, even probing for the EC won't work because the probe sequence, address and response are completely configurable as well. So if it works, you're very lucky, but the chance is pretty small.
flashrom related discussions are welcome on the flashrom@flashrom.org list, subscription happens here: http://www.flashrom.org/mailman/listinfo/flashrom
Regards, Carl-Daniel
-
Carl-Daniel Hailfinger -
Cirdec AREVIR -
Peter Stuge