COREBOOT and FSP CONFIGURATION for INTEL TIGERLAKE BOARD

[Renuka Pande]

Hi,
I am trying to configure coreboot and fsp for Intel Tigerlake Board.
I am facing the following issues:

While building coreboot, in the menuconfig command, in mainboard section,
if the ON BOARD EC is selected as INTEL EC, when make command is given, it
is giving "Makefile:215" error.
If the ON BOARD EC is selected as Chrome EC, then only the make is
successful. But it is displaying the following warning: "coreboot has been
built without Intel Firmware Descriptor. . . . "
The mainboard vendor and model are selected as Intel and Tigerlake UP3 RVP
respectively.

Can you please help in solving this issue?
It would be of great help if you could explain how to build coreboot and
fsp for Tigerlake Board.
Thanking you in anticipation.

Thanks and Regards,
Renuka

[|H|]

Hi Renuka

If I'm not mistaken this warning refers to a missing firmware descriptor binary. This file will be present in the ROM that was flashed to the chip before you received the board.

If you don't know how to get that file, do the following:
You'll need to use the ifd tool (cd coreboot/util/ifdtool​) to extract it from the factory firmware that's currently on your mainboard. Copy your backup firmware.rom to the ifdtool folder to make it easier, and run ./ifdtool -x firmware.rom​
It will also extract other files too, like the management engine binary and BIOS region.

In the menuconfig interface, go to -> chipset and scroll down to "add Intel descriptor.bin file". Select this and enter the path to the descriptor binary you just extracted.

You'll also see an entry for Management Engine which you'll need to include as well in order to get a usable image. Again, select this entry and provide a path to the Management Engine file.

I recently built for a tigerlake Chromebook and this process is exactly what worked for me.

If you want to know more about what the purpose of the Flash Descriptor, check out this [coreboot doc](https://doc.coreboot.org/util/ifdtool/layout.html). As I understand it, the Descriptor region is configuration data similar to a partition table for your SPI chip.

Hopefully this helps you get to the next stage, and apologies if I went over things you already knew.

-------- Original Message --------
On 22 Feb 2023, 20:41, Renuka Pande < [e-mail]> wrote:
> Hi,
> I am trying to configure coreboot and fsp for Intel Tigerlake Board.
> I am facing the following issues:
>
> While building coreboot, in the menuconfig command, in mainboard section, if the ON BOARD EC is selected as INTEL EC, when make command is given, it is giving "Makefile:215" error.
> If the ON BOARD EC is selected as Chrome EC, then only the make is successful. But it is displaying the following warning: "coreboot has been built without Intel Firmware Descriptor. . . . "
> The mainboard vendor and model are selected as Intel and Tigerlake UP3 RVP respectively.
>
> Can you please help in solving this issue?
> It would be of great help if you could explain how to build coreboot and fsp for Tigerlake Board.
> Thanking you in anticipation.
>
> Thanks and Regards,
> Renuka