Hello!
As I've soldered a Sockel for SPI-Chips on my Mainboard (Gigabyte M57SLI4), I'd like to test the Chip's which have more space on it, and i've here.
I have those chips, and the sockel but not really skills in programming C, i tried to look at the source code from flashrom, but grepping for "MX25L4005" (which already works) gives just two results. One result is in the flashchips.c file, and the second in flash.h, where in flash.h there is an entry for the MX25L8005 chip.
I added in flashchips.c a line for the MX25L8005 chip, and flashrom detects it, but i don't know what the values in those lines are exactly for, but just correcting the first one to 1024 gives the right size output after the chip detction, but verifying after writing to the chip doesn't work. (I think there is some more work to do on the flashrom code, or i just have the wrong values insert in the flashchips.h file.)
It would be really fine, if someone of you could implement that correctly, i can and will test if it works.
Kind regards, Harald Gutmann
On 10.01.2008 01:00, Harald Gutmann wrote:
As I've soldered a Sockel for SPI-Chips on my Mainboard (Gigabyte M57SLI4), I'd like to test the Chip's which have more space on it, and i've here.
I have those chips, and the sockel but not really skills in programming C, i tried to look at the source code from flashrom, but grepping for "MX25L4005" (which already works) gives just two results. One result is in the flashchips.c file, and the second in flash.h, where in flash.h there is an entry for the MX25L8005 chip.
I added in flashchips.c a line for the MX25L8005 chip, and flashrom detects it, but i don't know what the values in those lines are exactly for, but just correcting the first one to 1024 gives the right size output after the chip detction, but verifying after writing to the chip doesn't work. (I think there is some more work to do on the flashrom code, or i just have the wrong values insert in the flashchips.h file.)
Just adding the right values to flashchips.c is not enough. I need "flashrom -V" output both with your patch and without your patch.
It would be really fine, if someone of you could implement that correctly, i can and will test if it works.
I can implement support if I have the output mentioned above. Your problem seems to be caused by the flash translation chip and not the flash chip.
Regards, Carl-Daniel
Am Donnerstag, 10. Januar 2008 01:25:44 schrieb Carl-Daniel Hailfinger:
Just adding the right values to flashchips.c is not enough. I need "flashrom -V" output both with your patch and without your patch.
first here is a diff between my "patched" and the actual plain svn version of flashrom:
diff -ubr flashrom.plain/flashchips.c flashrom.patched/flashchips.c --- flashrom.plain/flashchips.c 2008-01-10 13:29:32.000000000 +0100 +++ flashrom.patched/flashchips.c 2008-01-10 13:32:53.000000000 +0100 @@ -52,6 +52,8 @@ probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, + {"MX25L8005", MX_ID, MX_25L8005, 1024, 256, + probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, {"SST25VF040B", SST_ID, SST_25VF040B, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, {"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
It would be really fine, if someone of you could implement that correctly, i can and will test if it works.
I can implement support if I have the output mentioned above. Your problem seems to be caused by the flash translation chip and not the flash chip.
The output of both flashrom versions is attached.
Regards, Carl-Daniel
Thanks for investigating this issue. Regards, Harald
On 10.01.2008 13:39, Harald Gutmann wrote:
Am Donnerstag, 10. Januar 2008 01:25:44 schrieb Carl-Daniel Hailfinger:
Just adding the right values to flashchips.c is not enough. I need "flashrom -V" output both with your patch and without your patch.
first here is a diff between my "patched" and the actual plain svn version of flashrom:
diff -ubr flashrom.plain/flashchips.c flashrom.patched/flashchips.c --- flashrom.plain/flashchips.c 2008-01-10 13:29:32.000000000 +0100 +++ flashrom.patched/flashchips.c 2008-01-10 13:32:53.000000000 +0100 @@ -52,6 +52,8 @@ probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
{"MX25L8005", MX_ID, MX_25L8005, 1024, 256,probe_spi, generic_spi_chip_erase_c7,generic_spi_chip_write}, {"SST25VF040B", SST_ID, SST_25VF040B, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, {"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
That part of the patch is correct. Can you give me a Signed-off-by: line? I will ack and commit. See http://linuxbios.org/Development_Guidelines#Sign-off_Procedure for details.
It would be really fine, if someone of you could implement that correctly, i can and will test if it works.
I can implement support if I have the output mentioned above. Your problem seems to be caused by the flash translation chip and not the flash chip.
The output of both flashrom versions is attached.
Thanks, I now see that it is indeed a problem with the SPI translation. Can you try to flash some random data to the rom? Verify will fail. Then try to read back the rom and upload both original random data and readback result somewhere (rapidshare etc.) and I'll try to find out what the flash translation chip really supports.
And please tell me how much RAM the machine has (if it is more than 2 GB, I need the amount of Video RAM as well).
Regards, Carl-Daniel
Am Donnerstag, 10. Januar 2008 13:56:05 schrieb Carl-Daniel Hailfinger:
On 10.01.2008 13:39, Harald Gutmann wrote:
Am Donnerstag, 10. Januar 2008 01:25:44 schrieb Carl-Daniel Hailfinger:
Just adding the right values to flashchips.c is not enough. I need "flashrom -V" output both with your patch and without your patch.
first here is a diff between my "patched" and the actual plain svn version of flashrom:
diff -ubr flashrom.plain/flashchips.c flashrom.patched/flashchips.c --- flashrom.plain/flashchips.c 2008-01-10 13:29:32.000000000 +0100 +++ flashrom.patched/flashchips.c 2008-01-10 13:32:53.000000000 +0100 @@ -52,6 +52,8 @@ probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
{"MX25L8005", MX_ID, MX_25L8005, 1024, 256,probe_spi, generic_spi_chip_erase_c7,generic_spi_chip_write}, {"SST25VF040B", SST_ID, SST_25VF040B, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, {"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
That part of the patch is correct. Can you give me a Signed-off-by: line? I will ack and commit. See http://linuxbios.org/Development_Guidelines#Sign-off_Procedure for details.
Signed-off-by: Harald Gutmann harald.gutmann@gmx.net
It would be really fine, if someone of you could implement that correctly, i can and will test if it works.
I can implement support if I have the output mentioned above. Your problem seems to be caused by the flash translation chip and not the flash chip.
The output of both flashrom versions is attached.
Thanks, I now see that it is indeed a problem with the SPI translation. Can you try to flash some random data to the rom? Verify will fail. Then try to read back the rom and upload both original random data and readback result somewhere (rapidshare etc.) and I'll try to find out what the flash translation chip really supports.
http://rapidshare.com/files/82696074/flashrom_files.tar.gz.html
the file random_original.rom is the file i writed to the chip, where this file was created using dd and /dev/urandom. the file random_read.rom is the file which i've read with flashrom after writing the random_original.rom to the chip.
And please tell me how much RAM the machine has (if it is more than 2 GB, I need the amount of Video RAM as well).
My machine has 4Gb (4x1Gb) of RAM and Viedo RAM is 256Mb on an Nvidia Grapic Card.
Regards, Carl-Daniel
Regards, Harald
On 10.01.2008 14:12, Harald Gutmann wrote:
Am Donnerstag, 10. Januar 2008 13:56:05 schrieb Carl-Daniel Hailfinger:
On 10.01.2008 13:39, Harald Gutmann wrote:
Am Donnerstag, 10. Januar 2008 01:25:44 schrieb Carl-Daniel Hailfinger:
Just adding the right values to flashchips.c is not enough. I need "flashrom -V" output both with your patch and without your patch.
first here is a diff between my "patched" and the actual plain svn version of flashrom:
diff -ubr flashrom.plain/flashchips.c flashrom.patched/flashchips.c --- flashrom.plain/flashchips.c 2008-01-10 13:29:32.000000000 +0100 +++ flashrom.patched/flashchips.c 2008-01-10 13:32:53.000000000 +0100 @@ -52,6 +52,8 @@ probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
{"MX25L8005", MX_ID, MX_25L8005, 1024, 256,probe_spi, generic_spi_chip_erase_c7,generic_spi_chip_write}, {"SST25VF040B", SST_ID, SST_25VF040B, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write}, {"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
That part of the patch is correct. Can you give me a Signed-off-by: line? I will ack and commit. See http://linuxbios.org/Development_Guidelines#Sign-off_Procedure for details.
Signed-off-by: Harald Gutmann harald.gutmann@gmx.net
Thanks, r3042.
Thanks, I now see that it is indeed a problem with the SPI translation. Can you try to flash some random data to the rom? Verify will fail. Then try to read back the rom and upload both original random data and readback result somewhere (rapidshare etc.) and I'll try to find out what the flash translation chip really supports.
http://rapidshare.com/files/82696074/flashrom_files.tar.gz.html
the file random_original.rom is the file i writed to the chip, where this file was created using dd and /dev/urandom. the file random_read.rom is the file which i've read with flashrom after writing the random_original.rom to the chip.
OK, I now know the exact problem. The IT8716F flash translation function does not work with chips bigger than 512 KByte unless you use a special software enable routine.
And please tell me how much RAM the machine has (if it is more than 2 GB, I need the amount of Video RAM as well).
My machine has 4Gb (4x1Gb) of RAM and Viedo RAM is 256Mb on an Nvidia Grapic Card.
Thanks, that is enough information.
Please update to current svn (it has your patch) and apply the patch below. If random flashing with the patch works, can you give me an Ack? If it doesn't work, can you upload the new random_read.com?
Forcibly enable LPC-to-SPI translation on IT8716F for the 0xFFEE0000 - 0xFFEFFFFF range.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-harald/spi.c =================================================================== --- flashrom-harald/spi.c (Revision 3042) +++ flashrom-harald/spi.c (Arbeitskopie) @@ -137,6 +137,8 @@ printf("LPC write to serial flash %sabled\n", (tmp & 1 << 4) ? "en" : "dis"); printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); + tmp |= 1 << 2; + regwrite(port, 0x24, tmp); /* LDN 0x7, reg 0x64/0x65 */ regwrite(port, 0x07, 0x7); flashport = regval(port, 0x64) << 8;
Am Donnerstag, 10. Januar 2008 14:38:18 schrieb Carl-Daniel Hailfinger:
OK, I now know the exact problem. The IT8716F flash translation function does not work with chips bigger than 512 KByte unless you use a special software enable routine.
And please tell me how much RAM the machine has (if it is more than 2 GB, I need the amount of Video RAM as well).
My machine has 4Gb (4x1Gb) of RAM and Viedo RAM is 256Mb on an Nvidia Grapic Card.
Thanks, that is enough information.
Please update to current svn (it has your patch) and apply the patch below. If random flashing with the patch works, can you give me an Ack? If it doesn't work, can you upload the new random_read.com?
It doesn't work with that patch. Here are the files: http://rapidshare.com/files/82704058/flashrom_files_patched.tar.gz.html
A diff file to the original flashrom is also included.
Regards, Harald
On 10.01.2008 14:53, Harald Gutmann wrote:
Am Donnerstag, 10. Januar 2008 14:38:18 schrieb Carl-Daniel Hailfinger:
OK, I now know the exact problem. The IT8716F flash translation function does not work with chips bigger than 512 KByte unless you use a special software enable routine. Please update to current svn (it has your patch) and apply the patch below. If random flashing with the patch works, can you give me an Ack? If it doesn't work, can you upload the new random_read.com?
It doesn't work with that patch. Here are the files: http://rapidshare.com/files/82704058/flashrom_files_patched.tar.gz.html
Thanks! It seems we can't support any flash chip bigger than 512 kByte on a board using IT8716F SPI translation without a LOT of effort. If you don't care about speed, it is probably possible to read and write a flash chip with any size, but you can't use anthing outside the bottom 512 kByte area before RAM shadows ROM.
I have sent a mail to ITE to find out if we can use the IT8716F for bigger flash chips. If I get an answer, I will tell you.
Regards, Carl-Daniel
On Thu, Jan 10, 2008 at 03:16:16PM +0100, Carl-Daniel Hailfinger wrote:
It seems we can't support any flash chip bigger than 512 kByte on a board using IT8716F SPI translation without a LOT of effort.
Please explain further?
//Peter
On 11.01.2008 02:42, Peter Stuge wrote:
On Thu, Jan 10, 2008 at 03:16:16PM +0100, Carl-Daniel Hailfinger wrote:
It seems we can't support any flash chip bigger than 512 kByte on a board using IT8716F SPI translation without a LOT of effort.
Please explain further?
The IT8716F datasheet suggests that LPC-to-SPI translation is limited to one 512 kByte area and one disjoint 128 kByte area. It is not specified to which addresses of the flash chip the 128 kByte area is decoded. All accesses outside this area will have to be read in 2-byte chunks by issuing a read command to the SPI controller. Memory mapping such accesses seems to be impossible according to the datasheet. Writing is even worse: You can only program chips which support the byte-program instruction because sending more than 5 bytes to the SPI chip (1 opcode, 3 address, 1 data) is not possible outside the natively decoded area. Every routine accessing ROM has to be rewritten to use "retrieve these bytes" helper routines. String comparisons etc. will not work unless you hand-code them. LAR walking will be real fun. The only way to not get a headache would be to access only the given 512 kByte area before RAM is enabled, then directly after enabling RAM copy ROM contents with the read-2-bytes method to RAM and work from RAM. Suicidal complexity.
I still hope ITE engineers will tell me about a way to avoid all this horrible stuff. The datasheet surely does not leave much hope.
Regards, Carl-Daniel
Hello!
As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)" there was added support for writing/reading lager SPI chips than 512kB i had a look on the current flashrom code, in svn revision 3067.
I recogniced that the MX25L8005 calls the same function than the SST25VF016B in the flashchips.c file. The function called there are generic_spi_chip_erase_c7, generic_spi_chip_write and generic_spi_chip_read. The write function is in spi.c, and checks if the total_size is bigger than 512kB, as result of that check the it8716f_over512k_spi_chip_write should be called to write the chip. The SST25VF016B can be programmed/verified/erased but not the MX25L8005. Writing random data to the chip results in a failed verify. Erasing the chip seems to work. Here is the file which i wrote to the chip, and the file which i get as result when trying to read the chip. (looks quite strange in hexdump, there are many FF lines in the read file.) http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html
I also wondered if the mx25l4005.c file is needed any more, because the functions in there aren't called anywhere.
kind regards, Harald
On 21.01.2008 17:15, Harald Gutmann wrote:
Hello!
As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)" there was added support for writing/reading lager SPI chips than 512kB i had a look on the current flashrom code, in svn revision 3067.
I recogniced that the MX25L8005 calls the same function than the SST25VF016B in the flashchips.c file. The function called there are generic_spi_chip_erase_c7, generic_spi_chip_write and generic_spi_chip_read. The write function is in spi.c, and checks if the total_size is bigger than 512kB, as result of that check the it8716f_over512k_spi_chip_write should be called to write the chip. The SST25VF016B can be programmed/verified/erased but not the MX25L8005.
Probably either the chip does not support BYTE-PROGRAM or we have a timing issue. I checked the datasheet and the MX25L8005 indeed has a PAGE-PROGRAM mode, but it can be abused for BYTE-PROGRAM.
Writing random data to the chip results in a failed verify. Erasing the chip seems to work. Here is the file which i wrote to the chip, and the file which i get as result when trying to read the chip. (looks quite strange in hexdump, there are many FF lines in the read file.) http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html
This is a timing issue with ~95% probability. Simply look at the readback result. Will send a patch.
I also wondered if the mx25l4005.c file is needed any more, because the functions in there aren't called anywhere.
Hm. Are you sure this file exists in the official tree? I can't find it.
Regards, Carl-Daniel
Am Dienstag, 22. Januar 2008 00:48:30 schrieben Sie:
On 21.01.2008 17:15, Harald Gutmann wrote:
Hello!
As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)" there was added support for writing/reading lager SPI chips than 512kB i had a look on the current flashrom code, in svn revision 3067.
I recogniced that the MX25L8005 calls the same function than the SST25VF016B in the flashchips.c file. The function called there are generic_spi_chip_erase_c7, generic_spi_chip_write and generic_spi_chip_read. The write function is in spi.c, and checks if the total_size is bigger than 512kB, as result of that check the it8716f_over512k_spi_chip_write should be called to write the chip. The SST25VF016B can be programmed/verified/erased but not the MX25L8005.
Probably either the chip does not support BYTE-PROGRAM or we have a timing issue. I checked the datasheet and the MX25L8005 indeed has a PAGE-PROGRAM mode, but it can be abused for BYTE-PROGRAM.
Writing random data to the chip results in a failed verify. Erasing the chip seems to work. Here is the file which i wrote to the chip, and the file which i get as result when trying to read the chip. (looks quite strange in hexdump, there are many FF lines in the read file.) http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html
This is a timing issue with ~95% probability. Simply look at the readback result. Will send a patch.
I got the patch, and tested it. It seems to work like ron said! More in the SST thread.
I also wondered if the mx25l4005.c file is needed any more, because the functions in there aren't called anywhere.
Hm. Are you sure this file exists in the official tree? I can't find it.
Oh, seems that you're right, i trusted in svn diff/revert, and svn diff didn't mention any differenceses between my version and the actual repository, but it's like you said, that this file isn't existing in the official tree.
Regards, Carl-Daniel
regards, Harald
Here is just a little and simple patch to get the MX25L3205D working. I've tested and verified the chip myself, and it seems to work everything like supposted, since Carl has patched flashrom to use the read funktion on verifying.
"benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L3205 found at physical address 0xffc00000. Flash part is MX25L3205 (4096 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. benchvice flashrom # ls -lh test.4mb -rw-r--r-- 1 root root 4,0M 22. Jan 16:27 test.4mb benchvice flashrom # ls -l test.4mb -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb benchvice flashrom #"
Signed-off-by: Harald Gutmann harald.gutmann@gmx.net
Index: flashchips.c =================================================================== --- flashchips.c (Revision 3070) +++ flashchips.c (Arbeitskopie) @@ -54,6 +54,8 @@ probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write, generic_spi_chip_read}, {"MX25L8005", MX_ID, MX_25L8005, 1024, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write, generic_spi_chip_read}, + {"MX25L3205", MX_ID, MX_25L3205, 4096, 256, + probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write, generic_spi_chip_read}, {"SST25VF040B", SST_ID, SST_25VF040B, 512, 256, probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write, generic_spi_chip_read}, {"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
On 22.01.2008 16:34, Harald Gutmann wrote:
Here is just a little and simple patch to get the MX25L3205D working. I've tested and verified the chip myself, and it seems to work everything like supposted, since Carl has patched flashrom to use the read funktion on verifying.
"benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L3205 found at physical address 0xffc00000. Flash part is MX25L3205 (4096 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. benchvice flashrom # ls -lh test.4mb -rw-r--r-- 1 root root 4,0M 22. Jan 16:27 test.4mb benchvice flashrom # ls -l test.4mb -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb benchvice flashrom #"
Signed-off-by: Harald Gutmann harald.gutmann@gmx.net
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Thanks, r3072.
Regards, Carl-Daniel
-
Carl-Daniel Hailfinger -
Harald Gutmann -
Peter Stuge