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Intel 82845G/GL
by Brian Thomason 19 Dec '03

19 Dec '03

I scanned the entire mailing and website for LinuxBIOS and didn't see a single reference to the Intel 82845G/GL. Is this configuration supported? If not, would it be "easy" to add support for it? I'm very new to LinuxBIOS (just discovered the website a month or so ago and still don't fully grok it) but have two machines with this chipset I'd like to get setup as sample boxes to show my boss the increase in boot time. (From what I hear, it speeds up boot time CONSIDERABLY) Thanks in advance for your time, Brian Thomason Lindows.com Developer Relations

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Re: EPIA-M serial port 1/2 baud rate insanity
by Dave Ashley 18 Dec '03

18 Dec '03

Here is what I did to integrate this into linuxbios. I created the following file src/mainboard/via/epia-m/smbusenable.inc /* Useful macros PCIBUS, and SMBUS functions for getting DRAM going. */ /* courtesy Eric Biederman of linuxnetworx.com */ #define CS_WRITE_BYTE(addr, byte) \ movl $addr, %eax ; \ movl $byte, %edx ; \ PCI_WRITE_CONFIG_BYTE #define CS_WRITE_WORD(addr, word) \ movl $addr, %eax ; \ movl $word, %ecx ; \ PCI_WRITE_CONFIG_WORD #define CS_WRITE_LONG(addr, dword) \ movl $addr, %eax ; \ movl $dword, %ecx ; \ PCI_WRITE_CONFIG_DWORD #define DEVFN(device, function) (((device) << 3) + (function)) #ifndef CONFIG_ADDR #define CONFIG_ADDR(bus,devfn,where) (((bus) << 16) | ((devfn) << 8) | (where)) #endif /* generic SMB routines that work for many systems. The only one that might * not work is the enable_smbus. * you have to define PM_FUNCTION for this to work. */#define SMBUS_IO_BASE 0xf00 #define SMBHSTSTAT 0 #define SMBHSTCTL 2 #define SMBHSTCMD 3 #define SMBHSTADD 4 #define SMBHSTDAT0 5 #define SMBHSTDAT1 6 #define SMBBLKDAT 7 /* (DA) Lines added to get this to compile */ #define PM_DEVFN CONFIG_ADDR(0,0x11*8,0) #define DRAM_CONFIG_PORT 0x5a #define SMBUS_MEM_DEVICE_0 0x50 #define LAST_SMBUS_MEM_DEVICE SMBUS_MEM_DEVICE_0 #define REGISTERED_DRAM_REGISTER $0x69 #define REGISTERED_DRAM $0x2d #define NONREGISTERED_DRAM $0 /* put the SMBUS at port 0xf00 + enable*/ CS_WRITE_WORD(PM_DEVFN+ 0xd0, SMBUS_IO_BASE|1) /* iobase addr */ CS_WRITE_BYTE(PM_DEVFN + 0xd2, (0x4 << 1) | 1) /* smbus enable */ CS_WRITE_WORD(PM_DEVFN + 0x4, 1) /* iospace enable */ /* The VT1211 serial port needs 48 mhz clock, on power up it is getting only 24 mhz, there is some mysterious device on the smbus that can fix this...this code below does it. */ #define MYOUTB(val, port) movb val, %al; movw port, %dx ; outb %al, %dx #define I2C_TRANS_CMD 0x40 #define CLOCK_SLAVE_ADDRESS 0x69 MYOUTB( $0xff, $(SMBUS_IO_BASE+SMBHSTSTAT)) MYOUTB( $0x7f, $(SMBUS_IO_BASE+SMBHSTDAT0)) MYOUTB( $0x83, $(SMBUS_IO_BASE+SMBHSTCMD)) MYOUTB( $(CLOCK_SLAVE_ADDRESS<<1), $(SMBUS_IO_BASE+SMBHSTADD)) MYOUTB( $(8 | I2C_TRANS_CMD), $(SMBUS_IO_BASE+SMBHSTCTL)) movw $(SMBUS_IO_BASE+SMBHSTSTAT), %dx smbwait1: inb %dx, %al and $1, %al jnz smbwait1 ----- Now in src/mainboard/via/epia-m/Config we need to include the above file, so it ends up looking like this: mainboardinit mainboard/via/epia-m/smbusenable.inc mainboardinit superio/via/vt1211/setup_serial.inc mainboardinit pc80/serial.inc -Dave

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Re: sc1200?
by Devi Priya 18 Dec '03

18 Dec '03

Thanks for ur suggestion. My flash is 4 MB. My processor can address up to 4 GB physical address space. That means after power-on, in shematic should I map the flash memory like 0xFFC00000-0xFFFFFFFF and 0x00000000-0x003FFFFF? 0r in upper address, is it enough to map the 256KB region to the Flash ie 0xFFFC0000-0xFFFFFFFF? and the lower address to 0x00000000-0x003FFFFF >From: ron minnich <rminnich(a)lanl.gov> >To: Devi Priya <ijpriya(a)hotmail.com> >CC: linuxbios(a)clustermatic.org >Subject: Re: sc1200? >Date: Wed, 17 Dec 2003 22:07:00 -0700 (MST) > >at power-on, on all chipsets for PCs I have used, FLASH is mapped at BOTH >0xffffff0 and 0xffff0. > >ron > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ Dont miss out on jobs that are not advertised. http://go.msnserver.com/IN/38902.asp Post your CV on naukri.com today.

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sc1200?
by Devi Priya 18 Dec '03

18 Dec '03

Hi, After power-on, the x86 processor is placed in real mode. That means the CPU looks for the instruction at the address 0xffff0. Is it correct? In SC1200 datasheet, it is given that, "Approximately 150 to 250 external clock cycles after RESET is deasserted, the processor begins executing instructions at the top of physical memory (address location FFFFFFF0h). The actual number of clock cycles depends on the clock scaling in use. Also, before execution begins, an additional 220 clock cycles are needed when self-test is requested. Typically, an intersegment jump is placed at FFFFFFF0h. This instruction will force the processor to begin execution in the lowest 1 MB of address space." In real mode, the CPU can address only 1 MB. Then how this address could be addressed by the CPU? To which address does my Flash memory gets mapped to at power-on? _________________________________________________________________ Dont miss out on jobs that are not advertised. http://go.msnserver.com/IN/38902.asp Post your CV on naukri.com today.

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EPIA-M serial port 1/2 baud rate insanity
by Dave Ashley 17 Dec '03

17 Dec '03

I am at my wits end regarding how to get the serial ports on the epia-m to run at full 115,200 baud rate. Here is a summary of what is known: 1) The serial ports are driven by the VT1211 superio chip. 2) Under AWARD bios the serial ports are capable of 115,200 operation. 3) Under linuxbios they can only run at 57,600 max. 4) Booting up with AWARD then soft reset (or hit reset button on motherboard) into linuxbios still maintains 115,200 baud 5) Hard reset (power off then on) into linuxbios reduces maximum baud rate to 57,600. 6) All registers of the VT1211 are identical after linuxbios bootup, whether from award -> softreset -> linuxbios bootup or hardreset -> linuxbios bootup. I am speaking of all registers of all logical devices of the VT1211, including all the global registers. I wrote a program to dump everything then diff'd the two outputs, they're identical. I have repeatedly tried asking VIA for help, in various different ways. The VT1211 datasheet and the VT1211 bios porting guide have not resolved the issue. VIA has proven incapable of addressing the problem. I have one last idea. There is an emulator to test VGA bios's, I was messing with it a few months back. Is there an emulator for the full BIOS? I'd like to be able to watch all io port accesses of the award bios, maybe I can trap when it goes to write to the 0x2e + 0x2f io ports to configure the vt1211 serial ports, then look for something near there that might be related. The idea would be to figure out what magical thing the AWARD bios is doing to initialize the serial port. Failing that is there any way to disassemble a BIOS image? Any ideas welcome. BTW if anyone has figured out how to fix the problem, please just f*cking out with it, I think I've been very generous in the past with enhancements and turnabout is fair play. Thanks-- Dave

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Re: EPIA-M serial port 1/2 baud rate insanity
by Dave Ashley 17 Dec '03

17 Dec '03

>I don't know what the problem is, I don't have an EPIA-M yet. >... >Are your sure the clock source for the superio or uart is the same for >linuxbios and award? >The "emulator for VGA bios" will actually run anything... If sending you an epia-m would mean you'd begin looking at it I'll get you one. Let me know. I'm not sure of the clock source, VIA hasn't provided a schematic for the board. The datasheet indicates 2 clock sources, one is for the LPC interface and the other is for the main clock. LPC is the 33 mhz pci clock. The other clock is 48 mhz. I had a scope on the chip and as near as I can tell the 48 mhz clock was in fact 48 mhz. I didn't look at the 33 mhz clock at all. -Dave

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EPIA-M + second serial port enabler
by Dave Ashley 15 Dec '03

15 Dec '03

In a previous email message http://www.clustermatic.org/pipermail/linuxbios/2003-November/005891.html I wrote In V1 the file to modify is src/superio/via/vt1211/setup_serial.inc That code sets up ttyS0 which is the VT1211's logical device 2. You want to add some similiar code for logical device 3 to get ttyS1 working. Assuming you want it to be at 2f8 you'd merge in these lines: OUTPNPADDR($7) OUTPNPDATA($3) /* set the enable in reg. 0x30 */ OUTPNPADDR($0x30) OUTPNPDATA($0x1) /* Serial Port 2 Base Address (BEh) */ OUTPNPADDR($0x60) OUTPNPDATA($0xbe) /* Serial Port 2 IRQ (03h) */ OUTPNPADDR($0x70) OUTPNPDATA($0x3) /* Serial Port 2 Control */ OUTPNPADDR($0xf0) OUTPNPDATA($0x2) ...then do the turn off pnp /* turn off PnP */ OUTPNPADDR($0xaa) ...then duplicate the serial setup except the address goes from 3f8 -> 2f8 There is a piece missing. I had to enable the second serial port on the VT1211 and although linux recognized it, there was no serial activity on the lines. These lines need to be added during the vt1211 configuration: /* Allow serial port 2 (ldn 3) pins to come out */ OUTPNPADDR($0x27) OUTPNPDATA($00) This has to be before the $0xaa write to turn off configuration mode. The default value on powerup for this register on the vt1211 is 0xff. There are multi purpose pins on the chip and this connects them to the second serial port. -Dave

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Re: VIA EPIA mini-ITX mainboards
by Hendricks David W. 15 Dec '03

15 Dec '03

Yeah, Slasdot obviously is not intended to be used as a message forum for lingering discussion. Ron has a working image that was used for what I gather is a similar mainboard. Output from lspci would also be helpful so that we can make sure the hardware on your board is the same as the hardware on ours (Whatever came in the ITuner Minibox M-100's). P.S. I cc'd this e-mail to the mailing list ( http://www.clustermatic.org/pipermail/linuxbios/2003-December/ ) since the EPIA is a rather popular platform and others might be able to offer help in this matter. Etherboot can boot a kernel over a LAN, and IDE disk, floppy, and probably some others too. Are you using an ethernet bridge like a Linksys WET11 or an add-in PCI or USB wireless device? On Thu, 11 Dec 2003, Sonam Chauhan wrote: > [ Re: http://bsd.slashdot.org/comments.pl?sid=87041&cid=7567224 ] > > Hi - Thanks for offering to help with your experience flashing VIA EPIA > mini-ITX mainboards. Sorry, I didn't see your reply until recently. :) > > You wrote: > > If you're using the 500MHz/800MHz normal SDRAM version, I'll send > > you a ROM I used with the old freebios tree and an Etherboot > > payload. > That'd be great! Yes, I have the 533 MHz fanless EPIA ESP 5000 board > with PC 133 SDRAM. > > By etherboot, do you mean that the board can boot remotely from LAN, > using the onboard ethernet port? If so, that's excellent! Out of > curiosity, do you see any problem with the Mini-ITX board etherbooting > via a 802.11 wireless access point it is connected to with it's ethernet > interface? > > With best regards, > Sonam Chauhan >

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Re: serial programming
by Parit Wattanasin 14 Dec '03

14 Dec '03

--- linuxbios-request(a)clustermatic.org wrote: > Send Linuxbios mailing list submissions to > linuxbios(a)clustermatic.org > > To subscribe or unsubscribe via the World Wide Web, > visit > > http://www.clustermatic.org/mailman/listinfo/linuxbios > or, via email, send a message with subject or body > 'help' to > linuxbios-request(a)clustermatic.org > > You can reach the person managing the list at > linuxbios-admin(a)clustermatic.org > > When replying, please edit your Subject line so it > is more specific > than "Re: Contents of Linuxbios digest..." > > > Today's Topics: > > 1. serial programming (Parit Wattanasin) > 2. Re: serial programming (Peter Stuge) > 3. Re: serial programming (ron minnich) > 4. Re: serial programming (Peter Stuge) > > --__--__-- > > Message: 1 > Date: Sat, 13 Dec 2003 20:39:44 -0800 (PST) > From: Parit Wattanasin <parit_top(a)yahoo.com> > Subject: serial programming > To: linuxbios(a)clustermatic.org > > hi, I'm new for LinuxBIOS. I have problem about my > mainboard(VIA-EPIA) Now I'm use LinuxBIOS but I > want > to customized it to chang payload from etherboot > with > my program about serial port(now this mainboard use > serial console) how can I'change it(my program use > assembly). Thank you for answer > > __________________________________ > Do you Yahoo!? > New Yahoo! Photos - easier uploading and sharing. > http://photos.yahoo.com/ > > --__--__-- > > Message: 2 > Date: Sun, 14 Dec 2003 06:14:45 +0100 > From: Peter Stuge <stuge-linuxbios(a)cdy.org> > To: linuxbios(a)clustermatic.org > Subject: Re: serial programming > > On Sat, Dec 13, 2003 at 08:39:44PM -0800, Parit > Wattanasin wrote: > > hi, I'm new for LinuxBIOS. I have problem about my > > mainboard(VIA-EPIA) Now I'm use LinuxBIOS but I > want > > to customized it to chang payload from etherboot > with > > my program about serial port(now this mainboard > use > > serial console) how can I'change it(my program use > > assembly). Thank you for answer > > The payload can be exchanged from Etherboot to > another self-contained ELF > file simply by recompiling LinuxBIOS. > > I'm not quite sure about the status of the EPIA port > in the version 2 CVS > tree, but it's there and there's been work put into > it so it should probably > compile and work just fine. > > The best bet is to check the mailing list archives > for information, and then > grab the CVS code, or a snapshot, and make your own > build. > > While making your own build you can also take out > all serial port activity > not needed for your application, of course. > > > //Peter > > --__--__-- > > Message: 3 > Date: Sat, 13 Dec 2003 22:52:20 -0700 (MST) > From: ron minnich <rminnich(a)lanl.gov> > To: Peter Stuge <stuge-linuxbios(a)cdy.org> > cc: linuxbios(a)clustermatic.org > Subject: Re: serial programming > > On Sun, 14 Dec 2003, Peter Stuge wrote: > > > I'm not quite sure about the status of the EPIA > port in the version 2 CVS > > tree, but it's there and there's been work put > into it so it should probably > > compile and work just fine. > > EPIA is fine in V2, not perfect but FAR better than > EPIA in v1. > > We want to clean up EPIA completely, then fix up > EPIA-M, but there have > been some distractions (SC '03). > > ron > > > --__--__-- > > Message: 4 > Date: Sun, 14 Dec 2003 08:37:08 +0100 > From: Peter Stuge <stuge-linuxbios(a)cdy.org> > To: linuxbios(a)clustermatic.org > Subject: Re: serial programming > > On Sat, Dec 13, 2003 at 10:52:20PM -0700, ron > minnich wrote: > > On Sun, 14 Dec 2003, Peter Stuge wrote: > > > > > I'm not quite sure about the status of the EPIA > port in the version 2 CVS > > > tree, but it's there and there's been work put > into it so it should probably > > > compile and work just fine. > > > > EPIA is fine in V2, not perfect but FAR better > than EPIA in v1. > > > > We want to clean up EPIA completely, then fix up > EPIA-M, but there have > > been some distractions (SC '03). > > Ah, yes, that's right. > > I can't wait until I actually have the time to sit > down and do something > with LinuxBIOS, last time was over two years ago, > there's been an amazing > evolution of the code. I can easily imagine running > LinuxBIOS 3 or 4 on > _MANY_ systems in another year or two. It seems > vendors (like Tyan) are > picking up too, which is great. Just don't take over > all of their competent > people over at LANL, at least not until there's > support for all of their > boards in the tree.. >:) > > Just a short note to celebrate your success. :) > > > //Peter > > > --__--__-- > > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > End of Linuxbios Digest I'm assemble my serial program to elf-format and exchange for etherboot.It has error =LinuxBIOS-1.0.0 Wed Dec 3 11:26:55 ICT 2003 starting.. =Enabled first bank of RAM: 0x08000000 bytes =Copying LinuxBIOS to ram. =Jumping to LinuxBIOS. =POST: 0x39 =LinuxBIOS-1.0.0 Wed Dec 3 11:26:55 ICT 2003 booting... =POST: 0x40 =... =... =... =Copying IRQ routing tables to 0xf0000...done. =Verifing priq routing tables copy at 0xf0000...succeed =POST: 0x96 =Wrote linuxbios table at: 00000500 - 000006b0 =checksum 8255 = =Welcome to elfboot, the open sourced starter. =January 2002, Eric Biederman. =Version 1.2 = =POST: 0xf8 37:init_bytes() - zkernel_start:0xfff00000 =zkernel_mask:0x0000ffff =Found ELF candiate at offset 0 =New segment addr 0x8048000 size 0xa6 offset 0x0 =filesize 0xa6 =(cleaned up) New segment addr 0x8048000 size 0xa6 =offset 0x0 filesize 0xa6 =Cannot Load ELF Image =POST: 0xff= __________________________________ Do you Yahoo!? New Yahoo! Photos - easier uploading and sharing. http://photos.yahoo.com/

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serial programming
by Parit Wattanasin 14 Dec '03

14 Dec '03

hi, I'm new for LinuxBIOS. I have problem about my mainboard(VIA-EPIA) Now I'm use LinuxBIOS but I want to customized it to chang payload from etherboot with my program about serial port(now this mainboard use serial console) how can I'change it(my program use assembly). Thank you for answer __________________________________ Do you Yahoo!? New Yahoo! Photos - easier uploading and sharing. http://photos.yahoo.com/

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