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39710 discussions

arima hdama linuxbios
by Donald Zoch 30 Nov '03

30 Nov '03

I've been trying to get Linuxbios working on Arima HDAMA, but am not getting any output to the screen. I'm using the latest CVS code, and have tried various methods of flashing the bios. My SST49LF040 on the motherboard is 512k . By default the linuxbios.rom is 256k. I've tried flashing that to the device and it won't boot. I've also tried catting that together twice to get a 512k rom and flashing that to the chip....doesn't boot...no output to the screen. I've tried building a 512k linuxbios.rom and flashing that...doesn't work either. I've tried using the Linux mtd drivers to do the flashing. Doing a diff of /dev/mtd0 and linuxbios.rom after the flash seems to indicate that the flash was successful. Rebooting the system fails though. I've also tried the dos program uniflash program with the same results. What might I be doing wrong? Does anyone have a working linuxbios.rom that they could send me? Or some details on how to get it to work? Any help would be greatly appreciated. Thanks, Donald ---- Donald Zoch 5900 E. Ben White Blvd. MS 625 Advanced Micro Devices Austin, Tx 78741 MPD Unix Systems Administrator Phone: (512) 602-7945 donald.zoch(a)amd.com Pager: (512) 604-5401

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Linuxbios with Diskonchip?
by Devi Priya 29 Nov '03

29 Nov '03

Hi, I shall have my BIOS program, Linux kernel and filesystem in the same Diskonchip. I want to use linuxbios (for sc1200). What is the physical memory mapping that should be done? SDRAM mapped to lower order address and Diskonchip to the higher order address. Is it correct? _________________________________________________________________ Enjoy shopping online? Get this e credit card. http://server1.msn.co.in/features/amex/ It cuts cost & adds value!

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Re: Linuxbios with Diskonchip?
by Devi Priya 29 Nov '03

29 Nov '03

Hi, I am using Diskonchip millennium with boot capability. I just want to know if diskonchip is mapped to the high order physical address (at reset) and is any remapping is done later? >From: "gizara" <gizara(a)cox.net> >To: "Devi Priya" <ijpriya(a)hotmail.com>, <linuxbios(a)clustermatic.org> >Subject: Re: Linuxbios with Diskonchip? >Date: Thu, 27 Nov 2003 13:54:13 -0800 > > >If I remember correctly, Disk-on-Chip comprises NAND flash technology which >inherently cannot execute in place, strictly sequential (data) accesses... >So you would still need some sort of rudimentary boot flash(NOR) or other >ROM to execute code to first load the BIOS, then the kernal, into shadow, >then main (DRAM) memory locations, respectively. > >In a system I'm architecting we're still going to use a 256Kx8 flash for >LinuxBIOS, from there use JFFS2 and associated utilities to get the kernal >and various applications and data from a bare NAND on board. > >This link and its links go into much more detail than I can in this email >about issues you may face: > >http://www.linux-mtd.infradead.org/tech/nand.html > >Good Luck! > > >----- Original Message ----- >From: "Devi Priya" <ijpriya(a)hotmail.com> >To: <linuxbios(a)clustermatic.org> >Sent: Wednesday, November 26, 2003 10:47 PM >Subject: Linuxbios with Diskonchip? > > > > Hi, > > > > I shall have my BIOS program, Linux kernel and filesystem in the same > > Diskonchip. I want to use linuxbios (for sc1200). What is the physical > > memory mapping that should be done? SDRAM mapped to lower order address >and > > Diskonchip to the higher order address. Is it correct? > > > > _________________________________________________________________ > > Enjoy shopping online? Get this e credit card. > > http://server1.msn.co.in/features/amex/ It cuts cost & adds value! > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios(a)clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ Find your first love. Rekindle past joys! http://www.batchmates.com/msn.asp Get in touch with batchmates.

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intel dual netwokcard problem on epia-m
by Niki Waibel 29 Nov '03

29 Nov '03

if use the dual nic with the award bios on the epia-m i get: === Intel(R) PRO/100 Network Driver - version 2.3.30-k1 Copyright (c) 2003 Intel Corporation e100: eth0: Intel(R) PRO/100 Network Connection Hardware receive checksums enabled cpu cycle saver enabled e100: eth1: Intel(R) PRO/100 Network Connection Hardware receive checksums enabled cpu cycle saver enabled === but if i use linuxbios: === Intel(R) PRO/100 Network Driver - version 2.3.30-k1 Copyright (c) 2003 Intel Corporation PCI: No IRQ known for interrupt pin A of device 0000:02:04.0. Please try using pci=biosirq. e100: eth0: Intel(R) PRO/100 Network Connection Hardware receive checksums enabled cpu cycle saver enabled PCI: No IRQ known for interrupt pin A of device 0000:02:05.0. Please try using pci=biosirq. e100: eth1: Intel(R) PRO/100 Network Connection Hardware receive checksums enabled cpu cycle saver enabled === and i cannot bring the interface up. (i've not tried yet with pci=biosirq...) everything is fine for a standard intel nic. any idea?

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sc1200 with linuxbios possiblility?
by Deya 29 Nov '03

29 Nov '03

Hi, I am a newbie to this list. I like to use linuxbios for my project. I have sc1200 chip. I would have the BIOS program, linux kernel and file system in the same Flash memory (32 Mbit). Is it possible to use linuxbios to boot the linux OS from Flash to sdram though BIOS program, linux kernel and file system all existe in the same flash memory? I dont have a seperate Bios chip. Any suggestions on this would help me to proceed further. Yahoo! India Mobile: Ringtones, Wallpapers, Picture Messages and more.Download now.

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epia-m results of getpir
by Dave Ashley 29 Nov '03

29 Nov '03

>run getpir under the standard bios and see what you get. I just happen to have that right here: /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ #include <arch/pirq_routing.h> const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*5, /* there can be total 5 devices on the bus */ 0, /* Where the interrupt router lies (bus) */ 0, /* Where the interrupt router lies (dev) */ 0x1c20, /* IRQs devoted exclusively to PCI usage */ 0, /* Vendor */ 0, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x58, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { {0,0xa0, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x1, 0}, {0,0x98, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x2, 0}, {0,0x50, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}}, 0x3, 0}, {0,0x68, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0}, {0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0, 0}, } };

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Re: automatic power on possible?
by Dave Ashley 29 Nov '03

29 Nov '03

>Does anyone know what the BIOS is doing what linuxbios does not? The southbridges of the via epia + epia-m have a feature that a specific bit in the cmos ram will cause the motherboard to be always on. Even when off it uses the ATX standby power to power a little portion of the southbridge chip. For our purposes this was insufficient, we need the motherboard to be *ON!!!* even in the event of cmos content corruption, failure of cmos battery. So we had to devise a hardware based solution. I think your thing is something else. The power on at a certain time works by the machine not really being off, it is in a soft off state. So the range of power off to full on would be 1)OFF, power supply is completely unplugged 2)Off, nothing functioning but the little bit of standby circuitry 3)Soft off, perhaps cpu is halted, as many things are shut down as possible 4)Fully on Linuxbios has no presence except at state 2--anything else is beyond its scope. Conceivably linuxbios could hit the bit to keep the power on all the time. Note I am just giving my opinion, which is not official in any way. -Dave

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Re: Linuxbios with Diskonchip?
by Devi Priya 28 Nov '03

28 Nov '03

Hi, Thanks for ur suggestion. I want to know to which CPU address does the DOC Millennium is mapped? >From: Niki Waibel <niki.waibel(a)newlogic.com> >Reply-To: Niki Waibel <niki.waibel(a)newlogic.com> >To: Devi Priya <ijpriya(a)hotmail.com> >CC: linuxbios(a)clustermatic.org, gizara <gizara(a)cox.net> >Subject: Re: Linuxbios with Diskonchip? >Date: Fri, 28 Nov 2003 09:18:31 +0100 (MET) > >the doc millennium "maps" the first 2 pages of the NAND flash into its high >and low address space. >it _can_ be used to boot/init memory/copy nand pages to ram/jmp to ram. >but -- you have to do all that within 512 bytes of code. > >mem layout of the doc millennium (2001) is: >address >0x0000 512bytes boot code (first 2 pages copied during power on via a reset >mechanism) > 512bytes boot code (mirror) > 512bytes boot code (mirror) > 512bytes boot code (mirror) >0x0800 512bytes flash area window > 512bytes flash area window (mirror) > 512bytes flash area window (mirror) > 512bytes flash area window (mirror) >0x1000 512bytes control registers -- not all 512bytes used > 512bytes control registers -- not all 512bytes used (mirror) > 512bytes control registers -- not all 512bytes used (mirror) > 512bytes control registers -- not all 512bytes used (mirror) >0x1800 512bytes boot code (first 2 pages copied during power on via a reset >mechanism) > 512bytes boot code (mirror) > 512bytes boot code (mirror) > 512bytes boot code (mirror) > >i'd like to get this working on a via epia-m motherboard once. >replacing the existing bios. > >niki > >On 27-Nov-2003 gizara wrote: > > > > If I remember correctly, Disk-on-Chip comprises NAND flash technology >which > > inherently cannot execute in place, strictly sequential (data) >accesses... > > So you would still need some sort of rudimentary boot flash(NOR) or >other > > ROM to execute code to first load the BIOS, then the kernal, into >shadow, > > then main (DRAM) memory locations, respectively. > > > > In a system I'm architecting we're still going to use a 256Kx8 flash for > > LinuxBIOS, from there use JFFS2 and associated utilities to get the >kernal > > and various applications and data from a bare NAND on board. > > > > This link and its links go into much more detail than I can in this >email > > about issues you may face: > > > > http://www.linux-mtd.infradead.org/tech/nand.html > > > > Good Luck! > > > > > > ----- Original Message ----- > > From: "Devi Priya" <ijpriya(a)hotmail.com> > > To: <linuxbios(a)clustermatic.org> > > Sent: Wednesday, November 26, 2003 10:47 PM > > Subject: Linuxbios with Diskonchip? > > > > > >> Hi, > >> > >> I shall have my BIOS program, Linux kernel and filesystem in the same > >> Diskonchip. I want to use linuxbios (for sc1200). What is the physical > >> memory mapping that should be done? SDRAM mapped to lower order address > > and > >> Diskonchip to the higher order address. Is it correct? > >> > >> _________________________________________________________________ > >> Enjoy shopping online? Get this e credit card. > >> http://server1.msn.co.in/features/amex/ It cuts cost & adds value! > >> > >> _______________________________________________ > >> Linuxbios mailing list > >> Linuxbios(a)clustermatic.org > >> http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios(a)clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > >-- >niki w. waibel - system administrator @ newlogic technologies ag _________________________________________________________________ Express your Digital Self. Win fabulous prizes. http://www.msn.co.in/DigitalSelf/ Enter this cool contest.

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ipl code for sc1200?
by Devi Priya 28 Nov '03

28 Nov '03

Hi, I cannot find ipl.s code for sc1200 (nano mainboard). Which code should I use? _________________________________________________________________ Find your first love. Rekindle past joys! http://www.batchmates.com/msn.asp Get in touch with batchmates.

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Tyan S4880
by YhLu 27 Nov '03

27 Nov '03

Stefan, I'm porting Tyan S4880 now. I found that the following building err, do you meet it in AMD board? Even I only enable the CPU0's memctrl in the auto.c objcopy -O binary linuxbios linuxbios.strip gcc -o buildrom /home/yhlu/xx/xx/freebios2/util/buildrom/buildrom.c ./buildrom linuxbios.strip linuxbios.rom ../../tg3.zelf 0x10000 0x18000 linuxbios image is 65854 bytes; only 65536 allowed Linuxbios input file larger than allowed size! Regards YH.

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