coreboot

coreboot@coreboot.org

6 participants
39687 discussions

Tianocore debugging features
by Inotamira Orani 12 Oct '20

12 Oct '20

I'm trying to get Tianocore to work with my Thinkpad T400, however, the person I am working with, MrChromeBox, needs debugging information. The laptop is limited in ports, and the optimal solution according to them would be to use Coreboots CBMEM console. Neither Myself nor MrChromeBox know how to implement this, and it would be appreciated if someone more knowledgeable could implement this feature to correct whatever the error may be with the device and Tianocore.

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Asus F2A85-M Pro: Accessing DMA1_RESET_REG in `isa_dma_init()` hangs system
by Paul Menzel 12 Oct '20

12 Oct '20

Dear coreboot, I am trying to finish the port for the Asus F2A85-M Pro (variant of Asus F2A85-M). After getting the serial console working [1], it can be seen, that accessing `DMA1_RESET_REG` in `isa_dma_init()` hangs the system [2]. outb(0, DMA1_RESET_REG); Commenting this out, coreboot runs through and loads the payload. SeaBIOS has similar code, also hanging the system. // first reset the DMA controllers outb(0, PORT_DMA1_MASTER_CLEAR); I am at a loss. If you have an idea, how to fix it, I am all ears. Kind regards, Paul [1]: https://review.coreboot.org/c/coreboot/+/39371/ [2]: https://review.coreboot.org/c/coreboot/+/39377/

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Operating Systems for coreboot/flashrom/etc?
by Clay Daniels 12 Oct '20

12 Oct '20

I am a big FreeBSD fan, and also run NetBSD on an older machine. Haven't used much Linux lately but installed Ubuntu to get a lspci for flashrom use. Ubuntu is fine, but does not have superiotool available as best I see. Looking back to FreeBSD I found superiotool just where I expected, as a port to be compiled under sysutils. Works fine, but still never finds my hidden bios I will call "SPI1" for lack of a better name. Anyway, I keep looking for more tools, and have an extra disk drive for another OS if anyone has any good suggestions? Right now I'm in Ubuntu, listening to the coreboot & flashrom freenode IRC channels. Quite a lot goes on there if you catch it right. Some real sharp guys. Clay

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Bios Corrupted
by Miraz Shuvra 08 Oct '20

08 Oct '20

Hello sir , I need a little bit help I accidentally corrupted bios of my laptop during bios update ...before it blackout... i saw the txt .." searching for bios firmware ... bios firmware not found " I baught a ch341A usb bios programming device ... I think a .bin file may bring my laptop back to life. My laptop ran with ami bios The bios chip is 25Q80DVS IG 1646 Can you pls help me anyway.

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Some notes about NBFreq / MemFreq on amd (pre-ryzen)
by Ivan Ivanov 07 Oct '20

07 Oct '20

Relative ratio between the NorthBridge Frequency :and: Memory Frequency - has to be 1.25 : 1 or bigger for proper operation. NBFreq can be lowered to allow more OC (overclocking) margin for the memory, or higher to boost the memory performance. When XMP mode enabled - the CPU ratio, BCLK freq and memory parameters will be optimized automatically.

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Embedding EC firmware
by Andy Pont 05 Oct '20

05 Oct '20

Hello, I have a binary file that is the firmware for the embedded controller on the laptop platform that I am working on. In the regular BIOS provided by the hardware vendor this 128KB binary is located at offset 0x400000 in the BIOS image. Is there any documentation or instructions anywhere on how I include this into the Coreboot image that I am creating? -Andy.

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FW: P8H61-m LX2 coreboot?
by Matej Voľanský 04 Oct '20

04 Oct '20

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Should coreboot.org provide a vendor-agnostic hub for open hardware projects?
by Patrick Georgi 28 Sep '20

28 Sep '20

Hi everybody, I heard about a project interested int creating coreboot compatible open hardware. While that effort isn't ready to make any announcement, questions came up about where to host such a project. There's lots of open hardware out there already, but it's often based on not-quite open base boards so there seems to be a hole in the ecosystem approximately the shape of open hardware designs that could serve as base for hardware of all sizes (SBC alikes to put "shields" on, laptop/desktop designs that can be customized, maybe even servers, ...) That's where coreboot.org might come in: When I brought up the question in today's leadership meeting, people were generally interested in having coreboot.org host projects like that. The idea isn't to create "coreboot branded" hardware, because that makes as much sense as "UEFI branded" hardware (that is, none), but to provide a place where people can cooperate on and publish open hardware designs that are complex enough to require coreboot-style firmware. Thoughts? Patrick -- Google Germany GmbH, ABC-Str. 19, 20354 Hamburg Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg Geschäftsführer: Paul Manicle, Halimah DeLaine Prado

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Question about PR
by bzt 28 Sep '20

28 Sep '20

Hi, I'd like to commit a patch to coreboot. I've followed the tutorials on https://doc.coreboot.org/tutorial/part2.html I've set up gerrit account, etc. created a local repo, configured git for submit, set up change-id hook, etc. etc. etc. However at step 4a, "git push", I got an error message from the server about missing "Push" rights and to contact the administrator. How can I do that? I was able to push the commit as a private patch: https://review.coreboot.org/c/coreboot/+/45480 I'm not sure if you can see this url, or is this for my user only. I guess now I should add a reviewer, but how and who? Or how can I get a "Push" right? Thanks for your help, bzt

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Optiplex 9010 ACPI bug
by Henkaku 27 Sep '20

27 Sep '20

After booting into Linux kacpid is constantly using 100% CPU and ACPI interrupt is firing at ~10k/s. My test environment is Optiplex 9010 with i5-3470 with dual channel DDR3 and an Nvidia GTX1650 installed as DGPU, running Fedora 32. Coreboot logs and Linux dmesg is attached below. Captured with a build of earlier master but still reproducible on the latest master.

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