coreboot

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 22 Sep '20

22 Sep '20

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 113 new defect(s) introduced to coreboot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 20 of 113 defect(s) ** CID 1432759: Performance inefficiencies (PASS_BY_VALUE) /src/soc/intel/xeon_sp/cpx/acpi.c: 608 in acpi_create_dmar_ds_pci_br_for_port() ________________________________________________________________________________________________________ *** CID 1432759: Performance inefficiencies (PASS_BY_VALUE) /src/soc/intel/xeon_sp/cpx/acpi.c: 608 in acpi_create_dmar_ds_pci_br_for_port() 602 603 /* 604 * This function adds PCIe bridge device entry in DMAR table. If it is called 605 * in the context of ATSR subtable, it adds ATSR subtable when it is first called. 606 */ 607 static unsigned long acpi_create_dmar_ds_pci_br_for_port(unsigned long current, >>> CID 1432759: Performance inefficiencies (PASS_BY_VALUE) >>> Passing parameter iio_resource of type "IIO_RESOURCE_INSTANCE" (size 623 bytes) by value. 608 int port, int stack, IIO_RESOURCE_INSTANCE iio_resource, uint32_t pcie_seg, 609 bool is_atsr, bool *first) 610 { 611 612 if (get_stack_for_port(port) != stack) 613 return 0; ** CID 1431154: Control flow issues (DEADCODE) /src/ec/kontron/kempld/kempld_i2c.c: 254 in kempld_i2c_device_init() ________________________________________________________________________________________________________ *** CID 1431154: Control flow issues (DEADCODE) /src/ec/kontron/kempld/kempld_i2c.c: 254 in kempld_i2c_device_init() 248 if (spec_major == 1) 249 prescale = KEMPLD_CLK / (KEMPLD_I2C_FREQ_STD * 5) - 1000; 250 else 251 prescale = KEMPLD_CLK / (KEMPLD_I2C_FREQ_STD * 4) - 3000; 252 253 if (prescale < 0) >>> CID 1431154: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "prescale = 0L;". 254 prescale = 0; 255 256 /* Round to the best matching value */ 257 prescale_corr = prescale / 1000; 258 if (prescale % 1000 >= 500) 259 prescale_corr++; ** CID 1431127: Memory - corruptions (ARRAY_VS_SINGLETON) /src/lib/gcov-glue.c: 128 in coverage_init() ________________________________________________________________________________________________________ *** CID 1431127: Memory - corruptions (ARRAY_VS_SINGLETON) /src/lib/gcov-glue.c: 128 in coverage_init() 122 extern long __CTOR_LIST__; 123 typedef void (*func_ptr)(void); 124 func_ptr *ctor = (func_ptr *) &__CTOR_LIST__; 125 if (ctor == NULL) 126 return; 127 >>> CID 1431127: Memory - corruptions (ARRAY_VS_SINGLETON) >>> Using "ctor" as an array. This might corrupt or misinterpret adjacent memory locations. 128 for (; *ctor != (func_ptr) 0; ctor++) 129 (*ctor)(); 130 } 131 132 void __gcov_flush(void); 133 static void coverage_exit(void *unused) ** CID 1431126: (DEADCODE) /src/lib/libgcov.c: 425 in gcov_exit() /src/lib/libgcov.c: 391 in gcov_exit() ________________________________________________________________________________________________________ *** CID 1431126: (DEADCODE) /src/lib/libgcov.c: 425 in gcov_exit() 419 fname += 2; 420 421 /* Build relocated filename, stripping off leading 422 * directories from the initial filename if requested. 423 */ 424 if (gcov_prefix_strip > 0) { >>> CID 1431126: (DEADCODE) >>> Execution cannot reach this statement: "level = 0;". 425 int level = 0; 426 427 s = fname; 428 if (IS_DIR_SEPARATOR(*s)) 429 ++s; 430 /src/lib/libgcov.c: 391 in gcov_exit() 385 } else 386 #endif 387 prefix_length = 0; 388 389 /* If no prefix was specified and a prefix strip, then we assume 390 relative. */ >>> CID 1431126: (DEADCODE) >>> Execution cannot reach the expression "prefix_length == 0UL" inside this statement: "if (gcov_prefix_strip != 0 ...". 391 if (gcov_prefix_strip != 0 && prefix_length == 0) { 392 gcov_prefix = "."; 393 prefix_length = 1; 394 } 395 /* Allocate and initialize the filename scratch space plus one. */ 396 gi_filename = (char *) alloca(prefix_length + gcov_max_filename + 2); ** CID 1431125: Control flow issues (DEADCODE) /src/lib/gcov-glue.c: 126 in coverage_init() ________________________________________________________________________________________________________ *** CID 1431125: Control flow issues (DEADCODE) /src/lib/gcov-glue.c: 126 in coverage_init() 120 static void coverage_init(void *unused) 121 { 122 extern long __CTOR_LIST__; 123 typedef void (*func_ptr)(void); 124 func_ptr *ctor = (func_ptr *) &__CTOR_LIST__; 125 if (ctor == NULL) >>> CID 1431125: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "return;". 126 return; 127 128 for (; *ctor != (func_ptr) 0; ctor++) 129 (*ctor)(); 130 } 131 ** CID 1431124: Integer handling issues (BAD_SHIFT) /src/security/intel/txt/common.c: 185 in validate_acm() ________________________________________________________________________________________________________ *** CID 1431124: Integer handling issues (BAD_SHIFT) /src/security/intel/txt/common.c: 185 in validate_acm() 179 /* 180 * Causes #GP if acm_header->size > processor internal authenticated 181 * code area capacity. 182 * SAFER MODE EXTENSIONS REFERENCE. 183 * Intel 64 and IA-32 Architectures Software Developer Manuals Vol 2D 184 */ >>> CID 1431124: Integer handling issues (BAD_SHIFT) >>> In expression "1UL << log2_ceil((acm_header->size & 0xffffffU) << 2)", shifting by a negative amount has undefined behavior. The shift amount, "log2_ceil((acm_header->size & 0xffffffU) << 2)", is -1. 185 const size_t acm_len = 1UL << log2_ceil((acm_header->size & 0xffffff) << 2); 186 if (max_size_acm_area < acm_len) { 187 printk(BIOS_ERR, "TEE-TXT: BIOS ACM doesn't fit into AC execution region\n"); 188 return ACM_E_NOT_FIT_INTO_CPU_ACM_MEM; 189 } 190 ** CID 1431123: Control flow issues (DEADCODE) /src/lib/libgcov.c: 398 in gcov_exit() ________________________________________________________________________________________________________ *** CID 1431123: Control flow issues (DEADCODE) /src/lib/libgcov.c: 398 in gcov_exit() 392 gcov_prefix = "."; 393 prefix_length = 1; 394 } 395 /* Allocate and initialize the filename scratch space plus one. */ 396 gi_filename = (char *) alloca(prefix_length + gcov_max_filename + 2); 397 if (prefix_length) >>> CID 1431123: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "memcpy(gi_filename, gcov_pr...". 398 memcpy(gi_filename, gcov_prefix, prefix_length); 399 gi_filename_up = gi_filename + prefix_length; 400 401 /* Now merge each file. */ 402 for (gi_ptr = gcov_list; gi_ptr; gi_ptr = gi_ptr->next) { 403 unsigned int n_counts; ** CID 1430578: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /src/security/intel/stm/SmmStm.c: 359 in validate_resource() ________________________________________________________________________________________________________ *** CID 1430578: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /src/security/intel/stm/SmmStm.c: 359 in validate_resource() 353 resource->mem.base, 354 resource->mem.length); 355 356 if (resource->header.length != sizeof(STM_RSC_MEM_DESC)) 357 return false; 358 >>> CID 1430578: Integer handling issues (CONSTANT_EXPRESSION_RESULT) >>> "resource->mem.rwx_attributes > 7" is always false regardless of the values of its operands. This occurs as the logical operand of "if". 359 if (resource->mem.rwx_attributes > FULL_ACCS) 360 return false; 361 break; 362 363 case IO_RANGE: 364 case TRAPPED_IO_RANGE: ** CID 1429780: Uninitialized variables (UNINIT) ________________________________________________________________________________________________________ *** CID 1429780: Uninitialized variables (UNINIT) /src/mainboard/dell/optiplex_9010/sch5545_ec.c: 615 in sch5545_ec_hwm_init() 609 610 printk(BIOS_DEBUG, "%s\n", __func__); 611 sch5545_emi_init(0x2e); 612 613 chassis_type = get_chassis_type(); 614 >>> CID 1429780: Uninitialized variables (UNINIT) >>> Using uninitialized value "val" when calling "ec_read_write_reg". 615 ec_read_write_reg(EC_HWM_LDN, 0x0048, &val, READ_OP); 616 ec_read_write_reg(EC_HWM_LDN, 0x0048, &val, WRITE_OP); 617 ec_read_write_reg(EC_HWM_LDN, 0x0042, &val, READ_OP); 618 ec_read_write_reg(EC_HWM_LDN, 0x0048, &val, READ_OP); 619 val |= 0x02; 620 ec_read_write_reg(EC_HWM_LDN, 0x0048, &val, WRITE_OP); ** CID 1429772: Uninitialized variables (UNINIT) ________________________________________________________________________________________________________ *** CID 1429772: Uninitialized variables (UNINIT) /src/mainboard/dell/optiplex_9010/sch5545_ec.c: 428 in sch5545_get_ec_fw_version() 422 uint16_t sch5545_get_ec_fw_version(void) 423 { 424 uint8_t val; 425 uint16_t ec_fw_version; 426 427 /* Read the FW version currently loaded used by EC */ >>> CID 1429772: Uninitialized variables (UNINIT) >>> Using uninitialized value "val" when calling "ec_read_write_reg". 428 ec_read_write_reg(EC_HWM_LDN, 0x2ad, &val, READ_OP); 429 ec_fw_version = (val << 8); 430 ec_read_write_reg(EC_HWM_LDN, 0x2ae, &val, READ_OP); 431 ec_fw_version |= val; 432 ec_read_write_reg(EC_HWM_LDN, 0x2ac, &val, READ_OP); 433 ec_read_write_reg(EC_HWM_LDN, 0x2fd, &val, READ_OP); ** CID 1429765: Uninitialized variables (UNINIT) ________________________________________________________________________________________________________ *** CID 1429765: Uninitialized variables (UNINIT) /src/mainboard/dell/optiplex_9010/sch5545_ec.c: 509 in sch5545_ec_hwm_early_init() 503 int i; 504 505 printk(BIOS_DEBUG, "%s\n", __func__); 506 507 ec_check_mbox_and_int_status(0x20, 0x01); 508 >>> CID 1429765: Uninitialized variables (UNINIT) >>> Using uninitialized value "val" when calling "ec_read_write_reg". 509 ec_read_write_reg(2, 0xcb, &val, READ_OP); 510 ec_read_write_reg(2, 0xb8, &val, READ_OP); 511 512 for (i = 0; i < ARRAY_SIZE(ec_hwm_init_seq); i++) { 513 val = ec_hwm_init_seq[i].val; 514 ec_read_write_reg(EC_HWM_LDN, ec_hwm_init_seq[i].reg, &val, ** CID 1428711: (OVERRUN) ________________________________________________________________________________________________________ *** CID 1428711: (OVERRUN) /src/vendorcode/eltan/security/mboot/mboot.c: 431 in mb_crtm() 425 tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0; 426 tcgEventHdr.eventType = EV_S_CRTM_VERSION; 427 tcgEventHdr.eventSize = sizeof(crtm_version); 428 printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, 429 tcgEventHdr.eventSize); 430 >>> CID 1428711: (OVERRUN) >>> Overrunning callee's array of size 32 by passing argument "tcgEventHdr.eventSize" (which evaluates to 67) in call to "mboot_hash_extend_log". 431 status = mboot_hash_extend_log(0, (uint8_t *)crtm_version, tcgEventHdr.eventSize, 432 &tcgEventHdr, (uint8_t *)crtm_version); 433 if (status) { 434 printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status); 435 return status; 436 } /src/mainboard/facebook/fbg1701/romstage.c: 78 in mb_crtm() 72 memset(&tcgEventHdr, 0, sizeof(tcgEventHdr)); 73 tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0; 74 tcgEventHdr.eventType = EV_S_CRTM_VERSION; 75 tcgEventHdr.eventSize = sizeof(crtm_version); 76 printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, tcgEventHdr.eventSize); 77 >>> CID 1428711: (OVERRUN) >>> Overrunning callee's array of size 32 by passing argument "tcgEventHdr.eventSize" (which evaluates to 67) in call to "mboot_hash_extend_log". 78 status = mboot_hash_extend_log(0, (uint8_t *)crtm_version, 79 tcgEventHdr.eventSize, &tcgEventHdr, 80 (uint8_t *)crtm_version); 81 if (status) { 82 printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status); 83 } 84 85 return status; 86 } ** CID 1419488: Null pointer dereferences (FORWARD_NULL) ________________________________________________________________________________________________________ *** CID 1419488: Null pointer dereferences (FORWARD_NULL) /src/superio/common/generic.c: 23 in generic_set_resources() 17 18 for (res = dev->resource_list; res; res = res->next) { 19 if (!(res->flags & IORESOURCE_ASSIGNED)) 20 continue; 21 22 res->flags |= IORESOURCE_STORED; >>> CID 1419488: Null pointer dereferences (FORWARD_NULL) >>> Passing "dev" to "report_resource_stored", which dereferences null "dev->link_list". 23 report_resource_stored(dev, res, ""); 24 } 25 } 26 27 static void generic_read_resources(struct device *dev) 28 { ** CID 1419483: Memory - corruptions (OVERRUN) /src/vendorcode/eltan/security/verified_boot/vboot_check.c: 85 in verified_boot_check_manifest() ________________________________________________________________________________________________________ *** CID 1419483: Memory - corruptions (OVERRUN) /src/vendorcode/eltan/security/verified_boot/vboot_check.c: 85 in verified_boot_check_manifest() 79 pre->body_signature.data_size = CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS * 80 DIGEST_SIZE; 81 pre->body_signature.sig_offset = sizeof(struct vb2_signature) + 82 pre->body_signature.data_size; 83 pre->body_signature.sig_size = size - pre->body_signature.data_size; 84 sd->workbuf_used += size; >>> CID 1419483: Memory - corruptions (OVERRUN) >>> Overrunning struct type vb2_signature of 24 bytes by passing it to a function which accesses it at byte offset 663 using argument "size" (which evaluates to 640). [Note: The source code implementation of the function has been overridden by a builtin model.] 85 memcpy((void *)((void *)&pre->body_signature + (long)sizeof(struct vb2_signature)), 86 (uint8_t *)CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_LOC, size); 87 88 89 if (vb2api_verify_kernel_data(ctx, (void *)CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_LOC, 90 pre->body_signature.data_size)) ** CID 1407750: Control flow issues (NO_EFFECT) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 50 in sbi_check_extension() ________________________________________________________________________________________________________ *** CID 1407750: Control flow issues (NO_EFFECT) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 50 in sbi_check_extension() 44 * by checking the feature bits of the platform. We can create a map 45 * between extension ID & feature and use a generic function to check 46 * or just use a switch case for every new extension support added 47 * TODO: Implement it. 48 */ 49 >>> CID 1407750: Control flow issues (NO_EFFECT) >>> This greater-than-or-equal-to-zero comparison of an unsigned value is always true. "extid >= SBI_EXT_0_1_SET_TIMER". 50 if ((extid >= SBI_EXT_0_1_SET_TIMER && 51 extid <= SBI_EXT_0_1_SHUTDOWN) || (extid == SBI_EXT_BASE)) { 52 *out_val = 1; 53 } else if (extid >= SBI_EXT_VENDOR_START && 54 extid <= SBI_EXT_VENDOR_END) { 55 *out_val = sbi_platform_vendor_ext_check( ** CID 1407740: Control flow issues (DEADCODE) /3rdparty/opensbi/lib/sbi/sbi_trap.c: 131 in sbi_trap_redirect() ________________________________________________________________________________________________________ *** CID 1407740: Control flow issues (DEADCODE) /3rdparty/opensbi/lib/sbi/sbi_trap.c: 131 in sbi_trap_redirect() 125 hstatus = csr_read(CSR_HSTATUS); 126 hstatus &= ~HSTATUS_SP2P; 127 hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SP2P : 0; 128 hstatus &= ~HSTATUS_SP2V; 129 hstatus |= (hstatus & HSTATUS_SPV) ? HSTATUS_SP2V : 0; 130 hstatus &= ~HSTATUS_SPV; >>> CID 1407740: Control flow issues (DEADCODE) >>> Execution cannot reach the expression "0UL" inside this statement: "hstatus |= (prev_virt ? 128...". 131 hstatus |= (prev_virt) ? HSTATUS_SPV : 0; 132 hstatus &= ~HSTATUS_STL; 133 hstatus |= (prev_stage2) ? HSTATUS_STL : 0; 134 csr_write(CSR_HSTATUS, hstatus); 135 } 136 ** CID 1407737: Error handling issues (CHECKED_RETURN) /src/drivers/spi/spi_sdcard.c: 357 in spi_sdcard_do_app_command() ________________________________________________________________________________________________________ *** CID 1407737: Error handling issues (CHECKED_RETURN) /src/drivers/spi/spi_sdcard.c: 357 in spi_sdcard_do_app_command() 351 static int spi_sdcard_do_app_command(const struct spi_sdcard *card, 352 uint8_t cmd, 353 uint32_t argument, 354 uint32_t *out_register) 355 { 356 /* CMD55 */ >>> CID 1407737: Error handling issues (CHECKED_RETURN) >>> Calling "spi_sdcard_do_command" without checking return value (as is done elsewhere 15 out of 17 times). 357 spi_sdcard_do_command(card, APP_CMD, 0, NULL); 358 return spi_sdcard_do_command_help(card, 1, cmd, argument, out_register); 359 } 360 361 size_t spi_sdcard_size(const struct spi_sdcard *card) 362 { ** CID 1407730: (SWAPPED_ARGUMENTS) ________________________________________________________________________________________________________ *** CID 1407730: (SWAPPED_ARGUMENTS) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 217 in sbi_ecall_handler() 211 } else if (extension_id == SBI_EXT_BASE) 212 ret = sbi_ecall_base_handler(scratch, extension_id, func_id, 213 args, &out_val, 214 &out_tval, &out_tcause); 215 else if (extension_id >= SBI_EXT_VENDOR_START && 216 extension_id <= SBI_EXT_VENDOR_END) { >>> CID 1407730: (SWAPPED_ARGUMENTS) >>> The positions of arguments in the call to "sbi_ecall_vendor_ext_handler" do not match the ordering of the parameters: * "&out_tval" is passed to "out_tcause" * "&out_tcause" is passed to "out_tval" 217 ret = sbi_ecall_vendor_ext_handler(scratch, extension_id, 218 func_id, args, &out_val, 219 &out_tval, &out_tcause); 220 } else { 221 ret = SBI_ENOTSUPP; 222 } /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 212 in sbi_ecall_handler() 206 if (extension_id >= SBI_EXT_0_1_SET_TIMER && 207 extension_id <= SBI_EXT_0_1_SHUTDOWN) { 208 ret = sbi_ecall_0_1_handler(scratch, extension_id, args, 209 &out_tval, &out_tcause); 210 is_0_1_spec = 1; 211 } else if (extension_id == SBI_EXT_BASE) >>> CID 1407730: (SWAPPED_ARGUMENTS) >>> The positions of arguments in the call to "sbi_ecall_base_handler" do not match the ordering of the parameters: * "&out_tval" is passed to "out_tcause" * "&out_tcause" is passed to "out_tval" 212 ret = sbi_ecall_base_handler(scratch, extension_id, func_id, 213 args, &out_val, 214 &out_tval, &out_tcause); 215 else if (extension_id >= SBI_EXT_VENDOR_START && 216 extension_id <= SBI_EXT_VENDOR_END) { 217 ret = sbi_ecall_vendor_ext_handler(scratch, extension_id, ** CID 1407727: Control flow issues (NO_EFFECT) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 206 in sbi_ecall_handler() ________________________________________________________________________________________________________ *** CID 1407727: Control flow issues (NO_EFFECT) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 206 in sbi_ecall_handler() 200 args[1] = regs->a1; 201 args[2] = regs->a2; 202 args[3] = regs->a3; 203 args[4] = regs->a4; 204 args[5] = regs->a5; 205 >>> CID 1407727: Control flow issues (NO_EFFECT) >>> This greater-than-or-equal-to-zero comparison of an unsigned value is always true. "extension_id >= SBI_EXT_0_1_SET_TIMER". 206 if (extension_id >= SBI_EXT_0_1_SET_TIMER && 207 extension_id <= SBI_EXT_0_1_SHUTDOWN) { 208 ret = sbi_ecall_0_1_handler(scratch, extension_id, args, 209 &out_tval, &out_tcause); 210 is_0_1_spec = 1; 211 } else if (extension_id == SBI_EXT_BASE) ** CID 1407723: Control flow issues (MISSING_BREAK) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 105 in sbi_ecall_base_handler() ________________________________________________________________________________________________________ *** CID 1407723: Control flow issues (MISSING_BREAK) /3rdparty/opensbi/lib/sbi/sbi_ecall.c: 105 in sbi_ecall_base_handler() 99 case SBI_EXT_BASE_GET_MARCHID: 100 *out_val = csr_read(CSR_MARCHID); 101 break; 102 case SBI_EXT_BASE_GET_MIMPID: 103 *out_val = csr_read(CSR_MIMPID); 104 break; >>> CID 1407723: Control flow issues (MISSING_BREAK) >>> The case for value "SBI_EXT_BASE_PROBE_EXT" is not terminated by a 'break' statement. 105 case SBI_EXT_BASE_PROBE_EXT: 106 ret = sbi_check_extension(scratch, args[0], out_val); 107 default: 108 ret = SBI_ENOTSUPP; 109 } 110 ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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Intel Firmware Descriptor
by Andy Pont 18 Sep '20

18 Sep '20

Hello, I’m working on porting Coreboot to a laptop that uses Intel Comet Lake. When the build completes it spits out the following warning: ** WARNING ** coreboot has been built without an Intel Firmware Descriptor. Never write a complete coreboot.rom without an IFD to your board's flash chip! You can use flashrom's IFD or layout parameters to flash only to the BIOS region. What is an IFD and how do I create one? -Andy.

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 18 Sep '20

18 Sep '20

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. 179 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1432727: Resource leaks (RESOURCE_LEAK) /src/drivers/intel/mipi_camera/camera.c: 458 in camera_fill_nvm() ________________________________________________________________________________________________________ *** CID 1432727: Resource leaks (RESOURCE_LEAK) /src/drivers/intel/mipi_camera/camera.c: 458 in camera_fill_nvm() 452 static void camera_fill_nvm(const struct device *dev) 453 { 454 struct drivers_intel_mipi_camera_config *config = dev->chip_info; 455 struct acpi_dp *dsd = acpi_dp_new_table("_DSD"); 456 457 if (!config->nvm_compat) >>> CID 1432727: Resource leaks (RESOURCE_LEAK) >>> Variable "dsd" going out of scope leaks the storage it points to. 458 return; 459 460 /* It might be possible to default size or width based on type. */ 461 if (!config->disable_nvm_defaults && !config->nvm_pagesize) 462 config->nvm_pagesize = 1; 463 ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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Support for enterprise class server hardware?
by David West 16 Sep '20

16 Sep '20

I am interested in whether coreboot works with server hardware like PowerEdge servers, Proliant servers, etc. If so, is there a support matrix? Sent from my iPhone

4 3

Coreboot on asus KGPE-D16 - Black screen
by Ale 16 Sep '20

16 Sep '20

Hello, I have an Asus kgpe-d16 with 2 AMD opteron 6282 SE installed; obviously, since I had the first stock bios version the screen was black and no boot occurs because CPUs are not supported. So I have ordered a coreboot bios DIP and I have installed it but nothing has changed, same behaviour (only black screen and no sound, only fans starts). Can someone have some idea? I even try to log with the serial port but no log is shown at all... P.S. Could it be that one of the CPUs is broken? Or that something went wrong during the flashing procedure over the DIP? Is there a way to check that the DIP is ok and with coreboot? Thank you very much!

3 2

NVME is not detecting.
by techmindams04＠gmail.com 15 Sep '20

15 Sep '20

I have ported coreboot on Coffeelake architecture. Coreboot is up and during PCI scan M.2 NVME is not detecting in the scan. I have enabled the root port (Port 9) in the device tree and root port is shown in enumeration but not NVME device under it. Is there any configuration to be done in coreboot to detect NVME. Regards, SenK.

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Re: Thinkpad T410 flashing questions
by Stéphane Delaunay 14 Sep '20

14 Sep '20

Hey Peter, Thanks again for your elaboration, I've had a go at this last weekend, or at least, I tired to. On Tuesday, September 1, 2020 1:37 PM, Peter Stuge <peter(a)stuge.se> wrote: > I haven't used it myself because soldering is easy for me, but apparently > at least one person had success with the GPIO33 method. I wasn't able to locate those traces from the top. To get a full view of the board, you'd have to remove the CPU heatsink and take it out of the frame, so I don't really understand how you would do this while powering on the system, it would probably overheat immediately. Unfortunately, I don't have a heat gun at hand to desolder the chip either, so I'm considering just doing a dirty ISP and seeing where I can get. Unless there's some other way to disconnect the linked components? But I can't really think of one.

3 2

coreboot Compiling Error
by Andrew Lee 13 Sep '20

13 Sep '20

Hello, when I tried to compile coreboot it gave me this error message. https://pastebin.com/raw/mK9jc5eX

2 1

Haswell hang in cbmem_top_init_once
by sfsdfu sddfss 12 Sep '20

12 Sep '20

I'm trying to port coreboot to HP EliteDesk 800 G1 DM，using master branch with commit hash 70fea013c7ebd6d85a7806748233fcfd76802f5f，and mrc.bin from Chromebook peppy. Then I get the following boot log by EHCI debug serial，it hang in cbmem_top_init_once. Adding debug print shows cbmem_top points to 7f800000. LPC debug card also stop on 0x3b. I have no idea how to debug. Any help would be appreciated. @@ -55,8 +55,11 @@ static void cbmem_top_init_once(void) return; /* The test is only effective on X86 and when address hits UC memory. */ - if (ENV_X86) - quick_ram_check_or_die((uintptr_t)cbmem_top() - sizeof(u32)); + if (ENV_X86) { + uintptr_t cbmem_top_p = (uintptr_t)cbmem_top(); + printk(BIOS_DEBUG, "CBMEM top: %08lx ", cbmem_top_p); + quick_ram_check_or_die(cbmem_top_p - sizeof(u32)); + } } coreboot-4.12-2693-g0c1e8f44ec-dirty Sat Sep 12 11:15:18 UTC 2020 bootblock starting (log level: 8)... FMAP: area COREBOOT found @ e30200 (1900032 bytes) CBFS: Locating 'fallback/romstage' CBFS: Found @ offset 80 size 1827c BS: bootblock times (exec / console): total (unknown) / 8 ms coreboot-4.12-2693-g0c1e8f44ec-dirty Sat Sep 12 11:15:18 UTC 2020 romstage starting (log level: 8)... Disabling Watchdog reboot... done. SMBus controller enabled Setting up static northbridge registers... done. Started PEG10 link training. Temporarily hiding PEG10. Initializing IGD... Back from haswell_early_initialization() POST: 0x3a CPU id(306c3) ucode:00000028 Intel(R) Pentium(R) CPU G3240 @ 3.10GHz AES NOT supported, TXT NOT supported, VT supported PCH type: Q87, device id: 8c4e, rev id 5 Starting UEFI PEI System Agent FMAP: area RW_MRC_CACHE found @ e20000 (65536 bytes) MRC: no data in 'RW_MRC_CACHE' FMAP: area COREBOOT found @ e30200 (1900032 bytes) CBFS: Locating 'mrc.bin' CBFS: Found @ offset 16fdc0 size 2e6e4 System Agent: Starting up... System Agent: Initializing PCH install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845} install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276} System Agent: Initializing PCH (SMBUS) System Agent: Initializing PCH (USUSB System Agent Version 1.6.1 Build 2 memcfg DDR3 clock 1333 MHz memcfg channel assignment: A: 1, B 0, C 2 memcfg channel[0] config (00600000): ECC inactive enhanced interleave mode on rank interleave on DIMMA 0 MB width x8 or x32 single rank, selected DIMMB 0 MB width x8 or x32 single rank memcfg channel[1] config (00600010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 or x32 single rank, selected DIMMB 0 MB width x8 or x32 single rank POST: 0x3b ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Initializing ME: Current Operation State : Bring up ME: Current Operation Mode : Debug ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : 0x4d CBMEM top: 7f800000

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Re: CoffeeLake RVP master: Code changed... How to enable SATA and LAN?
by techmindams04＠gmail.com 12 Sep '20

12 Sep '20

Hey Jose, I am facing the same issue on Coffeelake RVP. Have you resolved it. If so let me know how to do it. Regards, SenK

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