coreboot June 2018

coreboot@coreboot.org

40 participants
105 discussions

New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 15 Jun '18

15 Jun '18

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1393458: (DEADCODE) /src/northbridge/intel/x4x/raminit_ddr23.c: 1685 in set_dradrb() /src/northbridge/intel/x4x/raminit_ddr23.c: 1720 in set_dradrb() /src/northbridge/intel/x4x/raminit_ddr23.c: 1743 in set_dradrb() ________________________________________________________________________________________________________ *** CID 1393458: (DEADCODE) /src/northbridge/intel/x4x/raminit_ddr23.c: 1685 in set_dradrb() 1679 1680 if (s->stacked_mode) { 1681 dual_channel_size = 0; 1682 } else if (size_me == 0) { 1683 dual_channel_size = MIN(size_ch0, size_ch1) * 2; 1684 } else { >>> CID 1393458: (DEADCODE) >>> Execution cannot reach this statement: "if (size_ch0 == 0U) { siz...". 1685 if (size_ch0 == 0) { 1686 /* ME needs ram on CH0 */ 1687 size_me = 0; 1688 /* TOTEST: bailout? */ 1689 } else { 1690 /* Set ME UMA size in MiB */ /src/northbridge/intel/x4x/raminit_ddr23.c: 1720 in set_dradrb() 1714 if (!(s->stacked_mode && size_ch0 != 0 && size_ch1 != 0)) { 1715 map |= 0x04; 1716 if (size_ch0 <= size_ch1) 1717 map |= 0x01; 1718 } 1719 } else { >>> CID 1393458: (DEADCODE) >>> Execution cannot reach this statement: "if (s->stacked_mode == 0 &&...". 1720 if (s->stacked_mode == 0 && size_ch0 - size_me < size_ch1) 1721 map |= 0x04; 1722 } 1723 1724 MCHBAR8(0x110) = map; 1725 MCHBAR16(0x10e) = 0; /src/northbridge/intel/x4x/raminit_ddr23.c: 1743 in set_dradrb() 1737 if (size_ch0 > size_ch1) 1738 single_channel_offset = dual_channel_size / 2 1739 + single_channel_size; 1740 else 1741 single_channel_offset = dual_channel_size / 2; 1742 } else { >>> CID 1393458: (DEADCODE) >>> Execution cannot reach this statement: "if (size_ch0 > size_ch1 && ...". 1743 if ((size_ch0 > size_ch1) && ((map & 0x7) == 4)) 1744 single_channel_offset = dual_channel_size / 2 1745 + single_channel_size; 1746 else 1747 single_channel_offset = dual_channel_size / 2 1748 + size_me; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V0…

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by qtux 15 Jun '18

15 Jun '18

On 15/06/18 02:42, Kyösti Mälkki wrote: > On Thu, Jun 14, 2018 at 4:38 AM, qtux <mail(a)qtux.eu> wrote: >> On 13/06/18 22:12, Kyösti Mälkki wrote: >> Hi, >> >> S3 is __not__ working on my KCMA-D8. The last time I tried, I had to >> remove the power cord for a couple of seconds to be able to boot again. >> >> Interestingly, this issue looks similar to another one I had with a >> flash chip which seems not to be supported by coreboot. Here the >> relevant part of the logs regarding the bad chip: >> Manufacturer: ef >> SF: Unsupported Winbond ID 4014 >> SF: Unsupported manufacturer! >> > > Thanks, [1] should take care of this. > Thank you! I will test the Winbond chip when I find some time to do so. >> Coreboot did work well, but froze sometimes when booting during the >> assigning resources step (more or less exactly after assigning the PCI >> 14.3 or PNP 002e.2 device, which happen to be close to each other inside >> the devicetree). I had to remove the power cord in order to be able to >> boot again (or to get the next random freeze...). Rarely, after such an >> recovery, I have got flooded by IOMMU warnings in Linux which would only >> disappear after another reboot. > > Ah, that resume reboot-loop issue. The bit that tells to do S3 resume > is a sticky register backed up by Vstb rail. With [2] you should not > need to do full power-cycling at least. We should extend this work to > other platforms. > I am not sure whether the term resume reboot-loop applies for my issue (side note: I used a serial connection to monitor the boot process): Rebooting (via holding the power button for some seconds) after encountering a freeze (aka stopping at the assign resource step) resulted into having no output from serial at all. I could repeat this with no effect at all, the computer seemed to be dead. Only removing the power cord could solve the issue. This issue could occur when rebooting but even when cold booting. >> Replacing the chip seems to have solved this random boot freeze problem. >> But maybe the S3 issue and the issue I had with the wrong chip are >> related as they both lock down the machine until I remove the power cord. > > Yes, it's connected. Having a non-supported SPI part ID there would > prevent ACPI S3 resume, and likely enter the loop.> Just to be sure: The S3 resume does not work with the __supported__ SPI chip. I did not test S3 with the unsupported one. > If someone takes the task of testing and/or bisecting please note: > > Regression present between: 714709f .. a26377b > > Regression present between: 9e94dbf .. c2a921b (for kcma-d8) 8a8386e > (for kgpe-d16) > > Now, since commit babb2e6 that claims to add S3 support on kgpe-d16 is > within the latter period, I do not quite see how S3 support could have > worked with that commit on kgpe-d16. Or maybe this feature was never > retested once it was rebased and upstreamed. Nor can I see how it > could have worked for any commit in 4.6, so I must be missing > something here. So I will need some logs. > > > [1] https://review.coreboot.org/#/c/coreboot/+/27107 > [2] https://review.coreboot.org/#/c/coreboot/+/27108 > > Kyösti > Answers are inside the text. I forgot to mention that I am currently on commit 793ae846e8. Cheers, Matthias

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by Taiidan＠gmx.com 15 Jun '18

15 Jun '18

On 06/14/2018 08:42 PM, Kyösti Mälkki wrote: > On Thu, Jun 14, 2018 at 4:38 AM, qtux <mail(a)qtux.eu> wrote: > Now, since commit babb2e6 that claims to add S3 support on kgpe-d16 is > within the latter period, I do not quite see how S3 support could have > worked with that commit on kgpe-d16. Or maybe this feature was never > retested once it was rebased and upstreamed. Nor can I see how it > could have worked for any commit in 4.6 I just tested S3 again and it worked fine on my v4.6 D16. My Win10 guest with IOMMU-GFX also resumes properly as long as it is suspended first before the host which places the assigned devices in S3. It takes a LONG time (around a minute) to resume so it isn't quick but it does work. > so I must be missing something here. So I will need some logs. Ah tell me what you want and I will provide it ASAP :D

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Re: [coreboot] wiki backup
by Taiidan＠gmx.com 15 Jun '18

15 Jun '18

On 06/14/2018 08:41 PM, Martin Roth wrote: > On Thu, Jun 14, 2018 at 12:35 PM Leah Rowe <info(a)gluglug.org.uk> wrote: >> On 14/06/18 19:01, Martin Roth wrote: > >>> * The wiki requires a separate login from everything else, which >>> has to be created manually. >> Not only that, but it wasn't clear how to get an account in the first >> place> > I guess I didn't realize that it was a problem. If you clicked 'log > in' in the top of the wiki, it told you who to email along with their > addresses. Yeah it was quite clear to me how to get an account when I first wanted to contribute and it only took a few days to get approved despite the fact that I am certainly not a member of the coreboot elite xD > "If you don't have an account and wish to contribute contact Stefan > Reinauer or Patrick Georgi and tell them what exactly you want to > contribute." > https://web.archive.org/web/20151031111952/http://www.coreboot.org:80/index… I must say that Mr. georgi was quite welcoming in granting me an account as a new user - and I have repaid that with a many helpful edits and created pages. >> By the way, what do you think of the idea I floated in a previous >> message? My idea is to have some kind of web interface where a >> non-technical user who doesn't know how to use git can browse the >> documentation on the website and click "edit", which will take them to >> the appropriate markdown file in the repository. When they're done, >> they give their edit a title and description, which becomes the commit >> message, and their contribution gets sent to code review (Gerrit). >> >> How feasible do you think this would be? >> It would give some of the ease of use of MediaWiki as before, while >> still having all of the advantages that you listed. > > I have no issue with that if someone wanted to work on it. It might > still cause some difficulties because those people probably wouldn't > be able to respond to requests for updates in gerrit An email could be automatically sent to them for that, and then replying to it could automatically create a reply on gerrit. > and they > wouldn't necessarily follow the rest of the rules we have for > submitting to coreboot, but maybe those issues could be worked out. > Maybe a documentation administrator could shepherd the patches the > rest of the way through the process.> > As far as feasibility, I'm sure it could be done, it would just take > someone committed to making it happen. This would be quite nice in terms of usability and I very much hope someone makes it. Also can someone answer: I presume that editing the wiki it requires my "real" name as it is on git?

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by Timothy Pearson 15 Jun '18

15 Jun '18

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 I should probably step up here and just get this fixed....let me see what I can do with it next week. On 06/14/2018 08:28 PM, Kyösti Mälkki wrote: > On Thu, Jun 14, 2018 at 8:28 PM, Merlin Büge <toni(a)bluenox07.de > <mailto:toni@bluenox07.de>> wrote: >> >> >> On Thu, 14 Jun 2018 09:45:49 +0300 >> Kyösti Mälkki <kyosti.malkki(a)gmail.com > <mailto:kyosti.malkki@gmail.com>> wrote: >> >>> >>> I hear you and weigh your opinion according to the number of commits I >>> can recognize you have authored on the repo. >> >> I just want to mention: >> Generally, helping out with documentation and (especially) code review >> and even ordinary users who report bugs are also a value-add to the >> coreboot project. >> > > Agreed and Talidan should not get offended by previous comment. I get > way more rude and personal in some of my reviews towards commercial > vendors. Apologies for that. > > Just recently, cases of RELOCATABLE_RAMSTAGE=n started to fail to boot > certain payload builds. The accumulated developers time it took to > bisect, discuss and come up with a sub-standard solution for that; > should I say 8 hours across 5 active developers. That time is better > spent elsewhere, I consider the discussion of why we deprecate older > boards from master just not productive at all. > > Notice that even the little details Matthias provided earlier already > moves us forwards. > > The criteria I listed was my personal wishlist as flipping to > RELOCATABLE_RAMSTAGE=y has proven to be quite easy and the remaining > platforms are: > > northbridge/amd/amdfam10 > northbridge/amd/lx <- waiting for EARLY_CBMEM_INIT > northbridge/intel/i440bx <- already tested > northbridge/via/vx900 <- I know competent person to do this > soc/intel/fsp_baytrail <- I have hardware and know person to > double-check > soc/intel/fsp_broadwell_de <- I know competent person to do this > > > Kyösti > - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBCAAGBQJbI050AAoJEK+E3vEXDOFbV9UH+wdDms4AhQq4GBrLbBmuFh+v VxTMir4PTXlUh1Li/JhYWSV6ZMzOwrRo4JOQJp4BpnkvfAxZZ6vvnm1Bu2xR2sba BRF01zk1ZJxoMaE1lUANkKlVOBTfog7nNElBHXRCZJ832Qsc3SpMGuWlap9mBd9L J7e4yNAvBvW9/cRzh7jHUOzrWxB1ESuyOCEN03OPpxfG37nOHmtGQNKwwifm419d YxoDwBnQ2vuJpj3ynQC1maX/t4RIqJacTfxfHIcQz7+S2U7Dem+n3lrq2gTl3OY/ e7NEmBevdAgaNiUIMC7pprWTsrthMw0oirmTXX8jVWFLAVIbZ0blSZVzjmfzkYU= =amyM -----END PGP SIGNATURE-----

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by Taiidan＠gmx.com 15 Jun '18

15 Jun '18

On 06/14/2018 02:45 AM, Kyösti Mälkki wrote: > On Thu, Jun 14, 2018 at 7:23 AM, Taiidan(a)gmx.com <Taiidan(a)gmx.com> wrote: >> On 06/13/2018 04:12 PM, Kyösti Mälkki wrote: >>> Hi >>> >>> Now that we wiped out K8, I'd like to put my eyes on fam10-15 boards. >> What exactly do you mean by wiped out? >> >>> >>> Couple questions for board owners: >>> >>> First, about asus/kcma-d8 and asus/kgpe-d16: Do these have working S3 >>> support? I remember rumours they originally worked at some point, but >>> regressed during the rebase / upstream process. Anyone willing to >>> bisect/fix it if necessary? >>> >> >> I have a D16 with v4.6 that I regularly use suspend with and it works >> absolutely fine - I can also suspend a host featuring a guest with IOMMU >> graphics and then resume that host later on and continue playing video >> games on the guest. > > So you are committed to bisect this and make it work on current > master, thank you. Yes I am, like I said this worked quite recently so I doubt it will be that difficult to fix although I will have to have someone else publish whatever I find. I own both of these and value them quite a bit so I will be putting efforts in to this - In reference to my previous offer to support the H8SCM I abandoned that effort as it went from $30 used to over $200 and I didn't see the point after that (as one should just get a KCMA-D8 or KGPE-D16 at that point) The D8 and D16 are the last and best owner controlled x86 boards the only coreboot boards left with 100% open source hardware initiation. Like I have said before at this rate there will be no boards in master besides *brand new* purism laptops and un-obtainable development boards where half the features don't work anyway - I fail to see how that makes for a healthy project if no one (again remember I have said you do quite a bit already) is willing to support the two boards that I would argue are the best examples of coreboot and modern computing freedom efforts. >> >> I again state my for-some-reason controversial opinion that at this rate >> there will soon be no non-development boards in coreboot due to the >> choices of the current leadership in determining standards. > > I hear you and weigh your opinion according to the number of commits I > can recognize you have authored on the repo. I didn't mean it like that man - you have done quite a bit for computing freedom and I have recognized that on various occasions. As I am unwilling to provide my "real" name I am not allowed to contribute code so I help in other ways - I have spent countless hours assisting many many people with recommending boards to purchase and then getting coreboot running on them. Contributing code isn't the only measure of worth, every project needs people to provide tech support and documentation and I do just that. I do feel as though lately there has been a turn for elitism where anyone who doesn't contribute code is discounted and made to feel unwelcome as if our opinion doesn't really matter and I do not like this...but again I say you are one of my favorites.

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by Merlin Büge 15 Jun '18

15 Jun '18

On Thu, 14 Jun 2018 09:45:49 +0300 Kyösti Mälkki <kyosti.malkki(a)gmail.com> wrote: > On Thu, Jun 14, 2018 at 7:23 AM, Taiidan(a)gmx.com <Taiidan(a)gmx.com> > wrote: > > On 06/13/2018 04:12 PM, Kyösti Mälkki wrote: > >> Hi > >> > >> Now that we wiped out K8, I'd like to put my eyes on fam10-15 > >> boards. > > What exactly do you mean by wiped out? > > > >> > >> Couple questions for board owners: > >> > >> First, about asus/kcma-d8 and asus/kgpe-d16: Do these have working > >> S3 support? I remember rumours they originally worked at some > >> point, but regressed during the rebase / upstream process. Anyone > >> willing to bisect/fix it if necessary? > >> > > > > I have a D16 with v4.6 that I regularly use suspend with and it > > works absolutely fine - I can also suspend a host featuring a guest > > with IOMMU graphics and then resume that host later on and continue > > playing video games on the guest. > > So you are committed to bisect this and make it work on current > master, thank you. > > > > > I again state my for-some-reason controversial opinion that at this > > rate there will soon be no non-development boards in coreboot due > > to the choices of the current leadership in determining standards. > > I hear you and weigh your opinion according to the number of commits I > can recognize you have authored on the repo. I just want to mention: Generally, helping out with documentation and (especially) code review and even ordinary users who report bugs are also a value-add to the coreboot project. > > Kyösti > -- Merlin Büge

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Re: [coreboot] [RFH] Native AMD fam10-15 support
by qtux 15 Jun '18

15 Jun '18

On 13/06/18 22:12, Kyösti Mälkki wrote: > Hi > > Now that we wiped out K8, I'd like to put my eyes on fam10-15 boards. > > Couple questions for board owners: > > First, about asus/kcma-d8 and asus/kgpe-d16: Do these have working S3 > support? I remember rumours they originally worked at some point, but > regressed during the rebase / upstream process. Anyone willing to > bisect/fix it if necessary? > > I am asking, because these are the last two remaining boards with > combination of HAVE_ACPI_RESUME=y and RELOCATABLE_RAMSTAGE=n, and we > have to drag along some back-and-forth memory copy code to keep OS > memory intact for these two. > > Second, I would like to move forwards with AMD fam10 to have > RELOCATABE_RAMSTAGE=y, that would also solve above-mentioned issue and > open up doors for some new features. > > If it was my decision, RELOCATABLE_RAMSTAGE for x86 would be one > criteria to survive the next (October 2018?) release. POSTCAR_STAGE > for May 2019. I am probably too late to make such wishes, but I hope > these will happen in the next two years nevertheless. > > Kyösti > Hi, S3 is __not__ working on my KCMA-D8. The last time I tried, I had to remove the power cord for a couple of seconds to be able to boot again. Interestingly, this issue looks similar to another one I had with a flash chip which seems not to be supported by coreboot. Here the relevant part of the logs regarding the bad chip: Manufacturer: ef SF: Unsupported Winbond ID 4014 SF: Unsupported manufacturer! Coreboot did work well, but froze sometimes when booting during the assigning resources step (more or less exactly after assigning the PCI 14.3 or PNP 002e.2 device, which happen to be close to each other inside the devicetree). I had to remove the power cord in order to be able to boot again (or to get the next random freeze...). Rarely, after such an recovery, I have got flooded by IOMMU warnings in Linux which would only disappear after another reboot. Replacing the chip seems to have solved this random boot freeze problem. But maybe the S3 issue and the issue I had with the wrong chip are related as they both lock down the machine until I remove the power cord. Cheers, Matthias

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Re: [coreboot] wiki backup
by Leah Rowe 15 Jun '18

15 Jun '18

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 On 14/06/18 19:01, Martin Roth wrote: > * When the wiki was started, we didn't really think about > licensing, so most of what's been written needs to be scrapped as > we're not going to go back and contact all of the original authors, > many of whom are no longer part of the project, to see if it's OK > to update the license on their contribution. As we've joined the > SFC and committed to having all of our documentation correctly > licensed with an appropriate license, this means that we'd be > starting over, regardless of whether we stuck with a wiki or > changed to something else. This is also by virtue of the way MediaWiki is designed. > * The wiki requires a separate login from everything else, which > has to be created manually. We've gotten criticism for only > allowing wiki access to "a few coreboot elites". People can sign > up for a gerrit account and contribute to the coreboot > documentation with pretty minimal restrictions. Not only that, but it wasn't clear how to get an account in the first place. By the way, what do you think of the idea I floated in a previous message? My idea is to have some kind of web interface where a non-technical user who doesn't know how to use git can browse the documentation on the website and click "edit", which will take them to the appropriate markdown file in the repository. When they're done, they give their edit a title and description, which becomes the commit message, and their contribution gets sent to code review (Gerrit). How feasible do you think this would be? It would give some of the ease of use of MediaWiki as before, while still having all of the advantages that you listed. -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEE+JRrnG26iGmvPhSA/0W3TPnRz5QFAlsitYoACgkQ/0W3TPnR z5T9tgf/bI99R/vZct45z5PiUjwsfLGAPWRVyI5Eni+rUTV9bjGRSLueCyu0o55n cJjk7Oy6NNlzsKxe5qZOQGXgVvO3XNFfmgIptw6NYL8IIYpcwff0GLxwn4K6BQFL uo0lLb8hNM7H28rOc2hf4p198LeqWGpsgg9CKGKOckZMpmf/AZ+ONltGPRtUYLCD qTuSkA29rPtr3CfIqpLUHGThrpRJBcAYCeOSpDuXwnOewSj3i4WB4jbEjEvXNoIg aHgBcAPx+Ce+xy5MQ7A6PXiRNDWRfRQN6SpOgh+7kMVsbOM+2kOVerJtBKb4G32/ XB+O7NSFaRX1CU8g0NzURtofgMvjXg== =AQkC -----END PGP SIGNATURE-----

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wiki backup
by Leah Rowe 14 Jun '18

14 Jun '18

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Hi, Now that the wiki is being retired, is there a backup of the wiki (database, files etc) so that someone else can host it elsewhere? For archival purposes. - -- Leah Rowe Please help me fund my Gender Reassignment Surgery! https://vimuser.org/surgery/ Libreboot developer and project founder. Use free software. Free as in freedom. https://www.gnu.org/philosophy/free-sw.html Use a free BIOS - https://libreboot.org/ Use a free operating system, GNU+Linux. Support computer user freedom https://sfconservancy.org/ https://fsf.org/ - https://gnu.org/ Minifree Ltd, trading as Ministry of Freedom | Registered in England, No. 9361826 | VAT No. GB202190462 Registered Office: 19 Hilton Road, Canvey Island, Essex SS8 9QA, UK | Web: https://minifree.org/ -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEE+JRrnG26iGmvPhSA/0W3TPnRz5QFAlsgDaoACgkQ/0W3TPnR z5S6SAf+MNJ36qj4FN3P5hnqrSKBwANS3A0J/fUQ2QsITn9DyXXrOlIXqityHcUQ 2nLND77YP4ztaRn9Obrn/2NsN4m6F+xbDY/0QyF7a1XVYL85KPVCAYHbk42yfTUL IKj69mEbOxVs97he2xVrAACsYkWusXcdi86aPLf2RcbltRHd+rfws3FUJW4yrnxI JKizxqydKMF/+Fxz+aoZR2K1hL82W2YGO0/fr6ZlHuZS8L4f8hmpbJGYdPUGcJTc YgWw+4HU9b/Nddv0uhKBNW1WXt0cEGEwweWqguK/Squ2OjBmn0KC4Cto/riuo9o3 kvPWQHMWMiKkebwA2uV5EsSU5NDI2Q== =ZFHp -----END PGP SIGNATURE-----

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coreboot June 2018