coreboot June 2018

coreboot@coreboot.org

40 participants
105 discussions

Re: [coreboot] RV: Error booting with TPM enabled.
by Zaolin 23 Jun '18

23 Jun '18

Hey Jorge, Are you sure that it's the right ACPI path name ? Also can you please provide me your decompiled SSDT so I can check whats going on ? Best Regards, Philipp On 22.06.2018 12:52, Jorge Fernandez Monteagudo wrote: > > Hi, > > > I've found the src/southbridge/amd/pi/hudson/lpc.c, the related to the > AMD Bettong demoboard, and > > 'lpc_acpi_name' and 'lpc_ops' are already defined... Maybe they are > not enabled or used? > > > Thanks! > > > > static const char *lpc_acpi_name(const struct device *dev) > { > if (dev->path.type != DEVICE_PATH_PCI) > return NULL; > > if (dev->path.pci.devfn == LPC_DEVFN) > return "LIBR"; > > return NULL; > } > > static struct device_operations lpc_ops = { > .read_resources = hudson_lpc_read_resources, > .set_resources = hudson_lpc_set_resources, > .enable_resources = hudson_lpc_enable_resources, > #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) > .write_acpi_tables = acpi_write_hpet, > #endif > .init = lpc_init, > .scan_bus = scan_lpc_bus, > .ops_pci = &lops_pci, > .acpi_name = lpc_acpi_name, > }; > > > ------------------------------------------------------------------------ > *De:* Zaolin <zaolin(a)das-labor.org> > *Enviado:* viernes, 22 de junio de 2018 12:26:27 > *Para:* Jorge Fernandez Monteagudo; coreboot(a)coreboot.org > *Asunto:* Re: [coreboot] RV: Error booting with TPM enabled. > > > Hey, > > > you miss the LPC ACPI path for your SoC. > > Just register the acpi_name method: > > > https://review.coreboot.org/#/c/coreboot/+/25534/2/src/soc/intel/fsp_broadw… > > > I hope that helps. > > > > Best Regards, Philipp > > > On 22.06.2018 12:18, Jorge Fernandez Monteagudo wrote: >> Hi all, >> >> I have an AMD Bettong demoboard supported by coreboot and the default >> configuration works ok. >> >> I've been able to boot a debian8 with a 4.17.1 kernel using the >> SeaBios payload. Now I've connected >> >> a TPM 1.2 to the LPC bus and I've done the next changes to the >> coreboot master code >> >> (ae05d095b36ac835a6b1a221e6858065e5486888) >> >> >> --- src/mainboard/amd/bettong/devicetree.cb 2018-05-10 >> 09:39:18.000000000 +0200 >> +++ src/mainboard/amd/bettong/devicetree.cb 2018-06-18 >> 15:13:53.761093194 +0200 >> @@ -52,7 +52,11 @@ >> end >> end # SM >> #device pci 14.2 on end # HDA 0x4383 >> - device pci 14.3 on end # LPC 0x439d >> + device pci 14.3 on # LPC 0x439d >> + chip drivers/pc80/tpm >> + device pnp 0c31.0 on end >> + end # LPC TPM >> + end >> device pci 14.7 on end # SD >> end #chip southbridge/amd/pi/hudson >> >> --- src/mainboard/amd/bettong/Kconfig 2018-05-10 >> 09:39:18.000000000 +0200 >> +++ src/mainboard/amd/bettong/Kconfig 2018-06-18 >> 12:36:10.014905977 +0200 >> @@ -27,7 +27,9 @@ >> select HAVE_ACPI_TABLES >> select BOARD_ROMSIZE_KB_8192 >> select GFXUMA >> - >> + select MAINBOARD_HAS_LPC_TPM >> + select TPM >> + >> config MAINBOARD_DIR >> string >> default amd/bettong >> >> --- src/mainboard/amd/bettong/romstage.c 2018-05-10 >> 09:39:18.000000000 +0200 >> +++ src/mainboard/amd/bettong/romstage.c 2018-06-22 >> 09:57:09.650663554 +0200 >> @@ -24,6 +24,7 @@ >> #include <northbridge/amd/pi/agesawrapper.h> >> #include <northbridge/amd/pi/agesawrapper_call.h> >> #include <southbridge/amd/pi/hudson/hudson.h> >> +#include <security/tpm/tis.h> >> >> void cache_as_ram_main(unsigned long bist, unsigned long >> cpu_init_detectedx) >> { >> @@ -67,6 +68,8 @@ >> post_code(0x41); >> AGESAWRAPPER(amdinitenv); >> >> + init_tpm(false); >> + >> if (acpi_is_wakeup_s4()) { >> outb(0xEE, PM_INDEX); >> outb(0x8, PM_DATA); >> >> >> Now the demoboard boots and a new option for TPM is displayed on >> screen (t for TPM actions), >> >> the grub is loaded ok, but the kernel complains with the next lines >> I've been able to write down >> >> from a pic I took with the phone. >> >> >> object-220) >> ACPI Error: Method parse/execution failed \, AE_NOT_FOUND >> (20180313/psparse-516) >> ACPI Error: Invalid zero thread count in method (20180313/dsmethod-760) >> ACPI Error: Invalid OwnerId: 0x00 (20180313/utownerid-156) >> ACPI Error: AE_NOT_FOUND, (SSDT:COREBOOT) while loading table >> (20180313/tbxfload-197) >> ACPI Error: 1 table load failures, 3 successful (20180313/tbxfload-215) >> ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], >> AE_NOT_FOUND (20180313/psargs-330) >> ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, >> AE_NOT_FOUND (20180313/psparse-516) >> ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], >> AE_NOT_FOUND (20180313/psargs-330) >> ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, >> AE_NOT_FOUND (20180313/psparse-516) >> ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], >> AE_NOT_FOUND (20180313/psargs-330) >> ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, >> AE_NOT_FOUND (20180313/psparse-516) >> acpi PNP0A08:00: Bus 0000:00 not present in PCI namespace >> Loading, please wait... >> >> Anybody could help me to make the board boots again? >> >> >> Regards >> >> Jorge >> >> >> >

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Re: [coreboot] Thinkpad SD card controller DMA
by Nico Huber 22 Jun '18

22 Jun '18

Hi Thomas, On 21.06.2018 22:33, Thomasheidler wrote: > Sounds like disabling the PCIe port of the device is the safest > solution. Will switching the value in the devicetree be enough or is > that too uncertain? I think, I already answered that but you lost the quote: >> If you want to be sure, find research (for exactly your platform) that >> confirms that a given method prevents DMA; or, get a programmable PCIe >> device and test it yourself. There are no shortcuts. Also worth to mention: the settings in the devicetree might only hide the PCIe port and the downstream device. Depending on your OS and the way it handles the IOMMU, that could also make things worse; e.g. the OS might only enable the IOMMU for devices it can see. Nico PS. Please, if you reply to an email, quote the part that you reply to, write your reply below the quote, make sure that your reply makes sense in the context of the quote.

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Re: [coreboot] What happened to the Option ROM options?
by Taiidan＠gmx.com 22 Jun '18

22 Jun '18

Ah oops overlooked this. https://review.coreboot.org/#/c/coreboot/+/2531/ Paging ron minnich! It seems at the end of the comments various people note the mistake however it never got fixed. If this is a mistake I will require someone else to fix it as I am not allowed to contribute on gerrit.

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 22 Jun '18

22 Jun '18

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1393576: Null pointer dereferences (REVERSE_INULL) /src/drivers/i2c/sx9310/sx9310.c: 44 in i2c_sx9310_fill_ssdt() ________________________________________________________________________________________________________ *** CID 1393576: Null pointer dereferences (REVERSE_INULL) /src/drivers/i2c/sx9310/sx9310.c: 44 in i2c_sx9310_fill_ssdt() 38 .mode_10bit = dev->path.i2c.mode_10bit, 39 .speed = config->speed ? : I2C_SPEED_FAST, 40 .resource = scope, 41 }; 42 struct acpi_dp *dsd; 43 >>> CID 1393576: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "config" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. 44 if (!dev->enabled || !scope || !config) 45 return; 46 47 /* Device */ 48 acpigen_write_scope(scope); 49 acpigen_write_device(acpi_device_name(dev)); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V0…

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Re: [coreboot] RV: Error booting with TPM enabled.
by Zaolin 22 Jun '18

22 Jun '18

Hey, you miss the LPC ACPI path for your SoC. Just register the acpi_name method: https://review.coreboot.org/#/c/coreboot/+/25534/2/src/soc/intel/fsp_broadw… I hope that helps. Best Regards, Philipp On 22.06.2018 12:18, Jorge Fernandez Monteagudo wrote: > Hi all, > > I have an AMD Bettong demoboard supported by coreboot and the default > configuration works ok. > > I've been able to boot a debian8 with a 4.17.1 kernel using the > SeaBios payload. Now I've connected > > a TPM 1.2 to the LPC bus and I've done the next changes to the > coreboot master code > > (ae05d095b36ac835a6b1a221e6858065e5486888) > > > --- src/mainboard/amd/bettong/devicetree.cb 2018-05-10 > 09:39:18.000000000 +0200 > +++ src/mainboard/amd/bettong/devicetree.cb 2018-06-18 > 15:13:53.761093194 +0200 > @@ -52,7 +52,11 @@ > end > end # SM > #device pci 14.2 on end # HDA 0x4383 > - device pci 14.3 on end # LPC 0x439d > + device pci 14.3 on # LPC 0x439d > + chip drivers/pc80/tpm > + device pnp 0c31.0 on end > + end # LPC TPM > + end > device pci 14.7 on end # SD > end #chip southbridge/amd/pi/hudson > > --- src/mainboard/amd/bettong/Kconfig 2018-05-10 09:39:18.000000000 > +0200 > +++ src/mainboard/amd/bettong/Kconfig 2018-06-18 12:36:10.014905977 > +0200 > @@ -27,7 +27,9 @@ > select HAVE_ACPI_TABLES > select BOARD_ROMSIZE_KB_8192 > select GFXUMA > - > + select MAINBOARD_HAS_LPC_TPM > + select TPM > + > config MAINBOARD_DIR > string > default amd/bettong > > --- src/mainboard/amd/bettong/romstage.c 2018-05-10 > 09:39:18.000000000 +0200 > +++ src/mainboard/amd/bettong/romstage.c 2018-06-22 > 09:57:09.650663554 +0200 > @@ -24,6 +24,7 @@ > #include <northbridge/amd/pi/agesawrapper.h> > #include <northbridge/amd/pi/agesawrapper_call.h> > #include <southbridge/amd/pi/hudson/hudson.h> > +#include <security/tpm/tis.h> > > void cache_as_ram_main(unsigned long bist, unsigned long > cpu_init_detectedx) > { > @@ -67,6 +68,8 @@ > post_code(0x41); > AGESAWRAPPER(amdinitenv); > > + init_tpm(false); > + > if (acpi_is_wakeup_s4()) { > outb(0xEE, PM_INDEX); > outb(0x8, PM_DATA); > > > Now the demoboard boots and a new option for TPM is displayed on > screen (t for TPM actions), > > the grub is loaded ok, but the kernel complains with the next lines > I've been able to write down > > from a pic I took with the phone. > > > object-220) > ACPI Error: Method parse/execution failed \, AE_NOT_FOUND > (20180313/psparse-516) > ACPI Error: Invalid zero thread count in method (20180313/dsmethod-760) > ACPI Error: Invalid OwnerId: 0x00 (20180313/utownerid-156) > ACPI Error: AE_NOT_FOUND, (SSDT:COREBOOT) while loading table > (20180313/tbxfload-197) > ACPI Error: 1 table load failures, 3 successful (20180313/tbxfload-215) > ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], > AE_NOT_FOUND (20180313/psargs-330) > ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND > (20180313/psparse-516) > ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], > AE_NOT_FOUND (20180313/psargs-330) > ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND > (20180313/psparse-516) > ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], > AE_NOT_FOUND (20180313/psargs-330) > ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND > (20180313/psparse-516) > acpi PNP0A08:00: Bus 0000:00 not present in PCI namespace > Loading, please wait... > > Anybody could help me to make the board boots again? > > > Regards > > Jorge > > >

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RV: Error booting with TPM enabled.
by Jorge Fernandez Monteagudo 22 Jun '18

22 Jun '18

Hi all, I have an AMD Bettong demoboard supported by coreboot and the default configuration works ok. I've been able to boot a debian8 with a 4.17.1 kernel using the SeaBios payload. Now I've connected a TPM 1.2 to the LPC bus and I've done the next changes to the coreboot master code (ae05d095b36ac835a6b1a221e6858065e5486888) --- src/mainboard/amd/bettong/devicetree.cb 2018-05-10 09:39:18.000000000 +0200 +++ src/mainboard/amd/bettong/devicetree.cb 2018-06-18 15:13:53.761093194 +0200 @@ -52,7 +52,11 @@ end end # SM #device pci 14.2 on end # HDA 0x4383 - device pci 14.3 on end # LPC 0x439d + device pci 14.3 on # LPC 0x439d + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end # LPC TPM + end device pci 14.7 on end # SD end #chip southbridge/amd/pi/hudson --- src/mainboard/amd/bettong/Kconfig 2018-05-10 09:39:18.000000000 +0200 +++ src/mainboard/amd/bettong/Kconfig 2018-06-18 12:36:10.014905977 +0200 @@ -27,7 +27,9 @@ select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_8192 select GFXUMA - + select MAINBOARD_HAS_LPC_TPM + select TPM + config MAINBOARD_DIR string default amd/bettong --- src/mainboard/amd/bettong/romstage.c 2018-05-10 09:39:18.000000000 +0200 +++ src/mainboard/amd/bettong/romstage.c 2018-06-22 09:57:09.650663554 +0200 @@ -24,6 +24,7 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <southbridge/amd/pi/hudson/hudson.h> +#include <security/tpm/tis.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -67,6 +68,8 @@ post_code(0x41); AGESAWRAPPER(amdinitenv); + init_tpm(false); + if (acpi_is_wakeup_s4()) { outb(0xEE, PM_INDEX); outb(0x8, PM_DATA); Now the demoboard boots and a new option for TPM is displayed on screen (t for TPM actions), the grub is loaded ok, but the kernel complains with the next lines I've been able to write down from a pic I took with the phone. object-220) ACPI Error: Method parse/execution failed \, AE_NOT_FOUND (20180313/psparse-516) ACPI Error: Invalid zero thread count in method (20180313/dsmethod-760) ACPI Error: Invalid OwnerId: 0x00 (20180313/utownerid-156) ACPI Error: AE_NOT_FOUND, (SSDT:COREBOOT) while loading table (20180313/tbxfload-197) ACPI Error: 1 table load failures, 3 successful (20180313/tbxfload-215) ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], AE_NOT_FOUND (20180313/psargs-330) ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND (20180313/psparse-516) ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], AE_NOT_FOUND (20180313/psargs-330) ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND (20180313/psparse-516) ACPI BIOS Error (bug): Failure looking up [\_SB.PCI0._CRS.TOM1], AE_NOT_FOUND (20180313/psargs-330) ACPI Error: Method parse/execution failed \_SB.PCI0._CRS, AE_NOT_FOUND (20180313/psparse-516) acpi PNP0A08:00: Bus 0000:00 not present in PCI namespace Loading, please wait... Anybody could help me to make the board boots again? Regards Jorge

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Can't sleep/power down after flashing coreboor
by 799 22 Jun '18

22 Jun '18

Hello, I am running Coreboor on my X230 which has Windows 10 and Qubes OS installed. After some issues I was able to run both OSes encrypted and all devices (WiFi/WWAN/...) are working under coreboot. (in Qubes and Windows). Today I found out that I am unable to shutdown or put my laptop to sleep in under Qubes/Linux. It was working before and it is also working under windows (currently). Do you have any idea where to look for a root cause why Linux can't be shutdown. If I try it, the screen will go blank but the system stays up and running. I tried closing the lid and also a shutdown -h now. Regards [799]

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Fixing gitweb links on coreboot.org
by Julius Werner 22 Jun '18

22 Jun '18

Hi coreboot.org admins, For a while now (probably since we switched to the PolyGerrit UI?), the gitweb links on pages like https://review.coreboot.org/admin/projects and https://review.coreboot.org/admin/projects/coreboot,branches have been broken. They link to pages like https://review.coreboot.org/admin/gitweb?p=coreboot.git;a=summary which just says "Server Error: gitweb" and hangs. Instead, we have a perfectly working Cgit implementation at https://review.coreboot.org/cgit/coreboot.git, but you can't find it unless you happen to know the URL or switch back to the old UI. There's not even a link to it on the coreboot.org landing page or https://coreboot.org/developers.html. Can we fix this to make it more discoverable and get rid of the broken links in Gerrit? It keeps tripping me up every time I'm trying to link anyone to coreboot sources...

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Re: [coreboot] Thinkpad SD card controller DMA
by Nico Huber 21 Jun '18

21 Jun '18

On 21.06.2018 13:20, Jose Trujillo via coreboot wrote: > If you don't enable a device in devicetree the initialization routine will not be executed. Interpretation of the devicetree on/off values depends on the chipset code. And even if the chipset code disables (or doesn't enable) some- thing, this might just mean that the device is not visible any more. Beside the IOMMU protection, there are two other options to prevent a PCI device from DMA: 1. The Bus-Master bit in the device' PCI-Command register. Though, enforcement of the bit is implementation specific. 2. Disabling the PCIe port of the chipset / bridge. If this is possible is also implementation specific. > To test just insert a SD card and use DMESG or other command to see if device ID is found, also in device manager in Windows. Alas, a non-functioning device driver is no proof that DMA can't happen. If you want to be sure, find research (for exactly your platform) that confirms that a given method prevents DMA; or, get a programmable PCIe device and test it yourself. There are no shortcuts. Nico

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Re: [coreboot] Equus "WHITEBOX OPEN" servers ship with Coreboot/LinuxBoot
by ron minnich 21 Jun '18

21 Jun '18

i'm going to be talking to them. On Thu, Jun 21, 2018 at 11:36 AM David Hendricks <david.hendricks(a)gmail.com> wrote: > I'm calling shenanigans on this. Their server datasheets pretty clearly > specify an IBV-provided firmware solution, definitely NOT coreboot or > LinuxBoot and definitely NOT open. I did hear thru the grapevine that > they've been in contact with at least one OpenBMC developer, at least. > > So basically this is a lot of misleading marketing BS AFAICT (though I'd > like to be proven wrong). > > On Thu, Jun 21, 2018 at 4:56 AM, Alberto Bursi <alberto.bursi(a)outlook.it> > wrote: > >> There was an announcement [1] about a new line of servers called >> WHITEBOX OPEN (yes, all caps) >> >> which appears to be about servers with Coreboot or Linuxboot and OpenBMC. >> >> Has anyone any experience with this company? >> >> >> -Alberto >> >> 1. https://www.prweb.com/releases/2018/06/prweb15571110.htm >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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coreboot June 2018