coreboot June 2017

coreboot@coreboot.org

57 participants
159 discussions

Re: [coreboot] Can you please send me your Intel ME firmware dump?
by Umang Raghuvanshi 11 Jun '17

11 Jun '17

I believe that the SSIDs aren’t stored in the BIOS ROM. Regardless of that, I managed to reverse-engineer a BIOS update package for my own laptop and managed to extract the MEI firmware. Thanks for the help everyone! Cheers, Umang Raghuvanshi. From: Martin Roth Sent: Sunday, June 11, 2017 11:50 PM To: Persmule Cc: Umang Raghuvanshi; Nicola Corna; coreboot Subject: Re: [coreboot] Can you please send me your Intel ME firmware dump? Also, IIRC, the network drivers communicate with the ME (on some, if not all versions of the ME) so there can be personal data (network SSIDs) saved in your BIOS ROM. If you don't want these to be public, maybe you don't want to post your ME binary. Martin On Sun, Jun 11, 2017 at 5:27 AM, Persmule <persmule(a)gmail.com> wrote: Hi, I could never send you anything extracted from MY flash chip, in order not to violate copyright and similar laws, but I could help you to resolve issues you met when dumping your own flash chip. Could you describe your issues about spi flash dumping? Persmule 在 2017年06月11日 19:09, Umang Raghuvanshi 写道: > Hi, > > I'm a student who aspires to research into the Intel ME firmware - > unfortunately, I was unable to find any dumps of it online. I also tried > to extract it from my own laptop but was unable to do so due to a number > of issues. > > Can you please send me the firmware you dumped from your Lenovo ThinkPad > (as mentioned in your excellent blogpost) - specifically, I'm looking > for the file named factory_x220.bin as mentioned in the aforementioned post. > > I'd be really grateful if you could provide me with this file as it > would greatly assist me in my research. > > Cheers, > Umang Raghuvanshi. -- coreboot mailing list: coreboot(a)coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] soc/amd/stoneyridge
by Paul Menzel 11 Jun '17

11 Jun '17

Dear Marc, Thank you for bringing this up on the coreboot mailing list. Am Dienstag, den 16.05.2017, 22:37 +0000 schrieb Marc Jones: > We want to bring to your attention the following patches, which are the > start of an experiment to move AMD coreboot SOCs to the same structure as > other vendor SOCs. > > https://review.coreboot.org/#/q/topic:soc_stoneyridge > > The goals of the experiments are: > - to correct interfaces for each coreboot stage > - to leverage common coreboot drivers (which require the common soc > structure) > - to correct nagging issues in current implementations (cruft, bit-rot, etc) > - to provide an example for AMD silicon and mainboards moving forward > > We recognize that these changes may not be compatible with the current > binaryPI API (AGESA2008 a.k.a. v5), Could you please elaborate where the API is broken? > so the separation allows current AGESA and binaryPI solutions to be > maintained and developed independently. Once stable, we expect that > changes may be back-ported or older silicon brought up to the new soc > structure. Seeing the lack of manpower for AMD systems, I am concerned about two(?) solutions that need to be maintained. If the current experiment succeeds, there should be a roadmap how the current boards will be ported. Thanks, Paul

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Re: [coreboot] Can you please send me your Intel ME firmware dump?
by Persmule 11 Jun '17

11 Jun '17

Hi, I could never send you anything extracted from MY flash chip, in order not to violate copyright and similar laws, but I could help you to resolve issues you met when dumping your own flash chip. Could you describe your issues about spi flash dumping? Persmule 在 2017年06月11日 19:09, Umang Raghuvanshi 写道: > Hi, > > I'm a student who aspires to research into the Intel ME firmware - > unfortunately, I was unable to find any dumps of it online. I also tried > to extract it from my own laptop but was unable to do so due to a number > of issues. > > Can you please send me the firmware you dumped from your Lenovo ThinkPad > (as mentioned in your excellent blogpost) - specifically, I'm looking > for the file named factory_x220.bin as mentioned in the aforementioned post. > > I'd be really grateful if you could provide me with this file as it > would greatly assist me in my research. > > Cheers, > Umang Raghuvanshi.

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Intel NIC security
by Taiidan＠gmx.com 10 Jun '17

10 Jun '17

Is it worth figuring out how to externally re-flash grey market "intel" nics - or is the onboard NVM flash unable to do anything too terrible? In the newer (the 3 digit i/x series like i350, x540 etc) nics intel has added a "security" flash write protect feature so I imagine their flash stuff isn't as potentially innocent as in the older chips. If so does anyone how to do this? How is this dealt with from a coreboot onboard NIC perspective? Obvious stuff applies, such as a general NIC exploit leading to a WAN>LAN pivot bypassing IOMMU if both WAN and LAN are processed on the same chip but that isn't what I am referring to. You may find this interesting: https://www.servethehome.com/investigating-fake-intel-i350-network-adapters/ When this news first came out there was a conspiracy theory started on the pfsense forums and a lot of smart people bought in to the idea that they were some kind of foreign intelligence agency scheme to spy on american companies (I myself know a few important corps that use DIY routers, so it could be true)

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Re: [coreboot] Dell Precision M4600 support
by Taiidan＠gmx.com 09 Jun '17

09 Jun '17

On 06/09/2017 05:20 PM, Zoran Stojsavljevic wrote: > What was your question here, or I missed something??? ;-) > > Zoran I believe he read the part on the wiki about asking if a pc is supported, it requests one posts that info. OP - it is not supported but you could port it although IMO it wouldn't be worth the effort as you'd have to write code for a new Super I/O as well. I would simply replace it with a comparable ThinkPad W530, and put in the better "thinkpad classic" non-chiclet W520 keyboard/palmrest. It is just as nice and it has better linux support as everyone has one.

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Re: [coreboot] Coreboot + Seabios Asus F2A85-M LE card
by qma ster 09 Jun '17

09 Jun '17

It takes some skill to extract a vgabios from official BIOS image, in some cases (for some types of the official BIOS) it is hardly doable. I recommend that you follow this path - https://www.coreboot.org/VGA_support#Retrieval_via_Linux_kernel Install the official BIOS image again, then boot Linux and extract vgabios using these steps mentioned at the link above. Good luck 2017-06-09 16:41 GMT+03:00 Gabriel Bosque <gabriel.bosque(a)gmail.com>: > Okay. I tried a path, which I thought was the most practical, but I have a > problem: > _I downloaded the .cap file from the card in Asus site > _Using the UEFITool draw for asus.rom > _By using ./bios_extract asus.rom, it gives msg: > Error: Unable to detect BIOS Image type. > Any tips? > > 2017-06-08 12:19 GMT-03:00 Piotr Kubaj <pkubaj(a)anongoth.pl>: >> >> https://www.coreboot.org/VGA_support >> >> On 17-06-08 11:01:55, Gabriel Bosque wrote: >> > Internal. Where do I find firmware for it? >> > >> > Tanks in advance >> > >> > 2017-06-08 10:45 GMT-03:00 Piotr Kubaj <pkubaj(a)anongoth.pl>: >> > >> > > Do you use the internal GPU or external? If you use internal, you >> > > probably >> > > need firmware from AMD (SeaVGABIOS won't work). If you have external >> > > GPU, >> > > you don't need VGA option ROM at all. >> > > >> > > Anyway, you don't need SeaVGABIOS. >> > > >> > > You also put CONFIG_QEMU_HARDWARE=y, which is unnecessary. >> > > >> > >> > -- >> > This message has been scanned for viruses and >> > dangerous content by MailScanner, and is >> > believed to be clean. >> > >> >> -- >> ____________________________________ >> / No matter where I go, the place is \ >> \ always called "here". / >> ------------------------------------ >> \ ^__^ >> \ (oo)\_______ >> (__)\ )\/\ >> ||----w | >> || || > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Dell Precision M4600 support
by Zoran Stojsavljevic 09 Jun '17

09 Jun '17

What was your question here, or I missed something??? ;-) Zoran On Fri, Jun 9, 2017 at 5:22 PM, Valentine Levshuk <valuxin(a)live.com> wrote: > > > 1. Dell Precision M4600 laptop: > > -- CPU: Intel Core i7-2860QM > > -- SouthBridge: Intel Cougar Point QM67 > > -- NorthBridge: Intel Sandy Bridge-MB IMC > > -- MXM 3.0a graphics slot, 2x Mini Pci-e, 1x Mini Pci-e combined with > mSATA, 1x Expresscard slot. > > > > 1. “lspci -tvnn” output: > > > > -[0000:00]-+-00.0 Intel Corporation 2nd Generation Core Processor Family > DRAM Controller [8086:0104] > > +-01.0-[01]--+-00.0 Advanced Micro Devices, Inc. [AMD/ATI] > Venus XTX [Radeon HD 8890M / R9 M275X/M375X] [1002:6820] > > | \-00.1 Advanced Micro Devices, Inc. [AMD/ATI] > Cape Verde/Pitcairn HDMI Audio [Radeon HD 7700/7800 Series] [1002:aab0] > > +-16.0 Intel Corporation 6 Series/C200 Series Chipset Family > MEI Controller #1 [8086:1c3a] > > +-16.3 Intel Corporation 6 Series/C200 Series Chipset Family > KT Controller [8086:1c3d] > > +-19.0 Intel Corporation 82579LM Gigabit Network Connection > [8086:1502] > > +-1a.0 Intel Corporation 6 Series/C200 Series Chipset Family > USB Enhanced Host Controller #2 [8086:1c2d] > > +-1b.0 Intel Corporation 6 Series/C200 Series Chipset Family > High Definition Audio Controller [8086:1c20] > > +-1c.0-[02]-- > > +-1c.2-[03-08]-- > > +-1c.3-[09]----00.0 NEC Corporation uPD720200 USB 3.0 Host > Controller [1033:0194] > > +-1c.4-[0a]----00.0 Broadcom Limited BCM4360 802.11ac Wireless > Network Adapter [14e4:43a0] > > +-1c.7-[0b-12]--+-00.0 O2 Micro, Inc. OZ600 1394a-2000 > Controller [1217:11f7] > > | +-00.1 O2 Micro, Inc. OZ600RJ1/OZ900RJ1 SD/MMC > Card Reader Controller [1217:8320] > > | \-00.2 O2 Micro, Inc. OZ600 MS/xD Controller > [1217:8330] > > +-1d.0 Intel Corporation 6 Series/C200 Series Chipset Family > USB Enhanced Host Controller #1 [8086:1c26] > > +-1f.0 Intel Corporation QM67 Express Chipset Family LPC > Controller [8086:1c4f] > > +-1f.2 Intel Corporation 82801 Mobile SATA Controller [RAID > mode] [8086:282a] > > \-1f.3 Intel Corporation 6 Series/C200 Series Chipset Family > SMBus Controller [8086:1c22] > > > > 1. Superiotools found SMSC FDC37C93xFR > 2. Winbond SOIC8 soldered two flash chips: 1x 8Mb and 1x2Mb – 10240 Kb > in total > 3. Motherboard schematics: https://1drv.ms/b/s! > AooKL5SiajFyioJPEP1Jla85VqPy3w > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot >

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Where to buy the KCMA-D8? *brand new*
by Taiidan＠gmx.com 09 Jun '17

09 Jun '17

Does anyone know? I have checked everywhere I can't find the accessories for the board family either (TPM etc) I would just get another KGPE-D16 but I want to make a router with one of the 35W C32 "EE" opterons and the retail price is a little cheaper. And does anyone know how much longer they are making the KGPE-D16? I wanna buy more before they stop (I could get arm or power, but I still need x86 to play video games) I suppose it is possible to port to another better available similar board like something from supermicro (H8DGI-way, way better specs, first released 2014) but I have no idea how complex that is.

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Re: [coreboot] Coreboot + Seabios Asus F2A85-M LE card
by Piotr Kubaj 09 Jun '17

09 Jun '17

My F2A85-M has UEFI by default, you probably also have UEFI. That means bios_extract won't work. You can keep trying to extract with UEFITool, or try this path https://www.coreboot.org/VGA_support#Retrieval_via_Linux_kernel On 17-06-09 10:41:31, Gabriel Bosque wrote: > Okay. I tried a path, which I thought was the most practical, but I have a > problem: > _I downloaded the .cap file from the card in Asus site > _Using the UEFITool draw for asus.rom > _By using ./bios_extract asus.rom, it gives msg: > Error: Unable to detect BIOS Image type. > Any tips? > > 2017-06-08 12:19 GMT-03:00 Piotr Kubaj <pkubaj(a)anongoth.pl>: > > > https://www.coreboot.org/VGA_support > > > > On 17-06-08 11:01:55, Gabriel Bosque wrote: > > > Internal. Where do I find firmware for it? > > > > > > Tanks in advance > > > > > > 2017-06-08 10:45 GMT-03:00 Piotr Kubaj <pkubaj(a)anongoth.pl>: > > > > > > > Do you use the internal GPU or external? If you use internal, you > > probably > > > > need firmware from AMD (SeaVGABIOS won't work). If you have external > > GPU, > > > > you don't need VGA option ROM at all. > > > > > > > > Anyway, you don't need SeaVGABIOS. > > > > > > > > You also put CONFIG_QEMU_HARDWARE=y, which is unnecessary. > > > > > > > > > > -- > > > This message has been scanned for viruses and > > > dangerous content by MailScanner, and is > > > believed to be clean. > > > > > > > -- > > ____________________________________ > > / No matter where I go, the place is \ > > \ always called "here". / > > ------------------------------------ > > \ ^__^ > > \ (oo)\_______ > > (__)\ )\/\ > > ||----w | > > || || > > > > -- > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. > -- _________________________________ / Tonight's the night: Sleep in a \ \ eucalyptus tree. / --------------------------------- \ ^__^ \ (oo)\_______ (__)\ )\/\ ||----w | || ||

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Re: [coreboot] riscv: How to debug (王翔)
by 王翔 09 Jun '17

09 Jun '17

On Friday,June 9, 2017 at 12:34 PM,王翔 wrote: >On Friday,June 9, 2017 9:17 AM, Jonathan Neuschäfer wrote: >>On Thu, Jun 08, 2017 at 05:32:31PM +0800, 王翔 wrote: >>> I try to debug coreboot with **spike**. >>> I has apply the **8250 usart patch** to **spike**. >>I haven't updated the patches at [1] in a while. Please check if the two >>patches in [2] work for you if you also apply the following patch to >>coreboot: >>------------------------------------------------------------------------ >>diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c >>index 57647fee1d..26ab630091 100644 >>--- a/src/mainboard/emulation/spike-riscv/uart.c >>+++ b/src/mainboard/emulation/spike-riscv/uart.c >>@@ -20,5 +20,5 @@ > >uintptr_t uart_platform_base(int idx) >>{ >>- return (uintptr_t) 0x40001000; >>+ return (uintptr_t) 0x02100000; >>} >>------------------------------------------------------------------------ >>[1]: https://github.com/riscv/riscv-isa-sim/pull/53 >>[2]: https://github.com/neuschaefer/riscv-isa-sim/commits/uart-update >I get source frome https://github.com/riscv/riscv-tools.git. >Compare the difference with https://github.com/riscv/riscv-isa-sim/pull/53 and fix the code. >The difference of Our patch is **UART_BASE**. You use 0x02100000, me use 0x40001000. >In my test 0x40001000 can be work with **coreboot**, but 0x02100000 can not. >My patch is in the attachment of the message. I'm sorry. I not change **uintptr_t uart_platform_base(int idx)** >>> But I get from the official website of the code can not pass the test. >>> I found some BUG when I debug this. >>What did you test? How did it fail? >I test by **spike**. I have report the patch. >https://review.coreboot.org/#/c/20043/ >https://review.coreboot.org/#/c/20105/ But these bugs still exist. >>Regards, >>Jonathan Neuschäfer >Regards, >王翔 Regards, 王翔 ------------------ 王翔安全研究员广州市腾御安信息科技有限公司广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024

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coreboot June 2017