On Friday,June 9, 2017 at 12:34 PM,王翔 wrote:
On Friday,June 9, 2017 9:17 AM, Jonathan Neuschäfer wrote:
On Thu, Jun 08, 2017 at 05:32:31PM +0800, 王翔 wrote:
I try to debug coreboot with **spike**. I has apply the **8250 usart patch** to **spike**.
I haven't updated the patches at [1] in a while. Please check if the two patches in [2] work for you if you also apply the following patch to coreboot:
diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c index 57647fee1d..26ab630091 100644 --- a/src/mainboard/emulation/spike-riscv/uart.c +++ b/src/mainboard/emulation/spike-riscv/uart.c @@ -20,5 +20,5 @@
uintptr_t uart_platform_base(int idx) {
- return (uintptr_t) 0x40001000;
- return (uintptr_t) 0x02100000;
}
I get source frome https://github.com/riscv/riscv-tools.git. Compare the difference with https://github.com/riscv/riscv-isa-sim/pull/53 and fix the code. The difference of Our patch is **UART_BASE**. You use 0x02100000, me use 0x40001000. In my test 0x40001000 can be work with **coreboot**, but 0x02100000 can not. My patch is in the attachment of the message.
I'm sorry. I not change **uintptr_t uart_platform_base(int idx)**
But I get from the official website of the code can not pass the test. I found some BUG when I debug this.
What did you test? How did it fail?
I test by **spike**. I have report the patch. https://review.coreboot.org/#/c/20043/ https://review.coreboot.org/#/c/20105/
But these bugs still exist.
Regards, Jonathan Neuschäfer
Regards, 王翔
Regards, 王翔
------------------
王翔
安全研究员
广州市腾御安信息科技有限公司
广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024
On Fri, Jun 09, 2017 at 12:47:59PM +0800, 王翔 wrote:
On Friday,June 9, 2017 at 12:34 PM,王翔 wrote:
[...]
I get source frome https://github.com/riscv/riscv-tools.git. Compare the difference with https://github.com/riscv/riscv-isa-sim/pull/53 and fix the code. The difference of Our patch is **UART_BASE**. You use 0x02100000, me use 0x40001000. In my test 0x40001000 can be work with **coreboot**, but 0x02100000 can not. My patch is in the attachment of the message.
I'm sorry. I not change **uintptr_t uart_platform_base(int idx)**
I've updated https://github.com/riscv/riscv-isa-sim/pull/53 and uploaded a coreboot patch to use the new UART address¹:
https://review.coreboot.org/#/c/20126/
What did you test? How did it fail?
I test by **spike**. I have report the patch. https://review.coreboot.org/#/c/20043/ https://review.coreboot.org/#/c/20105/
But these bugs still exist.
Thank you for these patches.
Regards, Jonathan Neuschäfer
¹) It wasn't strictly necessary to change the UART address, but I think 0x02100000 fits better into the current address map. The old patch is available at https://github.com/neuschaefer/riscv-isa-sim/commits/uart-old-v1.
-
Jonathan Neuschäfer -
王翔