Hi everbody!
I have a question. Very hope for your help.
When I am compiling the romstage there are 2 errors by the linker:
Undefined refference to 'bootmem_add_range'
Undefined refference to 'lb_new_record' in the imd_cbmem.c file (it is included in src/lib/Makefile.inc romstage).
The definitions of these functions are in lib/bootmem.c and lib/coreboot_table.c accordingly.
But I can't see the inclusion of these files in romstage in src/Makefile.inc (only in ramstage):
ramstage-y += bootmem.c
ramstage-y += coreboot_table.c
How to solve this problem?
The inclusion of these files produces a number of other errors, but nowhere in the code no one does it? Why only I am having this error.
In General, I don't even need these stages (romstage and ramstage) - I want to check the performance on real hardware the work of the bootblock, but the toolchain requires me to compile other stages. And the error occurs even not in my code, but my ignorance.
Thanks a lot!
Regards, Maxim
Hi all,
Does Coreboot write to the flash chip it resides on? Can this be disabled?
Verify of the SPI bios chip fails once the unit has booted up at least once.
Best Regards,
Naveed
Naveed Ghori | Lead Firmware & Driver Engineer
DTI Group Ltd | Transit Security & Surveillance
31 Affleck Road, Perth Airport, Western Australia 6105, Australia
P +61 8 9373 2905,151 | F +61 8 9479 1190 | naveed.ghori(a)dti.com.au<mailto:naveed.ghori@dti.com.au>
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by Raptor Engineering Automated Coreboot Test Stand
The ASUS KFSN4-DRE fails verification for branch master as of commit 601aa313a6b8f5a6055c20a8105118c46a81a28b
The following tests failed:
BOOT_FAILURE
Commits since last successful test:
601aa31 intel/broadwell: Use the correct SATA port config for setting IOBP register
See attached log for details
This message was automatically generated from Raptor Engineering's ASUS KFSN4-DRE test stand
Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html
Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information
Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification
Hi,
I'm trying to get coreboot working with QEMU x86 q36/ich9 but it
is hanging at grub prompt. With coreboot compiled for i440fx/pii4 and '-M pc'
on the qemu command this works fine. Also native SeaBIOS works with
q35 option no problem.
So I'm wondering if anyone has this working. Maybe I'm just missing
some option somewhere? This is on latest git repository and I was sure
this worked at some point (I rolled back to last year and it was still
hanging) but I haven't tried to bisect it yet.
This is my qemu command,
# qemu-system-x86_64 -bios ./coreboot.rom \
-hda /var/lib/libvirt/images/Fedora-test0.img \
-M q35 -m 8G -enable-kvm -smp 1 \
-chardev file,id=debugcon,path=/tmp/bios.log \
-device isa-debugcon,iobase=0x402,chardev=debugcon
Here is my config.
---
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_VENDOR_EMULATION=y
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="emulation/qemu-q35"
CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 q35/ich9"
CONFIG_MAINBOARD_VENDOR="Emulation"
CONFIG_MAX_CPUS=1
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x100000
CONFIG_UART_FOR_CONSOLE=0
CONFIG_PAYLOAD_CONFIGFILE=""
CONFIG_DIMM_SPD_SIZE=256
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_DCACHE_RAM_BASE=0xd0000
CONFIG_DCACHE_RAM_SIZE=0x10000
CONFIG_MMCONF_BASE_ADDRESS=0xb0000000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Emulation"
CONFIG_POST_IO=y
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/emulation/qemu-q35/bootblock.c"
CONFIG_MAX_REBOOT_CNT=3
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_ID_SECTION_OFFSET=0x80
CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y
CONFIG_BOARD_EMULATION_QEMU_X86=y
CONFIG_POST_DEVICE=y
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_TTYS0_LCS=3
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_FMDFILE=""
CONFIG_SEABIOS_PS2_TIMEOUT=0
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_BOARD_ROMSIZE_KB_2048=y
CONFIG_COREBOOT_ROMSIZE_KB_2048=y
CONFIG_COREBOOT_ROMSIZE_KB=2048
CONFIG_ROM_SIZE=0x200000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_HEAP_SIZE=0x4000
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
CONFIG_TTYS0_BASE=0x3f8
CONFIG_EHCI_BAR=0xfef00000
CONFIG_RAMTOP=0x200000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_TTYS0_BAUD=115200
CONFIG_XIP_ROM_SIZE=0x10000
CONFIG_NUM_IPI_STARTS=2
CONFIG_CPU_QEMU_X86=y
CONFIG_UDELAY_IO=y
CONFIG_LOGICAL_CPUS=y
CONFIG_CACHE_AS_RAM=y
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_CPU_MICROCODE_CBFS_NONE=y
CONFIG_VIDEO_MB=0
CONFIG_RAMBASE=0x100000
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_VBOOT_VBNV_OFFSET=0x26
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_PC80_SYSTEM=y
CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS=y
CONFIG_BOOTBLOCK_SIMPLE=y
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_NATIVE_VGA_INIT_USE_EDID=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG=y
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_DRIVERS_UART=y
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
CONFIG_GFX_GMA_INTERNAL_IS_EDP=y
CONFIG_GFX_GMA_INTERNAL_PORT="DP"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_DRIVERS_MC146818=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_STACK_SIZE=0x1000
CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_SERIAL=y
CONFIG_CONSOLE_SERIAL_115200=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CONSOLE_QEMU_DEBUGCON=y
CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_POST_DEVICE_NONE=y
CONFIG_POST_IO_PORT=0x80
CONFIG_HWBASE_DEBUG_CB=y
CONFIG_HAVE_HARD_RESET=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
CONFIG_VGA=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9"
CONFIG_PAYLOAD_SEABIOS=y
CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
CONFIG_SEABIOS_STABLE=y
CONFIG_SEABIOS_BOOTORDER_FILE=""
CONFIG_SEABIOS_DEBUG_LEVEL=-1
CONFIG_PAYLOAD_OPTIONS=""
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_HWBASE_DYNAMIC_MMIO=y
CONFIG_EARLY_CBMEM_INIT=y
CONFIG_BOOTBLOCK_CUSTOM=y
by Raptor Engineering Automated Coreboot Test Stand
The ASUS KGPE-D16 fails verification for branch master as of commit a154a910cb8a611aeb85757f3ca447eeaf75f93e
The following tests failed:
BOOT_FAILURE
Commits since last successful test:
See attached log for details
This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand
Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html
Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information
Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification
I got the info from my .config that UART on this board are 8250 memory
mapped UART instead of typical IO mapped. Looks like grub2 does not support
memory mapped UART.
On Wed, Mar 1, 2017 at 8:51 AM, Gailu Singh <gailu96(a)gmail.com> wrote:
> Hi Experts,
>
> Are UARTs available on Apollo Lake different than traditional 8250 UART?
> Or any specific settings (jumper etc) required to use them?
>
> Problem Statement:
> I am using UART available (through micro USB port) on Leafhill CRB. I am
> able to get coreboot logs but grub fails to detect these uart.
>
> I have following in my grub2.cfg
> serial --speed=115200 --unit=0 --word=8 --parity=no --stop=1
>
> Grub output an error
> serial port COM0 not found
>
> If I change --unit=0 to 1 or 2 grub2 reports similar error
>
> serial port COM1 not found
> serial port COM2 not found
>
>
>
Hi Experts,
Are UARTs available on Apollo Lake different than traditional 8250 UART? Or
any specific settings (jumper etc) required to use them?
Problem Statement:
I am using UART available (through micro USB port) on Leafhill CRB. I am
able to get coreboot logs but grub fails to detect these uart.
I have following in my grub2.cfg
serial --speed=115200 --unit=0 --word=8 --parity=no --stop=1
Grub output an error
serial port COM0 not found
If I change --unit=0 to 1 or 2 grub2 reports similar error
serial port COM1 not found
serial port COM2 not found
