coreboot October 2017

coreboot@coreboot.org

66 participants
140 discussions

coreboot community meeting tomorrow 5pm UTC
by Nico Huber 11 Oct '17

11 Oct '17

Hey coreboot folks, looks like the next community meeting is scheduled for tomorrow. Since Martin doesn't have the time anymore to organize and moderate the mee- ting and nobody has taken over yet, the agenda is still empty. That does not mean that there is nothing to discuss, though ;) I'll add some points right away. If you have anything that you'd like to discuss just add it (see links below). Hear you tomorrow! Nico When: Thu, October 12, 5pm – 6pm UTC Where: https://bluejeans.com/616384323 Phone bridge call in numbers: https://www.bluejeans.com/numbers Meeting ID: 616384323 Current agenda & history: https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics? Full meeting Details on the wiki: https://www.coreboot.org/Coreboot_community_meeting Info about native bluejeans apps: https://www.bluejeans.com/downloads

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Re: [coreboot] greetings and laptop questions
by Jim Hendrick 11 Oct '17

11 Oct '17

Sorry if I triggered the emotional part of this thread! My 2 cents is this - the hardware industry has sacrificed privacy for the sake of enterprise customers (can hardly blame them I suppose) and that has left many of us with very few options. We can compromise on privacy for the latest performance, and take some steps to guard against backdoors (which - at some level - we need to accept that hardware is not actively compromised or we should all go back to slide-rules...) We can insist on the best privacy and accept using (rapidly aging) hardware. I have no hard data on coreboot, Purism, or any of the other tools / products / companies out there. (and hope that that part of this thread has run its course) It does seem to me that in order to even play in the market - that any company would need to take the (reasonably current) hardware that is available and do what it can to minimize the likelihood that the (assumed or proven) backdoors can be exploited. I would like to see any company (Purism, system76 or anyone else) be able to work with the major vendors to acquire hardware AND be able to replace or wrap the compromised firmware to give us the best of both. To the degree that they fully disclose what they are able OR not able to do to mitigate these risks is really between their marketing department and their customers. For myself - I will probably end up with accepting the problems with more recent hardware for functionality and performance and try to use other security / privacy layers to minimize the risk. Sorry for my part of starting this heated debate. And thanks again to all for the insight! Jim On Wed, Oct 11, 2017 at 5:52 PM, Zoran Stojsavljevic < zoran.stojsavljevic(a)gmail.com> wrote: > > let's pause this discussion until the new mailing list is up, and then > move it there, ok? This is not technical > > It's decreasing the signal to noise ratio on this list. > > It is NOT a NOISE, Ron... It is true ESSENCE. Do you, Ron, after all, > think, I am a noise??? INTEL does think I am (fatal mistake). Don't you > agree?? I am, after all, Open Source stray dog... And.. You would like to > understand it?! Don't you?! You are GOOGLE (protected) dog, and INTEL dogs > are trying out there to intercept me... Other stray dogs... .. . :-))) I > laugh... why, Ron??? > > Do you think they are successful?! Really??? > > I am sorry to disappoint you. NO NOISE here... And if you do serve to > INTEL main purposes... DO not distract with tricks, and proxys' to make it > much easier for flock sheep... > > I am not fighting Purism, Ron, mu targets are much higher... Imagine! ;-) > > Don't You agree? > > TRUE essence. For TRUE purposes (I could NOT be blackmailed, never ever)! > > Sorry to be Honest Straight! > Zoran Stojsavljevic > > On Wed, Oct 11, 2017 at 5:43 PM, ron minnich <rminnich(a)gmail.com> wrote: > >> let's pause this discussion until the new mailing list is up, and then >> move it there, ok? This is not technical. It's decreasing the signal to >> noise ratio on this list. >> >> Thanks >> >> On Tue, Oct 10, 2017 at 8:55 PM Zoran Stojsavljevic < >> zoran.stojsavljevic(a)gmail.com> wrote: >> >>> > Sorry for that. My last sentence probably doesn't even express what >>> > I was trying to say. Could be my bad English. >>> >>> Your English is quite good. >>> >>> > I just meant that there are people who are easily offended by >>> dishonesty. >>> >>> Tell me about dishonesty, Nico. What Purism does is just a pebble of >>> sand in the desert of big IT companies' dishonesty! >>> >>> Zoran Stojsavljevic >>> >>> >>> On Wed, Oct 11, 2017 at 12:57 AM, Nico Huber <nico.h(a)gmx.de> wrote: >>> >>>> On 10.10.2017 20:02, Youness Alaoui wrote: >>>> >> So my conclusion, Purism draws customers from other Linux supporting >>>> >> vendors with dishonest marketing. If that doesn't bother you, fine. >>>> >> But please don't get angry if it bothers honest people. >>>> > >>>> > ... >>>> > 3 - By stating that it "bothers honest people", right after saying >>>> > that it doesn't bother me, you're implying that I'm not an honest >>>> > person (at least that's how I read it) and that kind of statement >>>> > doesn't lead to cool headed discussions, so I'll simply withdraw from >>>> > this one. >>>> >>>> Sorry for that. My last sentence probably doesn't even express what >>>> I was trying to say. Could be my bad English. I just meant that there >>>> are people who are easily offended by dishonesty. Well, yeah, it does >>>> imply that I don't count you among them. >>>> >>>> Nico >>>> >>>> -- >>>> coreboot mailing list: coreboot(a)coreboot.org >>>> https://mail.coreboot.org/mailman/listinfo/coreboot >>>> >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://mail.coreboot.org/mailman/listinfo/coreboot >> >> >

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Re: [coreboot] greetings and laptop questions
by Zoran Stojsavljevic 11 Oct '17

11 Oct '17

> let's pause this discussion until the new mailing list is up, and then move it there, ok? This is not technical > It's decreasing the signal to noise ratio on this list. It is NOT a NOISE, Ron... It is true ESSENCE. Do you, Ron, after all, think, I am a noise??? INTEL does think I am (fatal mistake). Don't you agree?? I am, after all, Open Source stray dog... And.. You would like to understand it?! Don't you?! You are GOOGLE (protected) dog, and INTEL dogs are trying out there to intercept me... Other stray dogs... .. . :-))) I laugh... why, Ron??? Do you think they are successful?! Really??? I am sorry to disappoint you. NO NOISE here... And if you do serve to INTEL main purposes... DO not distract with tricks, and proxys' to make it much easier for flock sheep... I am not fighting Purism, Ron, mu targets are much higher... Imagine! ;-) Don't You agree? TRUE essence. For TRUE purposes (I could NOT be blackmailed, never ever)! Sorry to be Honest Straight! Zoran Stojsavljevic On Wed, Oct 11, 2017 at 5:43 PM, ron minnich <rminnich(a)gmail.com> wrote: > let's pause this discussion until the new mailing list is up, and then > move it there, ok? This is not technical. It's decreasing the signal to > noise ratio on this list. > > Thanks > > On Tue, Oct 10, 2017 at 8:55 PM Zoran Stojsavljevic < > zoran.stojsavljevic(a)gmail.com> wrote: > >> > Sorry for that. My last sentence probably doesn't even express what >> > I was trying to say. Could be my bad English. >> >> Your English is quite good. >> >> > I just meant that there are people who are easily offended by >> dishonesty. >> >> Tell me about dishonesty, Nico. What Purism does is just a pebble of sand >> in the desert of big IT companies' dishonesty! >> >> Zoran Stojsavljevic >> >> >> On Wed, Oct 11, 2017 at 12:57 AM, Nico Huber <nico.h(a)gmx.de> wrote: >> >>> On 10.10.2017 20:02, Youness Alaoui wrote: >>> >> So my conclusion, Purism draws customers from other Linux supporting >>> >> vendors with dishonest marketing. If that doesn't bother you, fine. >>> >> But please don't get angry if it bothers honest people. >>> > >>> > ... >>> > 3 - By stating that it "bothers honest people", right after saying >>> > that it doesn't bother me, you're implying that I'm not an honest >>> > person (at least that's how I read it) and that kind of statement >>> > doesn't lead to cool headed discussions, so I'll simply withdraw from >>> > this one. >>> >>> Sorry for that. My last sentence probably doesn't even express what >>> I was trying to say. Could be my bad English. I just meant that there >>> are people who are easily offended by dishonesty. Well, yeah, it does >>> imply that I don't count you among them. >>> >>> Nico >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://mail.coreboot.org/mailman/listinfo/coreboot >>> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot > >

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Re: [coreboot] greetings and laptop questions
by ron minnich 11 Oct '17

11 Oct '17

let's pause this discussion until the new mailing list is up, and then move it there, ok? This is not technical. It's decreasing the signal to noise ratio on this list. Thanks On Tue, Oct 10, 2017 at 8:55 PM Zoran Stojsavljevic < zoran.stojsavljevic(a)gmail.com> wrote: > > Sorry for that. My last sentence probably doesn't even express what > > I was trying to say. Could be my bad English. > > Your English is quite good. > > > I just meant that there are people who are easily offended by > dishonesty. > > Tell me about dishonesty, Nico. What Purism does is just a pebble of sand > in the desert of big IT companies' dishonesty! > > Zoran Stojsavljevic > > > On Wed, Oct 11, 2017 at 12:57 AM, Nico Huber <nico.h(a)gmx.de> wrote: > >> On 10.10.2017 20:02, Youness Alaoui wrote: >> >> So my conclusion, Purism draws customers from other Linux supporting >> >> vendors with dishonest marketing. If that doesn't bother you, fine. >> >> But please don't get angry if it bothers honest people. >> > >> > ... >> > 3 - By stating that it "bothers honest people", right after saying >> > that it doesn't bother me, you're implying that I'm not an honest >> > person (at least that's how I read it) and that kind of statement >> > doesn't lead to cool headed discussions, so I'll simply withdraw from >> > this one. >> >> Sorry for that. My last sentence probably doesn't even express what >> I was trying to say. Could be my bad English. I just meant that there >> are people who are easily offended by dishonesty. Well, yeah, it does >> imply that I don't count you among them. >> >> Nico >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Freedom Inside - certification system
by szbnwer＠gmail.com 11 Oct '17

11 Oct '17

hi all! :) +1 im a newbie around, just silently hunting for knowledge, i still don't even have any hw with core-/libre-boot :/ as this is a huge area with much places to visit for a bit more complete picture and the bestoption for purchase hw its kinda hard to just jump in for newbies who are interested, so it could be really good, and not only for them, but it would make stronger the whole community of free stuffs... this way even a source base could be made (sorry for offering work :D ) for whatever good resources out there - like im a lua fanboy, and they have luadist.org, that is a huge collection of purified and organized goodies mostly from their mailing list, but thats only for the idea. for cb i can image a site where are collected related tech links, for example blogs vendor subpages for detailed tech infos, git pages... this could be an "awesome collection" on github, thats the easiest, or a wiki page, as that is also something easy to make... (ive just replayed to the coreboot(a)coreboot.org address, so if i should go with replay all or whatever else, or theres a policy, then please let me know! btw policy - sorry for my raped english :D ) and thx for everyone around for bringing forward a very hard revolution! i hope in the future i will be able to join with something valuable, im learning much around, currently the most im doing is to spread the verb all around :D

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Re: [coreboot] USB problem with Haswell+LynxPointLP motherboards
by Аладышев Константин 11 Oct '17

11 Oct '17

As I described earlier commit that solves my USB problem is 3d9545c and it was merged in kernel 3.5 So in this terminology: Old kernels: <3.5 Modern kernels: >=3.5 From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] Sent: Tuesday, October 10, 2017 8:03 PM To: Аладышев Константин Cc: coreboot Subject: Re: [coreboot] USB problem with Haswell+LynxPointLP motherboards > Last time I was solving a problem of OS suspend-resume sequence with modern kernels and now it is about working with old kernels Hello Kostja, What is modern kernel, and what is old kernel? Any version/revision examples (you are using), so we can get the/some idea? Thank you, Zoran _______ On Tue, Oct 10, 2017 at 10:14 AM, Аладышев Константин <aladyshev(a)nicevt.ru> wrote: Hello Zoran! Yes, I'm working with the same board, but the problem is different. Last time I was solving a problem of OS suspend-resume sequence with modern kernels and now it is about working with old kernels From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] Sent: Tuesday, October 10, 2017 9:48 AM To: Аладышев Константин Cc: coreboot Subject: Re: [coreboot] USB problem with Haswell+LynxPointLP motherboards Hello Kostja, We already had this discussion a while ago, didn't we? https://mail.coreboot.org/pipermail/coreboot/2016-December/082772.html (BTW, ATOM BYT has exactly the same problem) Zoran On Mon, Oct 9, 2017 at 11:58 AM, Аладышев Константин <aladyshev(a)nicevt.ru> wrote: I try to port coreboot on boards with Haswell CPU and Lynxpoint LP chipset (IBASE IB908AF-4650 board, DFI HU968) and I've encountered a strange problem. USB devices stop working shortly after OS boot (or after USB device replug in OS) with flooding system with messages: hub 1-1:1.0: cannot reset port 5 (err = -110) hub 1-1:1.0: cannot reset port 5 (err = -110) hub 1-1:1.0: Cannot enable port 5. Maybe the USB cable is bad? hub 1-1:1.0: cannot disable port 5 (err = -110) hub 1-1:1.0: connect-debounce failed, port 5 disabled hub 1-1:1.0: unable to enumerate USB device on port 5 hub 1-1:1.0: cannot disable port 5 (err = -110) hub 1-1:1.0: hub_port_status failed (err = -110) hub 1-1:1.0: hub_port_status failed (err = -110) Through some digging I've found out that this problem persist on kernels <3.5. I've investigated this problem more closely and come down to the fact that the kernel commit that solves this problem is: 3d9545c EHCI: maintain the ehci->command value properly https://github.com/torvalds/linux/commit/3d9545cc375d117554a9b35dfddadf9189c 62775?diff=split And now I'm kinda stuck. The effect of this commit doesn't seem to interface with bios for me. So how does original IBASE/DFI bios can overcome code error before this commit? What can be the source of my problem? What should I investigate more precise based on result that I've got? -- coreboot mailing list: coreboot(a)coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot(a)coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

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Fwd: Intel Leaf Hill Coreboot Trouble
by Tahnia Lichtenstein 11 Oct '17

11 Oct '17

Hi Cameron, coreboot, Yes I did indeed intend to reply to all in my previous mail, apologies :) So the previous two messages are now also included in this thread. I've gone through the U-Boot readme and I see what you mean. However, with the uboot patch that Intel provides, the CONFIG_OF_EMBED option is enabled instead of CONFIG_OF_SEPARATE, like the U-Boot instructions suggest. The Intel-provided patch however does not change the manner in which the coreboot payload is included, i.e. the patch does not cause this command to be issued during coreboot build: ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 So after tweaking my U-Boot build to force the include of the coreboot video framebuffer (which I don't think was a problem previously, but it's included explicitly now, just for in case), I built U-Boot and it only produces u-boot.bin, but not u-boot-dtb.bin (contrary to expected result from readme). Thereafter I built coreboot with payload set to "None" via make menuconfig, and thereafter ran the above CBFS command (but using u-boot.bin instead of u-boot-dtb.bin). This build of coreboot + U-Boot still does not detect any USB controller, and I also get the same SPI bus error that you do after running "sf probe", as follows: => usb start starting USB... No controllers found => sf probe 0 Invalid bus 0 (err=-19) Failed to initialize SPI flash at 0:0 (error -19) => sf probe 1 Invalid bus 0 (err=-19) Failed to initialize SPI flash at 0:1 (error -19) So from what I can tell, I did everything the instructions said to propagate the coreboot device tree to U-Boot. Can anybody tell me how do I know whether my coreboot device tree was propagated correctly to my U-Boot payload? Many thanks! Tahnia On Tue, Oct 10, 2017 at 1:43 PM, Cameron Craig <Cameron.Craig(a)exterity.com> wrote: > Hi Tahnia, > > > > Did you mean to reply without including coreboot(a)coreboot.org? If you did > mean to include them I would just reply to my message again, except hit > Reply All J The mailing list may have advice on this > > > > In the meantime, this is what led me to believe it is a device tree issue: > https://github.com/u-boot/u-boot/blob/master/doc/README.x86#L405 > > “With the default configuration, U-Boot is set up to use a separate Device > Tree Blob (dtb).” > > > > We are booting from SPI flash and U-Boot also fails to find it L See log > attached (not that it’s that interesting) > > > > It’s still early days, haven’t looked into this in depth yet. I’m not > ruling out anything at the moment > > > > Cheers, > > Cameron > > > > > > Cameron Craig | Graduate Software Engineer | Exterity Limited > tel: +44 1383 828 250 <+44%201383%20828250> | fax: > e: Cameron.Craig(a)exterity.com | w: www.exterity.com > > > > > *From:* Tahnia Lichtenstein [mailto:unlich@gmail.com] > *Sent:* 10 October 2017 10:06 > *To:* Cameron Craig > *Subject:* Re: [coreboot] Intel Leaf Hill Coreboot Trouble > > > > Hi Cameron, > > > > I may be wrong, but I don't think it is related to the device tree . > > > > The reason is because there is a device tree configured in the coreboot > release (see coreboot\src\mainboard\intel\leafhill\devicetree.cb) and to > the best of my understanding, the device tree information gets passed from > coreboot to the payload during run-time. So I think U-Boot has access to > this device tree. > > > > Another reason is because I connected a SATA SDD to the board, and this > drive is detected by U-Boot... If U-Boot had no device tree, then it would > not be able to detect the SSD, I think. (See attached log for U-Boot serial > output.) > > > > So my thoughts are that it is a USB specific problem in U-Boot... judging > from some U-Boot posts it seems that other people also struggle to get USB > working. So yes, I think you are correct in saying the U-Boot mailing list > is a better place to try solve this USB-related problem :) > > > > I also tried some other self-compiled payloads in the meantime, which I > had different trouble with, and started a new thread for those. > > > > Tahnia > > > > On Fri, Oct 6, 2017 at 5:42 PM, Cameron Craig <Cameron.Craig(a)exterity.com> > wrote: > > Hi Tahnia, > > > I am unfortunately not able to help you, since I myself am still new to > coreboot (and to BIOS development in general). > No worries, we'll get there eventually :) > > > When you ran the Intel-provided version (stitched with the Windows > tool), did you experience any similar problems with the USB controller in > U-Boot? If so, did you manage to solve it? > We are looking at this at the moment. Early investigation suggests that > U-Boot needs a device tree for Leaf Hill. Without that, U-Boot isn't aware > of ant USB controllers, SPI Flash, PCI devices or anything. > That's all I know at the moment, you might be better asking in the U-Boot > mailing list. > > Unfortunately it looks like Intel don't bother providing a device tree for > Leafhill. So we may end up writing our own, which I hear is a bit > pernickety. > > Cheers, > Cameron > > > Cameron Craig | Graduate Software Engineer | Exterity Limited > tel: +44 1383 828 250 | fax: | mobile: > e: Cameron.Craig(a)exterity.com | w: www.exterity.com > > > ______________________________________________________________________ > This email has been scanned by the Symantec Email Security.cloud service. > For more information please visit http://www.symanteccloud.com > ______________________________________________________________________ > > > > > ______________________________________________________________________ > This email has been scanned by the Symantec Email Security.cloud service. > For more information please visit http://www.symanteccloud.com > ______________________________________________________________________ > > > ______________________________________________________________________ > This email has been scanned by the Symantec Email Security.cloud service. > For more information please visit http://www.symanteccloud.com > ______________________________________________________________________ >

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Re: [coreboot] Problems changing payload on Intel Leaf Hill
by Tahnia Lichtenstein 11 Oct '17

11 Oct '17

Thanks for all the replies so far! Many things to consider and try out, I am busy investigating and will get back once I have more details! Much appreciated! Tahnia On Wed, Oct 11, 2017 at 3:35 AM, Melissa Yi <huayi(a)celestica.com> wrote: > Hi Tahnia, > Have you tried 32-bit UEFI payload? I met this problem in Denverton > platfrom too with 64-bitUEFI payload. > > Thanks. > > Regards, > Melissa Yi > > BIOS Lead Engineer > Celestica(Shanghai) R&D Center, China > > www.celestica.com > Solid Partners, Flexible Solutions > > 2017-10-10 16:29 GMT+08:00 Tahnia Lichtenstein <unlich(a)gmail.com>: > >> Hi, >> >> I am trying to build coreboot for the Intel Apollo Lake-I reference board >> (Oxbow Hill, similar to Leaf Hill). >> >> Intel has provided an implementation for this reference board based on an >> outdated coreboot version. >> >> Along with the coreboot implementation, they provided a compatible >> pre-compiled UEFI payload (with no source, but run-time boot menu looks >> like Tianocore's) and a compatible pre-compiled U-Boot payload (with links >> to U-Boot source on Github along with patch so as to reproduce the >> pre-compiled binary). The pre-compiled binaries have associated .config >> files for coreboot integration. When building coreboot with either of the >> precompiled binaries, and stitching the coreboot output binaries together >> with Intel-provided blobs (using Intel provided FIT application) to produce >> the final firmware image, the firmware works as expected. >> >> Then I built this version of coreboot with a self-compiled payload, such >> as Tianocore UDK2017 CorebootPayloadPkg or SeaBIOS, using the .confg files >> provided by Intel for UEFI payloads or legacy payloads respectively (just >> modified for specific payload type and path, and disabling verified and >> measured boot). I stitched the coreboot output with the Intel-provided >> blobs using the exact same method as before. Then, in run-time, coreboot >> transitions to the payload and nothing happens from then on (i.e. no >> further serial debug messages, no change to display monitor). >> >> I also built U-Boot from github, applying Intel's patch to match Intel's >> precompiled binary, and this self-compiled binary works in run-time (well, >> sort of, there are a couple of problems but point is the payload runs). A >> notable build difference is that this build uses the .config file provided >> by Intel as is, and that the payload that was built is the binary >> equivalent of the Intel pre-compiled binary. >> >> Am I not specifying the correct configuration options for Tianocore and >> SeaBIOS? I.e. is there more to it than just selecting the payload type and >> specifying the payload path? Do I need to configure or update memory >> addresses or ranges to match payload sizes, or some such? Do I need to make >> specific changes to the payloads' source code to support the platform? Any >> advice on how/where to start debugging? >> >> (Serial debug logs and .config files attached.) >> >> Best regards, >> Tahnia >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> > >

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Freedom Inside - certification system
by Taiidan＠gmx.com 11 Oct '17

11 Oct '17

In addition to the existing FSF RYF system I propose the creation of a "Freedom Inside" rating and certification system where vendors (now that there are more than a few) can have their products certified by a central body. This would have: Multiple levels of freedom with a clear central website with explanations of what each freedom level is (low, med, high, or something to that effect). Standardized requirements for company marketing Everything agreed upon on by various community experts "request for feedback" Indicators of performance level and market segment on the intel inside style badge placed on every device (eg: the laymen could use an ARM laptop day to day, but has no idea how it compares to an x86 device - nor does he know that $2K is a actually a good deal for performance server hardware) Ease of source-compilation requirement, so that the average power user can easily roll their own (ex: no getting unsigned 5 year old libs from a shady website) I also propose a hardware-freedom-generic mailinglist be created for philosophy debates, "should I buy X?", newbie questions etc moreso now that TALOS 2 is in the picture the hardware freedom world is more than just coreboot so I think it would be a great idea.

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Re: [coreboot] greetings and laptop questions
by Nico Huber 11 Oct '17

11 Oct '17

On 10.10.2017 20:02, Youness Alaoui wrote: >> So my conclusion, Purism draws customers from other Linux supporting >> vendors with dishonest marketing. If that doesn't bother you, fine. >> But please don't get angry if it bothers honest people. > > ... > 3 - By stating that it "bothers honest people", right after saying > that it doesn't bother me, you're implying that I'm not an honest > person (at least that's how I read it) and that kind of statement > doesn't lead to cool headed discussions, so I'll simply withdraw from > this one. Sorry for that. My last sentence probably doesn't even express what I was trying to say. Could be my bad English. I just meant that there are people who are easily offended by dishonesty. Well, yeah, it does imply that I don't count you among them. Nico

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coreboot October 2017