coreboot March 2014

coreboot@coreboot.org

57 participants
180 discussions

Re: [coreboot] I've turned on paging as a test
by Stefan Reinauer 11 Mar '14

11 Mar '14

* ron minnich <rminnich(a)gmail.com> [140310 23:24]: > Which option ROMs? newish ones or 3c509 :-)? Ah well guess I believe you. I > guess I never needed it because in my main uses we did not use or want option > roms -- we loaded Linux and there was no need there. Running some option rom in > an 8086 mode was never desired ... It's all work in progress. One day, and that day may never come, I will have to ask you for that patch that obsoletes option roms. Oh wait. You made that patch already, and the day will come and it's going to be as soon as EFI kicks 16bit OPROMs out of existence. Any generation now. > We've gone backwards in some ways from when Linux was our bootstrap. > > ron Yes, the world became a lot more complicated when we started booting anything but a hand patched single version of Linux on a system not being headless. Unfortunately. That's one thing Apple got right. One firmware, one OS. No messing around with the craziness out there. Stefan

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Re: [coreboot] I've turned on paging as a test
by Stefan Reinauer 10 Mar '14

10 Mar '14

* ron minnich <rminnich(a)gmail.com> [140310 22:43]: > Now you've just made me sad. > > OK, given that in the beginning times we never supplied this little tidbit, who > or what needs it? It looks like another memory turd whose time has gone. > > ron It's needed by some option roms. See void dev_initialize(void) in src/device/device.c Stefan

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Re: [coreboot] I've turned on paging as a test
by Jonathan A. Kollasch 10 Mar '14

10 Mar '14

On Mon, Mar 10, 2014 at 02:43:45PM -0700, ron minnich wrote: > Now you've just made me sad. > > OK, given that in the beginning times we never supplied this little tidbit, > who or what needs it? It looks like another memory turd whose time has gone. > Put it this way, any payload that presents a BIOS or CSM is going to need to populate the BDA where software expects to find it (at 0x400). I've not actually looked in to why coreboot itself cares about the BDA. Perhaps the BDA can be passed to the payload. Jonathan Kollasch

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I've turned on paging as a test
by ron minnich 10 Mar '14

10 Mar '14

And locked out page zero. And we trap. So, first question, can we move X86_BDA_BASE to somewhere other than 0x400? Anyone know? ron

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coreboot GSoC 2014 - Student Application period is open
by Marc Jones 10 Mar '14

10 Mar '14

Students: The GSoC application period has started. Applications are due by March 21 at 19:00 UTC. https://www.google-melange.com/gsoc/org2/google/gsoc2014/coreboot http://www.coreboot.org/GSoC#coreboot_Summer_of_Code_Application Mentors: Please create a connection to coreboot in melange. https://www.google-melange.com/gsoc/connection/pick/google/gsoc2014 Regards, Marc -- http://se-eng.com

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protect flashing
by Marcus Moeller 10 Mar '14

10 Mar '14

Hi all. Is there a way to protect against re-flashing, e.g. by using a password or an encryption key? Greets Marcus

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F2A85-M coreboot not working
by Rostislav Lisovy 10 Mar '14

10 Mar '14

Hello; I am trying to run coreboot on F2A85-M motherboard (without VGA support enabled). The CPU used is AMD Trinity A8-5600K, RAM is Kingston HyperX PnP 4GB (2x2GB) DDR3 1866 (http://www.kingston.com/datasheets/KHX1866C11D3P1K2_4G.pdf). I cloned the coreboot repository and ran 'make menuconfig'. The only options I set were motherboard vendor and type (RAM voltage is the default value of 1.5V). The desired payload is the default SeaBIOS. I have no interest in enabling VGA, thus I did not try to enable it. I used flashrom to flash the image. When I try to boot, execution fails with the following message (full log in the attachment): Enabling resources... Fam15 - domain_enable_resources: AmdInitMid. agesawrapper_amdinitmid Unexpected Exception: 0 @ 10:0022fabf - Halting Code: 0 eflags: 00010046 eax: 0002e630 ebx: 0000014d ecx: 00000002 edx: 00000000 edi: 100123e3 esi: 00000000 ebp: 10000660 esp: 002bcd60 The number on my PCI POST card is "0x1". Unfortunately I have no other RAM modules to try. I tried to change the position from blue slots to black slots but then I got: coreboot-4.0-5584-ge92155f-dirty Sat Mar 1 21:05:40 CET 2014 starting... BSP Family_Model: 00610f01 cpu_init_detectedx = 00000000 agesawrapper_amdinitreset Fch OEM config in INIT RESET Done Got past agesawrapper_amdinitearly ASSERTION FAILED: file 'src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmExcludeDimm.c', line 236 The command 'make crossgcc' also seems not to help at all. I will appreciate any ideas. Regards; Rostislav Lisovy

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Re: [coreboot] qemu
by Peter Stuge 10 Mar '14

10 Mar '14

ron minnich wrote: > I did a clean checkout again, crossgcc again, and it all works now. Now you get to debug it. :p Compare the images, compare object files, compile .xcompiles, maybe try building again swapping the .xcompile, and so on. Or, you can skip the debugging now that it works - then we may never know what happened.. I'm certainly interested in hearing what caused the problem! //Peter

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Re: [coreboot] qemu
by ron minnich 10 Mar '14

10 Mar '14

I did a clean checkout again, crossgcc again, and it all works now. I'm flummoxed. ron On Sun, Mar 9, 2014 at 9:13 PM, David Hubbard < david.c.hubbard+coreboot(a)gmail.com> wrote: > On Sunday, March 09, 2014 08:26:05 PM you wrote: > > On Sunday, March 09, 2014 05:14:51 PM you wrote: > > > Story so far: > > > > > > 1. pick q35 chipset > > > 2. qemu -M q35 etc. etc. > > > > $ qemu-system-i386 -M q35 --bios build/coreboot.rom > > > > -ENOREPRODUCE > > > > > 1. pick i440fx chipset. > > > 2. qemu -M pc etc. etc. > > > > qemu-system-i386 --bios build/coreboot.rom > > > > -ENOREPRODUCE > > > > > Endless repetitions of > > > qemu: unsupported keyboard cmd cmd=0x00 > > > or 0x80 > > > > -ENOREPRODUCE > > > > Same with qemu-kvm. > > > > > This is with crossgcc. > > > I'm disappointed it's this fragile. I'm worried that feature push has > > > gotten ahead of reliability push. > > > > Or your qemu installation is b0rk3d. > > Perhaps if it is that easy to break the installation -- remember, he did a > clean checkout -- then there could be a broken dependency, or something > similar which involves digging deeply into the build system. > > In other words, even if what you say is true, we still need to have this > conversation. > > I feel like Coreboot is a bit fiddly to get set up right. To a degree, > that helps communicate that working with coreboot is hard stuff. But still, > we should implement some better quality controls, imho. > > Hopefully we can figure out what Ron ran into. That would be a good start. > > David >

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Re: [coreboot] Friendly reminder: Please just send plain text messages to the list
by ron minnich 10 Mar '14

10 Mar '14

I think what we need to do is make this thread continue until it has consumed more space then one month's worth of HTML. :-) ron On Mon, Mar 10, 2014 at 8:48 AM, Sam Kuper <sam.kuper(a)uclmail.net> wrote: > On Mar 10, 2014 3:32 PM, "Björn Busse" <mail(a)baerlin.eu> wrote: > > On Mon, Mar 10, 2014 at 04:21:00PM +0100, Peter Stuge wrote: > > > Corey Osgood wrote: > > > > Can you please point me to when this became policy on the coreboot > > > > mailing list? > > > I think it's pretty much a common sense policy on every mailing list. > > +1, Also my understanding. > > The trouble with invoking "common sense" is that what constitutes it isn't > universally agreed. > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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coreboot March 2014