coreboot July 2013

coreboot@coreboot.org

45 participants
108 discussions

Re: [coreboot] Samsung 550 Chromebook own Coreboot
by Aaron Durbin 29 Jul '13

29 Jul '13

On Mon, Jul 29, 2013 at 10:38 AM, John Lewis <jlewis(a)johnlewis.ie> wrote: > My 550 won't boot without the DIMM in, so it sounds like it's not > recognising the embedded memory. OK. That is a good data point. However, I don't know from what code base that original wrapper was built from in order to debug further. Did you save the original rom image that your device was shipped with? I'd be curious to know if that matches the one found in the blobs repo. > > > On 29/07/2013 16:25, Aaron Durbin wrote: > >> On Mon, Jul 29, 2013 at 10:22 AM, Kyösti Mälkki >> <kyosti.malkki(a)gmail.com> wrote: >> >>> Did someone change the SPD eeprom address notation in pei_data from >>> 7-bit to 8-bit addresses? samsung/lumpy/romstage.c : .spd_addresses = { >>> 0x50, 0x00,0xf0,0x00 }, google/stout/romstage.c : spd_addresses: { >>> 0xA0, 0x00,0xA4,0x00 }, >> >> >> The 0xf0 handles the soldered down memory. I was looking at the 0x50 >> address as well, but I think that is correct (I'm looking at code that >> I think is the wrapper that you guys are using). I could be wrong >> though. > > > >

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Fwd: Re: Samsung 550 Chromebook own Coreboot
by John Lewis 29 Jul '13

29 Jul '13

Forgot to cc the list. My 550 won't boot without the DIMM in, so it sounds like it's not recognising the embedded memory. On 29/07/2013 16:25, Aaron Durbin wrote: > On Mon, Jul 29, 2013 at 10:22 AM, Kyösti Mälkki > <kyosti.malkki(a)gmail.com [1]> wrote: > >> Did someone change the SPD eeprom address notation in pei_data from >> 7-bit to 8-bit addresses? samsung/lumpy/romstage.c : .spd_addresses >> = { >> 0x50, 0x00,0xf0,0x00 }, google/stout/romstage.c : spd_addresses: { >> 0xA0, 0x00,0xA4,0x00 }, > The 0xf0 handles the soldered down memory. I was looking at the 0x50 > address as well, but I think that is correct (I'm looking at code > that I > think is the wrapper that you guys are using). I could be wrong > though. Links: ------ [1] mailto:kyosti.malkki@gmail.com

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Re: [coreboot] Samsung 550 Chromebook own Coreboot
by John Lewis 29 Jul '13

29 Jul '13

Where do I find/build cbmem binary? Please find attached dmesg. On 29/07/2013 14:43, Aaron Durbin wrote: > Can you provide the full firmware log and dmesg? 'cbmem -l' should > give you the firmware log. > > On Sun, Jul 28, 2013 at 7:47 AM, John Lewis <jlewis(a)johnlewis.ie> > wrote: > >> Guys, I have noticed that not all the 4 GB or RAM is showing, and I >> get >> this message in the kernel: [ 0.000000] Memory: 1914260k/4200448k >> available (6486k kernel code, 2160136k absent, 126052k reserved, >> 6780k >> data, 1412k init) Any idea what the problem is (mrc.bin), and what I >> might do to workaround? John. -- coreboot mailing list: >> coreboot(a)coreboot.org [1] >> http://www.coreboot.org/mailman/listinfo/coreboot [2] Links: ------ [1] mailto:coreboot@coreboot.org [2] http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Samsung 550 Chromebook own Coreboot
by John Lewis 29 Jul '13

29 Jul '13

Aaron, On 24/07/2013 14:36, Aaron Durbin wrote: > John, > > Are you checking out the blobs repo into 3rdparty? In that repo there > are the following blobs for lumpy: > Yes. > http://review.coreboot.org/gitweb?p=blobs.git;a=tree;f=mainboard/samsung/lu… > > The descriptor and me blobs don't live in cbfs. They live in the rom > but not as cbfs files. > Yeah, I guessed it was something like that. I basically asked Ron that question an hour or so ago but forgot to cc the list. > Offset 0: > descriptor.bin > Offset 0 + sizeof(descriptor.bin): > me.bin > Offset 0 + sizeof(descriptor.bin) + sizeof(me.bin): > Usable rom space for corebot. This should be 6MiB. i.e. descriptor + > me.bin take 2MiB (there is some rounding). > > The mrc.bin needs to be at a fixed location in the address space (and > fixed location in rom) in order to work correctly. > > You will need adjust the CONFIG_ paths in your .config for the build > to work. Looking at src/southbridge/intel/bd82x6x/Makefile.inc I see > CONFIG_HAVE_ME_BIN needs to be set to y and CONFIG_ME_BIN_PATH needs > to be set accordingly like I provided my previous example for > mrc.bin. AFAIK the paths I have are correct since the build finishes without error. > > Could you provide more details of your .config and the location of > the > blobs on your local file system? This sounds like a simple build > issue > in that the pieces aren't being placed in the proper places. I'm > guessing the default path locations in the Kconfigs just don't line > up > correctly -- thus leading to some manual intervention. > Blobs are in 3rdparty/mainboard/samsung/lumpy and 3rdparty/northbridge/intel/sandybridge Here is my .config: # # Automatically generated make config: don't edit # coreboot version: 4.0-4562-g026ff3e # Wed Jul 24 12:57:28 2013 # # # General setup # # CONFIG_EXPERT is not set CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" # CONFIG_ALT_CBFS_LOAD_PAYLOAD is not set CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_SCANBUILD_ENABLE is not set # CONFIG_CCACHE is not set # CONFIG_USE_OPTION_TABLE is not set # CONFIG_COMPRESS_RAMSTAGE is not set # CONFIG_INCLUDE_CONFIG_FILE is not set CONFIG_EARLY_CBMEM_INIT=y # CONFIG_DYNAMIC_CBMEM is not set # CONFIG_COLLECT_TIMESTAMPS is not set CONFIG_USE_BLOBS=y # CONFIG_COVERAGE is not set # # Mainboard # # CONFIG_VENDOR_AAEON is not set # CONFIG_VENDOR_ABIT is not set # CONFIG_VENDOR_ADLINK is not set # CONFIG_VENDOR_ADVANSUS is not set # CONFIG_VENDOR_ADVANTECH is not set # CONFIG_VENDOR_AMD is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_ARIMA is not set # CONFIG_VENDOR_ARTECGROUP is not set # CONFIG_VENDOR_ASI is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_A_TREND is not set # CONFIG_VENDOR_AVALUE is not set # CONFIG_VENDOR_AXUS is not set # CONFIG_VENDOR_AZZA is not set # CONFIG_VENDOR_BACHMANN is not set # CONFIG_VENDOR_BCOM is not set # CONFIG_VENDOR_BIFFEROS is not set # CONFIG_VENDOR_BIOSTAR is not set # CONFIG_VENDOR_BROADCOM is not set # CONFIG_VENDOR_COMPAQ is not set # CONFIG_VENDOR_DIGITALLOGIC is not set # CONFIG_VENDOR_DMP is not set # CONFIG_VENDOR_EAGLELION is not set # CONFIG_VENDOR_ECS is not set # CONFIG_VENDOR_EMULATION is not set # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_IEI is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_IWAVE is not set # CONFIG_VENDOR_IWILL is not set # CONFIG_VENDOR_JETWAY is not set # CONFIG_VENDOR_KONTRON is not set # CONFIG_VENDOR_LANNER is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIPPERT is not set # CONFIG_VENDOR_MITAC is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_NEC is not set # CONFIG_VENDOR_NEWISYS is not set # CONFIG_VENDOR_NOKIA is not set # CONFIG_VENDOR_NVIDIA is not set # CONFIG_VENDOR_PCENGINES is not set # CONFIG_VENDOR_RCA is not set # CONFIG_VENDOR_RODA is not set CONFIG_VENDOR_SAMSUNG=y # CONFIG_VENDOR_SIEMENS is not set # CONFIG_VENDOR_SOYO is not set # CONFIG_VENDOR_SUNW is not set # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_TECHNEXION is not set # CONFIG_VENDOR_TECHNOLOGIC is not set # CONFIG_VENDOR_TELEVIDEO is not set # CONFIG_VENDOR_TI is not set # CONFIG_VENDOR_THOMSON is not set # CONFIG_VENDOR_TRAVERSE is not set # CONFIG_VENDOR_TYAN is not set # CONFIG_VENDOR_VIA is not set # CONFIG_VENDOR_WINENT is not set # CONFIG_VENDOR_WYSE is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_DIR="samsung/lumpy" CONFIG_MAINBOARD_PART_NUMBER="Lumpy" CONFIG_IRQ_SLOT_COUNT=18 CONFIG_MAINBOARD_VENDOR="SAMSUNG" CONFIG_MAX_CPUS=8 CONFIG_RAMTOP=0x200000 CONFIG_HEAP_SIZE=0x4000 CONFIG_RAMBASE=0x100000 CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_VGA_BIOS=y # CONFIG_CONSOLE_POST is not set # CONFIG_UDELAY_IO is not set CONFIG_DCACHE_RAM_BASE=0xff7f0000 CONFIG_DCACHE_RAM_SIZE=0x10000 # CONFIG_SERIAL_CPU_INIT is not set CONFIG_ACPI_SSDTX_NUM=0 CONFIG_VGA_BIOS_FILE="pci8086,0106.rom" # CONFIG_PCI_64BIT_PREF_MEM is not set CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 CONFIG_ID_SECTION_OFFSET=0x80 CONFIG_XIP_ROM_SIZE=0x10000 # CONFIG_BOARD_GOOGLE_BUTTERFLY is not set # CONFIG_BOARD_GOOGLE_LINK is not set # CONFIG_BOARD_GOOGLE_PARROT is not set # CONFIG_BOARD_GOOGLE_PIT is not set # CONFIG_BOARD_GOOGLE_SNOW is not set # CONFIG_BOARD_GOOGLE_STOUT is not set CONFIG_MMCONF_SUPPORT_DEFAULT=y CONFIG_MRC_FILE="3rdparty/northbridge/intel/sandybridge/systemagent-r6.bin" CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_ME_BIN=y # CONFIG_HAVE_GBE_BIN is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Samsung" # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set CONFIG_LOGICAL_CPUS=y CONFIG_IOAPIC=y CONFIG_SMP=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 # CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL is not set # CONFIG_USBDEBUG is not set # CONFIG_K8_REV_F_SUPPORT is not set CONFIG_BOARD_SAMSUNG_LUMPY=y # CONFIG_BOARD_SAMSUNG_STUMPY is not set CONFIG_CPU_ADDR_BITS=32 CONFIG_BOARD_ROMSIZE_KB_8192=y # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set CONFIG_COREBOOT_ROMSIZE_KB_8192=y # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set CONFIG_COREBOOT_ROMSIZE_KB=8192 CONFIG_ROM_SIZE=0x800000 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Lumpy" CONFIG_ARCH_X86=y # CONFIG_ARCH_ARMV7 is not set # # Architecture (x86) # CONFIG_X86_ARCH_OPTIONS=y CONFIG_MARK_GRAPHICS_MEM_WRCOMB=y # CONFIG_AP_IN_SIPI_WAIT is not set # CONFIG_SIPI_VECTOR_IN_ROM is not set CONFIG_STACK_SIZE=0x1000 CONFIG_MAX_REBOOT_CNT=3 CONFIG_NUM_IPI_STARTS=2 CONFIG_X86_BOOTBLOCK_SIMPLE=y # CONFIG_X86_BOOTBLOCK_NORMAL is not set CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c" # CONFIG_UPDATE_IMAGE is not set # CONFIG_ROMCC is not set CONFIG_PC80_SYSTEM=y CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c" # CONFIG_HAVE_CMOS_DEFAULT is not set CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c" CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_HAVE_ARCH_MEMSET=y CONFIG_HAVE_ARCH_MEMCPY=y CONFIG_HAVE_ARCH_MEMMOVE=y # # Chipset # # # CPU # CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c" CONFIG_SOCKET_SPECIFIC_OPTIONS=y CONFIG_CPU_SPECIFIC_OPTIONS=y # CONFIG_CPU_AMD_AGESA is not set CONFIG_HAVE_INIT_TIMER=y CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0 CONFIG_CPU_INTEL_MODEL_206AX=y CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_ENABLE_VMX=y CONFIG_MICROCODE_INCLUDE_PATH="src/cpu/intel/model_206ax" CONFIG_SSE2=y CONFIG_CPU_INTEL_SOCKET_RPGA989=y CONFIG_CACHE_MRC_BIN=y # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set CONFIG_UDELAY_LAPIC=y # CONFIG_LAPIC_MONOTONIC_TIMER is not set # CONFIG_UDELAY_TSC is not set # CONFIG_UDELAY_TIMER2 is not set # CONFIG_TSC_CALIBRATE_WITH_IO is not set # CONFIG_TSC_SYNC_LFENCE is not set CONFIG_TSC_SYNC_MFENCE=y CONFIG_CACHE_ROM=y CONFIG_SMM_TSEG=y # CONFIG_SMM_MODULES is not set # CONFIG_X86_AMD_FIXED_MTRRS is not set # CONFIG_CAR_MIGRATION is not set CONFIG_CACHE_AS_RAM=y CONFIG_AP_SIPI_VECTOR=0xfffff000 CONFIG_MMX=y CONFIG_SSE=y CONFIG_CPU_MICROCODE_IN_CBFS=y CONFIG_CPU_MICROCODE_CBFS_GENERATE=y # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set # CONFIG_CPU_MICROCODE_CBFS_NONE is not set # # Northbridge # CONFIG_VIDEO_MB=0 # CONFIG_NORTHBRIDGE_AMD_AGESA is not set # CONFIG_AMD_NB_CIMX is not set # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y CONFIG_CACHE_MRC_SIZE_KB=256 CONFIG_MRC_CACHE_BASE=0xff800000 CONFIG_EXTERNAL_MRC_BLOB=y CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x4000 CONFIG_HAVE_MRC=y CONFIG_CBFS_SIZE=0x400000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_MAX_PIRQ_LINKS=4 # # Southbridge # CONFIG_EHCI_BAR=0xfef00000 CONFIG_EHCI_DEBUG_OFFSET=0xa0 # CONFIG_AMD_SB_CIMX is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set CONFIG_SPI_FLASH=y CONFIG_AMD_SB_SPI_TX_LEN=4 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y CONFIG_SOUTH_BRIDGE_OPTIONS=y # CONFIG_SERIRQ_CONTINUOUS_MODE is not set # CONFIG_BUILD_WITH_FAKE_IFD is not set CONFIG_IFD_BIN_PATH="3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin" CONFIG_ME_BIN_PATH="3rdparty/mainboard/$(MAINBOARDDIR)/me.bin" # CONFIG_LOCK_MANAGEMENT_ENGINE is not set # CONFIG_LOCK_SPI_ON_RESUME is not set # # Super I/O # CONFIG_SUPERIO_SMSC_MEC1308=y # # Embedded Controllers # CONFIG_EC_SMSC_MEC1308=y # # Devices # # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set # CONFIG_MULTIPLE_VGA_ADAPTERS is not set CONFIG_PCI=y # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_AGP_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_ASPM=y CONFIG_PCI_BUS_SEGN_BITS=0 # # VGA BIOS # # # PXE ROM # # CONFIG_PXE_ROM is not set # # Generic Drivers # # CONFIG_ELOG is not set CONFIG_DRIVERS_GENERIC_IOAPIC=y # CONFIG_IPMI_KCS is not set # CONFIG_DRIVER_MAXIM_MAX77686 is not set # CONFIG_DRIVERS_OXFORD_OXPCIE is not set # CONFIG_DRIVER_PARADE_PS8625 is not set CONFIG_TPM=y CONFIG_RTL8168_ROM_DISABLE=y CONFIG_DRIVERS_SIL_3114=y # CONFIG_SPI_FLASH_SMM is not set CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_DRIVER_TI_TPS65090 is not set CONFIG_MMCONF_SUPPORT=y # # Console # CONFIG_EARLY_CONSOLE=y # CONFIG_CONSOLE_SERIAL is not set # CONFIG_SPKMODEM is not set CONFIG_HAVE_USBDEBUG=y # CONFIG_CONSOLE_NE2K is not set # CONFIG_CONSOLE_CBMEM is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set # CONFIG_CONSOLE_LOGBUF is not set # CONFIG_NO_POST is not set # CONFIG_CMOS_POST is not set CONFIG_IO_POST=y CONFIG_IO_POST_PORT=0x80 CONFIG_HAVE_UART_IO_MAPPED=y # CONFIG_HAVE_UART_MEMORY_MAPPED is not set # CONFIG_HAVE_UART_SPECIAL is not set CONFIG_HAVE_ACPI_RESUME=y # CONFIG_HAVE_ACPI_SLIC is not set CONFIG_HAVE_HARD_RESET=y # CONFIG_HAVE_MONOTONIC_TIMER is not set CONFIG_HAVE_OPTION_TABLE=y # CONFIG_PIRQ_ROUTE is not set CONFIG_HAVE_SMI_HANDLER=y # CONFIG_PCI_IO_CFG_EXT is not set CONFIG_CACHE_ROM_SIZE=0x400000 CONFIG_USE_WATCHDOG_ON_BOOT=y # CONFIG_VGA is not set CONFIG_GFXUMA=y # CONFIG_RELOCATABLE_MODULES is not set CONFIG_HAVE_ACPI_TABLES=y # # System tables # CONFIG_MULTIBOOT=y CONFIG_GENERATE_ACPI_TABLES=y CONFIG_GENERATE_MP_TABLE=y # CONFIG_GENERATE_PIRQ_TABLE is not set CONFIG_GENERATE_SMBIOS_TABLES=y # # Payload # # CONFIG_PAYLOAD_NONE is not set # CONFIG_PAYLOAD_ELF is not set CONFIG_PAYLOAD_SEABIOS=y # CONFIG_PAYLOAD_FILO is not set # CONFIG_PAYLOAD_TIANOCORE is not set CONFIG_SEABIOS_STABLE=y # CONFIG_SEABIOS_MASTER is not set CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf" # CONFIG_COMPRESSED_PAYLOAD_LZMA is not set # CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set # # Debugging # # CONFIG_GDB_STUB is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_HAVE_DEBUG_RAM_SETUP is not set # CONFIG_HAVE_DEBUG_CAR is not set # CONFIG_HAVE_DEBUG_SMBUS is not set # CONFIG_DEBUG_SMI is not set # CONFIG_DEBUG_SMM_RELOCATION is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_ACPI is not set # CONFIG_DEBUG_TPM is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_INTEL_ME is not set # CONFIG_TRACE is not set # CONFIG_RAMINIT_SYSINFO is not set # CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set CONFIG_CHROMEOS=y # # ChromeOS # CONFIG_VBNV_OFFSET=0x26 CONFIG_VBNV_SIZE=0x10 # CONFIG_CHROMEOS_RAMOOPS is not set CONFIG_FLASHMAP_OFFSET=0x00610000 # CONFIG_VBOOT_VERIFY_FIRMWARE is not set # CONFIG_NO_TPM_RESUME is not set > -Aaron > > On Wed, Jul 24, 2013 at 6:30 AM, John Lewis <jlewis(a)johnlewis.ie> > wrote: > >> Well, that didn't work, although the fan briefly span up, which I >> didn't notice before. I also tried building your beloved Parrot, and >> that is missing me.bin too. On 24/07/2013 11:26, John Lewis wrote: >> >>> I realise that this may well not work for reasons I don't >>> understand, >>> but I have manually added the me.bin file to coreboot.rom using >>> cbfstool. Worth a try, I thought. On 24/07/2013 07:38, ron minnich >>> wrote: >>> >>>> On Tue, Jul 23, 2013 at 9:44 PM, Peter Stuge <peter(a)stuge.se >>>> [1][1]> wrote: >>>> >>>>> I guess eliminating that deployment/release process completely is >>>>> the reason to just always work directly upstream. >>>> well, that deploy/release process is not going to be eliminated. >>>> I'm just working on some ideas to make things better in the >>>> context >>>> of that process, which I think is doable. I'm just grateful John >>>> is >>>> a patient and reasonable guy :-) ron >> -- coreboot mailing list: coreboot(a)coreboot.org [2] >> http://www.coreboot.org/mailman/listinfo/coreboot [3]

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Re: [coreboot] Samsung 550 Chromebook own Coreboot
by John Lewis 29 Jul '13

29 Jul '13

Right, here is cbmem console output, which was "-c" not "-l". As you can see, it says fairly early on it recognises 2GB not 4. It's not exactly verbose about why. I also noticed later in the dmesg output that "[ 1.071359] [drm] Memory usable by graphics device = 2048M", that doesn't mean it's reserved, does it? On 29/07/2013 15:31, Aaron Durbin wrote: > It's under the 'util' directory in the coreboot repository: > > http://review.coreboot.org/gitweb?p=coreboot.git;a=tree;f=util/cbmem;h=14fb… > > From this: > [ 0.000000] e820: BIOS-provided physical RAM map: > [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] > usable > [ 0.000000] BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000001fffffff] > usable > [ 0.000000] BIOS-e820: [mem 0x0000000020000000-0x00000000201fffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x0000000020200000-0x000000003fffffff] > usable > [ 0.000000] BIOS-e820: [mem 0x0000000040000000-0x00000000401fffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x0000000040200000-0x000000007c6dffff] > usable > [ 0.000000] BIOS-e820: [mem 0x000000007c6e0000-0x000000007f1fffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] > reserved > [ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x00000001005fffff] > usable > > Adding up the reported usable memory should jive with your > expectations. As for needing console, yes, you will need to compile > with console. > > CONFIG_EARLY_CBMEM_INIT=y > CONFIG_CONSOLE_CBMEM=y > > On Mon, Jul 29, 2013 at 9:19 AM, John Lewis <jlewis(a)johnlewis.ie> > wrote: > >> Where do I find/build cbmem binary? Please find attached dmesg. On >> 29/07/2013 14:43, Aaron Durbin wrote: >> >>> Can you provide the full firmware log and dmesg? 'cbmem -l' should >>> give you the firmware log. On Sun, Jul 28, 2013 at 7:47 AM, John >>> Lewis <jlewis(a)johnlewis.ie [3]> wrote: >>> >>>> Guys, I have noticed that not all the 4 GB or RAM is showing, and >>>> I >>>> get this message in the kernel: [ 0.000000] Memory: >>>> 1914260k/4200448k available (6486k kernel code, 2160136k absent, >>>> 126052k reserved, 6780k data, 1412k init) Any idea what the >>>> problem >>>> is (mrc.bin), and what I might do to workaround? John. -- coreboot >>>> mailing list: coreboot(a)coreboot.org [1] [1] >>>> http://www.coreboot.org/mailman/listinfo/coreboot [2] [2] >> Links: ------ [1] mailto:coreboot@coreboot.org [4] [2] >> http://www.coreboot.org/mailman/listinfo/coreboot [5] Links: ------ [1] mailto:coreboot@coreboot.org [2] http://www.coreboot.org/mailman/listinfo/coreboot [3] mailto:jlewis@johnlewis.ie [4] mailto:coreboot@coreboot.org [5] http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Samsung 550 Chromebook own Coreboot
by John Lewis 29 Jul '13

29 Jul '13

Guys, I have noticed that not all the 4 GB or RAM is showing, and I get this message in the kernel: [ 0.000000] Memory: 1914260k/4200448k available (6486k kernel code, 2160136k absent, 126052k reserved, 6780k data, 1412k init) Any idea what the problem is (mrc.bin), and what I might do to workaround? John.

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Looking for dediprog users...
by Stefan Tauner 29 Jul '13

29 Jul '13

hi, if you are using an sf100 with a firmware version between 2.1.1 and 5.1.2 (non-inclusive), I would like to know from you if flashrom version r1649 or newer works for you or not. Probing for a chip (even if there is none attached) suffices as a test. Apparently earlier versions do not support setting the spi clock rate, but we always do that (since r1649) and fail programmer initialization on those versions. I try to find out which versions support setting the speed. BTW did anybody try to contact dediprog and request any information that would help flashrom to support their programmers better? I would also like to know if any dediprog sf300 or sf600 users are reading this and would like to see support for it in flashrom. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Open Radeon video bios created
by ossatombios＠arcor.de 28 Jul '13

28 Jul '13

Hi, there is open source video bios for Radeon http://sourceforge.net/projects/openradeonbios/ eisenhart

1 0

looking for a decent coreboot notebook
by Eugen Leitl 28 Jul '13

28 Jul '13

I see that X60x (X60, X60s, T60 and T60p) are supported. Before I run out and try to get an X60 or T60, is there a chance that R60 (a budget version of T60 which I happen to have) is supported but unlisted? Alternatively, how well is http://www.chromium.org/chromium-os/developer-information-for-chrome-os-dev… supported, in comparison to the X60x coreboot?

2 1

Well supported energy efficient HTPC motherboard
by Oliver Schinagl 28 Jul '13

28 Jul '13

Hey all, from time to time I see the question pop up, which motherboard is recommended or what laptop is most recommended for coreboot. What I haven't seen is a suggestion for an energy efficient HTPC. While one would expect an arm box for this, I still fail to see really well supported fully open systems. I guess the Raspberry Pi comes closest. I see E-350 boards and F2A85 boards as being WiP/Supported but hold those the recommendations? Personally for me, it has to be an AMD board, but I can understand intel recommendations being interesting for other readers. Oliver

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coreboot July 2013