coreboot March 2013

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New patch to review for coreboot: 3881a18 AMD UnionStation: Use SPD read code from F14 wrapper
by Kimarie Hoot 07 Mar '13

07 Mar '13

Kimarie Hoot (kimarie.hoot(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2609 -gerrit commit 3881a18bd53ee5f0fbb8777433a8915c92b04c5c Author: Kimarie Hoot <kimarie.hoot(a)se-eng.com> Date: Thu Mar 7 09:10:29 2013 -0700 AMD UnionStation: Use SPD read code from F14 wrapper Changes: - Get rid of the union_station mainboard specific code and uses the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: I19d6b0d674b67294519383f80928471b37da1e14 Signed-off-by: Kimarie Hoot <kimarie.hoot(a)se-eng.com> --- src/mainboard/amd/union_station/BiosCallOuts.c | 8 +- src/mainboard/amd/union_station/Makefile.inc | 2 - src/mainboard/amd/union_station/devicetree.cb | 7 ++ src/mainboard/amd/union_station/dimmSpd.c | 167 ------------------------- src/mainboard/amd/union_station/dimmSpd.h | 63 ---------- src/mainboard/amd/union_station/mainboard.c | 12 +- 6 files changed, 24 insertions(+), 235 deletions(-) diff --git a/src/mainboard/amd/union_station/BiosCallOuts.c b/src/mainboard/amd/union_station/BiosCallOuts.c index 6059549..622c411 100644 --- a/src/mainboard/amd/union_station/BiosCallOuts.c +++ b/src/mainboard/amd/union_station/BiosCallOuts.c @@ -19,10 +19,10 @@ #include "agesawrapper.h" #include "amdlib.h" -#include "dimmSpd.h" #include "BiosCallOuts.h" #include "heapManager.h" #include "SB800.h" +#include <northbridge/amd/agesa/family14/dimmSpd.h> STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -424,7 +424,11 @@ AGESA_STATUS BiosReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; - Status = AmdMemoryReadSPD (Func, Data, (AGESA_READ_SPD_PARAMS *)ConfigPtr); +#ifdef __PRE_RAM__ + Status = agesa_ReadSPD (Func, Data, ConfigPtr); +#else + Status = AGESA_UNSUPPORTED; +#endif return Status; } diff --git a/src/mainboard/amd/union_station/Makefile.inc b/src/mainboard/amd/union_station/Makefile.inc index 50f9447..59c6cd0 100644 --- a/src/mainboard/amd/union_station/Makefile.inc +++ b/src/mainboard/amd/union_station/Makefile.inc @@ -19,13 +19,11 @@ romstage-y += buildOpts.c romstage-y += agesawrapper.c -romstage-y += dimmSpd.c romstage-y += BiosCallOuts.c romstage-y += PlatformGnbPcie.c ramstage-y += buildOpts.c ramstage-y += agesawrapper.c -ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb index 7f06e64..2289126 100644 --- a/src/mainboard/amd/union_station/devicetree.cb +++ b/src/mainboard/amd/union_station/devicetree.cb @@ -75,6 +75,13 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.3 on end device pci 18.4 on end device pci 18.5 on end + + register "spdAddrLookup" = " + { + { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses + { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses + }" + end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/union_station/dimmSpd.c b/src/mainboard/amd/union_station/dimmSpd.c deleted file mode 100644 index e1586b0..0000000 --- a/src/mainboard/amd/union_station/dimmSpd.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" -#include "OEM.h" /* SMBUS0_BASE_ADDRESS */ - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info); -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) - -/*#pragma optimize ("", off) // for source level debug -*--------------------------------------------------------------------------- -* -* SPD address table - porting required -*/ - -static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm - { - // socket 0 - { - {0xA0, 0xA2}, // channel 0 dimms - {0x00, 0x00}, // channel 1 dimms - }, - // socket 1 - { - {0x00, 0x00}, // channel 0 dimms - {0x00, 0x00}, // channel 1 dimms - }, - }; - -/*----------------------------------------------------------------------------- - * - * readSmbusByteData - read a single SPD byte from any offset - */ - -static int readSmbusByteData (int iobase, int address, char *buffer, int offset) - { - unsigned int status; - UINT64 limit; - - address |= 1; // set read bit - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 1, 0x1F); // clear error status - __outbyte (iobase + 3, offset); // offset in eeprom - __outbyte (iobase + 4, address); // slave address and read bit - __outbyte (iobase + 2, 0x48); // read byte command - - // time limit to avoid hanging for unexpected error status (should never happen) - limit = __rdtsc () + 2000000000 / 10; - for (;;) - { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; - } - -/*----------------------------------------------------------------------------- - * - * readSmbusByte - read a single SPD byte from the default offset - * this function is faster function readSmbusByteData - */ - -static int readSmbusByte (int iobase, int address, char *buffer) - { - unsigned int status; - UINT64 limit; - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 2, 0x44); // read command - - // time limit to avoid hanging for unexpected error status - limit = __rdtsc () + 2000000000 / 10; - for (;;) - { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; - } - -/*--------------------------------------------------------------------------- - * - * readspd - Read one or more SPD bytes from a DIMM. - * Start with offset zero and read sequentially. - * Optimization relies on autoincrement to avoid - * sending offset for every byte. - * Reads 128 bytes in 7-8 ms at 400 KHz. - */ - -static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count) - { - int index, error; - - /* read the first byte using offset zero */ - error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0); - if (error) return error; - - /* read the remaining bytes using auto-increment for speed */ - for (index = 1; index < count; index++) - { - error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]); - if (error) return error; - } - - return 0; - } - -static void writePmReg (int reg, int data) - { - __outbyte (0xCD6, reg); - __outbyte (0xCD7, data); - } - -static void setupFch (int ioBase) - { - writePmReg (0x2D, ioBase >> 8); - writePmReg (0x2C, ioBase | 1); - writePmReg (0x29, 0x80); - writePmReg (0x28, 0x61); - __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz - } - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) - { - int spdAddress, ioBase; - - if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR; - if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR; - - spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId]; - if (spdAddress == 0) return AGESA_ERROR; - ioBase = SMBUS0_BASE_ADDRESS; - setupFch (ioBase); - return readspd (ioBase, spdAddress, (void *) info->Buffer, 128); - } diff --git a/src/mainboard/amd/union_station/dimmSpd.h b/src/mainboard/amd/union_station/dimmSpd.h deleted file mode 100644 index 81ab02e..0000000 --- a/src/mainboard/amd/union_station/dimmSpd.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#ifndef _DIMMSPD_H_ -#define _DIMMSPD_H_ - -#include "Porting.h" -#include "AGESA.h" - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -AGESA_STATUS -AmdMemoryReadSPD ( - IN UINT32 Func, - IN UINT32 Data, - IN OUT AGESA_READ_SPD_PARAMS *SpdData - ); - -/*--------------------------------------------------------------------------------------- - * L O C A L F U N C T I O N S - *--------------------------------------------------------------------------------------- - */ - -#endif diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 916b62e..76e5ae3 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -22,8 +22,9 @@ #include <device/pci.h> #include <arch/io.h> #include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> +#include <southbridge/amd/sb800/sb800.h> +#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ void set_pcie_reset(void); @@ -52,6 +53,15 @@ void set_pcie_dereset(void) static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the persimmon + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = {

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Patch set updated for coreboot: e6acefb Eliminate do_div().
by Stefan Reinauer 07 Mar '13

07 Mar '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2606 -gerrit commit e6acefb12b474eeb9c804e9f42f2983908673e48 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Mar 6 20:43:55 2013 -0800 Eliminate do_div(). This eliminates the use of do_div() in favor of using libgcc functions. This was tested by building and booting on Google Snow (ARMv7) and Qemu (x86). printk()s which use division in vtxprintf() look good. Change-Id: Icad001d84a3c05bfbf77098f3d644816280b4a4d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- src/arch/armv7/include/div64.h | 233 ---------------------------------------- src/arch/armv7/lib/Makefile.inc | 2 - src/arch/armv7/lib/div64.S | 208 ----------------------------------- src/arch/x86/Makefile.inc | 8 +- src/arch/x86/include/div64.h | 30 ------ src/console/vtxprintf.c | 17 +-- src/cpu/x86/smm/Makefile.inc | 4 +- src/lib/Makefile.inc | 2 + 9 files changed, 11 insertions(+), 495 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 0595ae2..8f9915f 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -124,7 +124,7 @@ endif $(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group else $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif diff --git a/src/arch/armv7/include/div64.h b/src/arch/armv7/include/div64.h deleted file mode 100644 index 5baed2b..0000000 --- a/src/arch/armv7/include/div64.h +++ /dev/null @@ -1,233 +0,0 @@ -/* taken from linux 2.6.31.14 */ - -#ifndef __ASM_ARM_DIV64 -#define __ASM_ARM_DIV64 - -//#include <asm/system.h> -//#include <linux/types.h> -// FIXME - -#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" -#define __LINUX_ARM_ARCH__ 7 - -/* - * The semantics of do_div() are: - * - * uint32_t do_div(uint64_t *n, uint32_t base) - * { - * uint32_t remainder = *n % base; - * *n = *n / base; - * return remainder; - * } - * - * In other words, a 64-bit dividend with a 32-bit divisor producing - * a 64-bit result and a 32-bit remainder. To accomplish this optimally - * we call a special __do_div64 helper with completely non standard - * calling convention for arguments and results (beware). - */ - -#ifdef __ARMEB__ -#define __xh "r0" -#define __xl "r1" -#else -#define __xl "r0" -#define __xh "r1" -#endif - -#define __do_div_asm(n, base) \ -({ \ - register unsigned int __base asm("r4") = base; \ - register unsigned long long __n asm("r0") = n; \ - register unsigned long long __res asm("r2"); \ - register unsigned int __rem asm(__xh); \ - asm( __asmeq("%0", __xh) \ - __asmeq("%1", "r2") \ - __asmeq("%2", "r0") \ - __asmeq("%3", "r4") \ - "bl __do_div64" \ - : "=r" (__rem), "=r" (__res) \ - : "r" (__n), "r" (__base) \ - : "ip", "lr", "cc"); \ - n = __res; \ - __rem; \ -}) - -#if __GNUC__ < 4 - -/* - * gcc versions earlier than 4.0 are simply too problematic for the - * optimized implementation below. First there is gcc PR 15089 that - * tend to trig on more complex constructs, spurious .global __udivsi3 - * are inserted even if none of those symbols are referenced in the - * generated code, and those gcc versions are not able to do constant - * propagation on long long values anyway. - */ -#define do_div(n, base) __do_div_asm(n, base) - -#elif __GNUC__ >= 4 - -//#include <asm/bug.h> - -/* - * If the divisor happens to be constant, we determine the appropriate - * inverse at compile time to turn the division into a few inline - * multiplications instead which is much faster. And yet only if compiling - * for ARMv4 or higher (we need umull/umlal) and if the gcc version is - * sufficiently recent to perform proper long long constant propagation. - * (It is unfortunate that gcc doesn't perform all this internally.) - */ -#define do_div(n, base) \ -({ \ - unsigned int __r, __b = (base); \ - if (!__builtin_constant_p(__b) || __b == 0 || \ - (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \ - /* non-constant divisor (or zero): slow path */ \ - __r = __do_div_asm(n, __b); \ - } else if ((__b & (__b - 1)) == 0) { \ - /* Trivial: __b is constant and a power of 2 */ \ - /* gcc does the right thing with this code. */ \ - __r = n; \ - __r &= (__b - 1); \ - n /= __b; \ - } else { \ - /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ - /* We rely on the fact that most of this code gets */ \ - /* optimized away at compile time due to constant */ \ - /* propagation and only a couple inline assembly */ \ - /* instructions should remain. Better avoid any */ \ - /* code construct that might prevent that. */ \ - unsigned long long __res, __x, __t, __m, __n = n; \ - unsigned int __c, __p, __z = 0; \ - /* preserve low part of n for reminder computation */ \ - __r = __n; \ - /* determine number of bits to represent __b */ \ - __p = 1 << __div64_fls(__b); \ - /* compute __m = ((__p << 64) + __b - 1) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ - /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ - __x = ~0ULL / __b * __b - 1; \ - __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ - __res >>= 32; \ - __res += (__m & 0xffffffff) * (__x >> 32); \ - __t = __res; \ - __res += (__x & 0xffffffff) * (__m >> 32); \ - __t = (__res < __t) ? (1ULL << 32) : 0; \ - __res = (__res >> 32) + __t; \ - __res += (__m >> 32) * (__x >> 32); \ - __res /= __p; \ - /* Now sanitize and optimize what we've got. */ \ - if (~0ULL % (__b / (__b & -__b)) == 0) { \ - /* those cases can be simplified with: */ \ - __n /= (__b & -__b); \ - __m = ~0ULL / (__b / (__b & -__b)); \ - __p = 1; \ - __c = 1; \ - } else if (__res != __x / __b) { \ - /* We can't get away without a correction */ \ - /* to compensate for bit truncation errors. */ \ - /* To avoid it we'd need an additional bit */ \ - /* to represent __m which would overflow it. */ \ - /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ - __c = 1; \ - /* Compute __m = (__p << 64) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += ((~0ULL % __b + 1) * __p) / __b; \ - } else { \ - /* Reduce __m/__p, and try to clear bit 31 */ \ - /* of __m when possible otherwise that'll */ \ - /* need extra overflow handling later. */ \ - unsigned int __bits = -(__m & -__m); \ - __bits |= __m >> 32; \ - __bits = (~__bits) << 1; \ - /* If __bits == 0 then setting bit 31 is */ \ - /* unavoidable. Simply apply the maximum */ \ - /* possible reduction in that case. */ \ - /* Otherwise the MSB of __bits indicates the */ \ - /* best reduction we should apply. */ \ - if (!__bits) { \ - __p /= (__m & -__m); \ - __m /= (__m & -__m); \ - } else { \ - __p >>= __div64_fls(__bits); \ - __m >>= __div64_fls(__bits); \ - } \ - /* No correction needed. */ \ - __c = 0; \ - } \ - /* Now we have a combination of 2 conditions: */ \ - /* 1) whether or not we need a correction (__c), and */ \ - /* 2) whether or not there might be an overflow in */ \ - /* the cross product (__m & ((1<<63) | (1<<31))) */ \ - /* Select the best insn combination to perform the */ \ - /* actual __m * __n / (__p << 64) operation. */ \ - if (!__c) { \ - asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - __res = __m; \ - asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ - "cmn %Q0, %Q1\n\t" \ - "adcs %R0, %R0, %R1\n\t" \ - "adc %Q0, %3, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n), "r" (__z) \ - : "cc" ); \ - } \ - if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ - "umlal %R0, %Q0, %Q1, %R2\n\t" \ - "mov %R0, #0\n\t" \ - "umlal %Q0, %R0, %R1, %R2" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ - "umlal %R0, %1, %Q2, %R3\n\t" \ - "mov %R0, #0\n\t" \ - "adds %Q0, %1, %Q0\n\t" \ - "adc %R0, %R0, #0\n\t" \ - "umlal %Q0, %R0, %R2, %R3" \ - : "+&r" (__res), "+&r" (__z) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } \ - __res /= __p; \ - /* The reminder can be computed with 32-bit regs */ \ - /* only, and gcc is good at that. */ \ - { \ - unsigned int __res0 = __res; \ - unsigned int __b0 = __b; \ - __r -= __res0 * __b0; \ - } \ - /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ - n = __res; \ - } \ - __r; \ -}) - -/* our own fls implementation to make sure constant propagation is fine */ -#define __div64_fls(bits) \ -({ \ - unsigned int __left = (bits), __nr = 0; \ - if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ - if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ - if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ - if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ - if (__left & 0x00000002) __nr += 1; \ - __nr; \ -}) - -#endif - -#endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 388864a..508f776 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -6,12 +6,10 @@ bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c romstage-y += div0.c -romstage-y += div64.S romstage-y += syslib.c romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c ramstage-y += div0.c -ramstage-y += div64.S #ramstage-y += interrupts.c #ramstage-y += memcpy.S #ramstage-y += memset.S diff --git a/src/arch/armv7/lib/div64.S b/src/arch/armv7/lib/div64.S deleted file mode 100644 index 44edf48..0000000 --- a/src/arch/armv7/lib/div64.S +++ /dev/null @@ -1,208 +0,0 @@ -/* - * linux/arch/arm/lib/div64.S - * - * Optimized computation of 64-bit dividend / 32-bit divisor - * - * Author: Nicolas Pitre - * Created: Oct 5, 2003 - * Copyright: Monta Vista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -// FIXME -//#include <linux/linkage.h> -#define __LINUX_ARM_ARCH__ 7 - -#ifdef __ARMEB__ -#define xh r0 -#define xl r1 -#define yh r2 -#define yl r3 -#else -#define xl r0 -#define xh r1 -#define yl r2 -#define yh r3 -#endif - -/* - * __do_div64: perform a division with 64-bit dividend and 32-bit divisor. - * - * Note: Calling convention is totally non standard for optimal code. - * This is meant to be used by do_div() from include/asm/div64.h only. - * - * Input parameters: - * xh-xl = dividend (clobbered) - * r4 = divisor (preserved) - * - * Output values: - * yh-yl = result - * xh = remainder - * - * Clobbered regs: xl, ip - */ - - -.globl __do_div64; -.align 4,0x90 -__do_div64: - - @ Test for easy paths first. - subs ip, r4, #1 - bls 9f @ divisor is 0 or 1 - tst ip, r4 - beq 8f @ divisor is power of 2 - - @ See if we need to handle upper 32-bit result. - cmp xh, r4 - mov yh, #0 - blo 3f - - @ Align divisor with upper part of dividend. - @ The aligned divisor is stored in yl preserving the original. - @ The bit position is stored in ip. - -#if __LINUX_ARM_ARCH__ >= 5 - - clz yl, r4 - clz ip, xh - sub yl, yl, ip - mov ip, #1 - mov ip, ip, lsl yl - mov yl, r4, lsl yl - -#else - - mov yl, r4 - mov ip, #1 -1: cmp yl, #0x80000000 - cmpcc yl, xh - movcc yl, yl, lsl #1 - movcc ip, ip, lsl #1 - bcc 1b - -#endif - - @ The division loop for needed upper bit positions. - @ Break out early if dividend reaches 0. -2: cmp xh, yl - orrcs yh, yh, ip - subcss xh, xh, yl - movnes ip, ip, lsr #1 - mov yl, yl, lsr #1 - bne 2b - - @ See if we need to handle lower 32-bit result. -3: cmp xh, #0 - mov yl, #0 - cmpeq xl, r4 - movlo xh, xl - movlo pc, lr - - @ The division loop for lower bit positions. - @ Here we shift remainer bits leftwards rather than moving the - @ divisor for comparisons, considering the carry-out bit as well. - mov ip, #0x80000000 -4: movs xl, xl, lsl #1 - adcs xh, xh, xh - beq 6f - cmpcc xh, r4 -5: orrcs yl, yl, ip - subcs xh, xh, r4 - movs ip, ip, lsr #1 - bne 4b - mov pc, lr - - @ The top part of remainder became zero. If carry is set - @ (the 33th bit) this is a false positive so resume the loop. - @ Otherwise, if lower part is also null then we are done. -6: bcs 5b - cmp xl, #0 - moveq pc, lr - - @ We still have remainer bits in the low part. Bring them up. - -#if __LINUX_ARM_ARCH__ >= 5 - - clz xh, xl @ we know xh is zero here so... - add xh, xh, #1 - mov xl, xl, lsl xh - mov ip, ip, lsr xh - -#else - -7: movs xl, xl, lsl #1 - mov ip, ip, lsr #1 - bcc 7b - -#endif - - @ Current remainder is now 1. It is worthless to compare with - @ divisor at this point since divisor can not be smaller than 3 here. - @ If possible, branch for another shift in the division loop. - @ If no bit position left then we are done. - movs ip, ip, lsr #1 - mov xh, #1 - bne 4b - mov pc, lr - -8: @ Division by a power of 2: determine what that divisor order is - @ then simply shift values around - -#if __LINUX_ARM_ARCH__ >= 5 - - clz ip, r4 - rsb ip, ip, #31 - -#else - - mov yl, r4 - cmp r4, #(1 << 16) - mov ip, #0 - movhs yl, yl, lsr #16 - movhs ip, #16 - - cmp yl, #(1 << 8) - movhs yl, yl, lsr #8 - addhs ip, ip, #8 - - cmp yl, #(1 << 4) - movhs yl, yl, lsr #4 - addhs ip, ip, #4 - - cmp yl, #(1 << 2) - addhi ip, ip, #3 - addls ip, ip, yl, lsr #1 - -#endif - - mov yh, xh, lsr ip - mov yl, xl, lsr ip - rsb ip, ip, #32 - orr yl, yl, xh, lsl ip - mov xh, xl, lsl ip - mov xh, xh, lsr ip - mov pc, lr - - @ eq -> division by 1: obvious enough... -9: moveq yl, xl - moveq yh, xh - moveq xh, #0 - moveq pc, lr - - @ Division by 0: - str lr, [sp, #-8]! - bl __div0 - - @ as wrong as it could be... - mov yl, #0 - mov yh, #0 - mov xh, #0 - ldr pc, [sp], #8 - -@.type __do_div64, @function; -@.size __do_div64, .-__do_div64, - diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 98723f3..0892efd 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -354,9 +354,9 @@ endif $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld + $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld $(romstage-objs) + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif $(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ echo "Forbidden global variables in romstage:"; \ @@ -366,9 +366,9 @@ endif $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_xip.ld + $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld $(romstage-objs) + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif $(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions diff --git a/src/arch/x86/include/div64.h b/src/arch/x86/include/div64.h deleted file mode 100644 index bbc9921..0000000 --- a/src/arch/x86/include/div64.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __I386_DIV64 -#define __I386_DIV64 - -/* - * do_div() is NOT a C function. It wants to return - * two values (the quotient and the remainder), but - * since that doesn't work very well in C, what it - * does is: - * - * - modifies the 64-bit dividend _in_place_ - * - returns the 32-bit remainder - * - * This ends up being the most efficient "calling - * convention" on x86. - */ -#define do_div(n,base) ({ \ - unsigned long __upper, __low, __high, __mod, __base; \ - __base = (base); \ - asm("":"=a" (__low), "=d" (__high):"A" (n)); \ - __upper = __high; \ - if (__high) { \ - __upper = __high % (__base); \ - __high = __high / (__base); \ - } \ - asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); \ - asm("":"=A" (n):"a" (__low),"d" (__high)); \ - __mod; \ -}) - -#endif diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 9de2584..4fc6f35 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -5,7 +5,6 @@ */ #include <string.h> -#include <div64.h> #include <console/console.h> #include <console/vtxprintf.h> @@ -70,20 +69,8 @@ static int number(void (*tx_byte)(unsigned char byte), if (num == 0) tmp[i++]='0'; else while (num != 0){ - /* there are some nice optimizations in the - * Macros-From-Hell that form the div64 code - * *IF* you call it with a constant. - * We're firmware, we only do bases - * 8, 10, and 16. Let's be smart. - * This greatly helps ARM, reduces the - * code footprint at compile time, and does not hurt x86. - */ - if (base == 10) - tmp[i++] = digits[do_div(num,10)]; - else if (base == 8) - tmp[i++] = digits[do_div(num,8)]; - else /* sorry, you're out of choices */ - tmp[i++] = digits[do_div(num,16)]; + tmp[i++] = digits[num % base]; + num /= base; } if (i > precision) precision = i; diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 5f3f663..405cf89 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -36,8 +36,8 @@ endif smm-y += smihandler.c smm-y += smiutil.c -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) + $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group $(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions $(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 879ad7e..be57f29 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -48,6 +48,7 @@ romstage-$(CONFIG_USBDEBUG) += usbdebug.c romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c cbmem.c romstage-y += compute_ip_checksum.c romstage-y += memmove.c +romstage-$(CONFIG_ARCH_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -94,6 +95,7 @@ smm-y += cbfs.c memcmp.c smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-$(CONFIG_USBDEBUG) += usbdebug.c +smm-y += gcc.c $(obj)/lib/version.ramstage.o : $(obj)/build.h

1 0

New patch to review for coreboot: ffec43f AMD SouthStation: Use SPD read code from F14 wrapper
by Kimarie Hoot 07 Mar '13

07 Mar '13

Kimarie Hoot (kimarie.hoot(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2608 -gerrit commit ffec43f712f75ebaa3179dfd85c8f25efe5ef117 Author: Kimarie Hoot <kimarie.hoot(a)se-eng.com> Date: Thu Mar 7 08:54:36 2013 -0700 AMD SouthStation: Use SPD read code from F14 wrapper Changes: - Get rid of the south_station mainboard specific code and uses the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: If4291d25ea81bf375f55b64c07c223a847a211d0 Signed-off-by: Kimarie Hoot <kimarie.hoot(a)se-eng.com> --- src/mainboard/amd/south_station/BiosCallOuts.c | 8 +- src/mainboard/amd/south_station/Makefile.inc | 2 - src/mainboard/amd/south_station/devicetree.cb | 7 ++ src/mainboard/amd/south_station/dimmSpd.c | 167 ------------------------- src/mainboard/amd/south_station/dimmSpd.h | 63 ---------- src/mainboard/amd/south_station/mainboard.c | 10 ++ 6 files changed, 23 insertions(+), 234 deletions(-) diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c b/src/mainboard/amd/south_station/BiosCallOuts.c index 6059549..622c411 100644 --- a/src/mainboard/amd/south_station/BiosCallOuts.c +++ b/src/mainboard/amd/south_station/BiosCallOuts.c @@ -19,10 +19,10 @@ #include "agesawrapper.h" #include "amdlib.h" -#include "dimmSpd.h" #include "BiosCallOuts.h" #include "heapManager.h" #include "SB800.h" +#include <northbridge/amd/agesa/family14/dimmSpd.h> STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -424,7 +424,11 @@ AGESA_STATUS BiosReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; - Status = AmdMemoryReadSPD (Func, Data, (AGESA_READ_SPD_PARAMS *)ConfigPtr); +#ifdef __PRE_RAM__ + Status = agesa_ReadSPD (Func, Data, ConfigPtr); +#else + Status = AGESA_UNSUPPORTED; +#endif return Status; } diff --git a/src/mainboard/amd/south_station/Makefile.inc b/src/mainboard/amd/south_station/Makefile.inc index 50f9447..59c6cd0 100644 --- a/src/mainboard/amd/south_station/Makefile.inc +++ b/src/mainboard/amd/south_station/Makefile.inc @@ -19,13 +19,11 @@ romstage-y += buildOpts.c romstage-y += agesawrapper.c -romstage-y += dimmSpd.c romstage-y += BiosCallOuts.c romstage-y += PlatformGnbPcie.c ramstage-y += buildOpts.c ramstage-y += agesawrapper.c -ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb index 883166c..60335d7 100644 --- a/src/mainboard/amd/south_station/devicetree.cb +++ b/src/mainboard/amd/south_station/devicetree.cb @@ -99,6 +99,13 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.3 on end device pci 18.4 on end device pci 18.5 on end + + register "spdAddrLookup" = " + { + { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses + { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses + }" + end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/south_station/dimmSpd.c b/src/mainboard/amd/south_station/dimmSpd.c deleted file mode 100644 index e1586b0..0000000 --- a/src/mainboard/amd/south_station/dimmSpd.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" -#include "OEM.h" /* SMBUS0_BASE_ADDRESS */ - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info); -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) - -/*#pragma optimize ("", off) // for source level debug -*--------------------------------------------------------------------------- -* -* SPD address table - porting required -*/ - -static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm - { - // socket 0 - { - {0xA0, 0xA2}, // channel 0 dimms - {0x00, 0x00}, // channel 1 dimms - }, - // socket 1 - { - {0x00, 0x00}, // channel 0 dimms - {0x00, 0x00}, // channel 1 dimms - }, - }; - -/*----------------------------------------------------------------------------- - * - * readSmbusByteData - read a single SPD byte from any offset - */ - -static int readSmbusByteData (int iobase, int address, char *buffer, int offset) - { - unsigned int status; - UINT64 limit; - - address |= 1; // set read bit - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 1, 0x1F); // clear error status - __outbyte (iobase + 3, offset); // offset in eeprom - __outbyte (iobase + 4, address); // slave address and read bit - __outbyte (iobase + 2, 0x48); // read byte command - - // time limit to avoid hanging for unexpected error status (should never happen) - limit = __rdtsc () + 2000000000 / 10; - for (;;) - { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; - } - -/*----------------------------------------------------------------------------- - * - * readSmbusByte - read a single SPD byte from the default offset - * this function is faster function readSmbusByteData - */ - -static int readSmbusByte (int iobase, int address, char *buffer) - { - unsigned int status; - UINT64 limit; - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 2, 0x44); // read command - - // time limit to avoid hanging for unexpected error status - limit = __rdtsc () + 2000000000 / 10; - for (;;) - { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; - } - -/*--------------------------------------------------------------------------- - * - * readspd - Read one or more SPD bytes from a DIMM. - * Start with offset zero and read sequentially. - * Optimization relies on autoincrement to avoid - * sending offset for every byte. - * Reads 128 bytes in 7-8 ms at 400 KHz. - */ - -static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count) - { - int index, error; - - /* read the first byte using offset zero */ - error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0); - if (error) return error; - - /* read the remaining bytes using auto-increment for speed */ - for (index = 1; index < count; index++) - { - error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]); - if (error) return error; - } - - return 0; - } - -static void writePmReg (int reg, int data) - { - __outbyte (0xCD6, reg); - __outbyte (0xCD7, data); - } - -static void setupFch (int ioBase) - { - writePmReg (0x2D, ioBase >> 8); - writePmReg (0x2C, ioBase | 1); - writePmReg (0x29, 0x80); - writePmReg (0x28, 0x61); - __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz - } - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) - { - int spdAddress, ioBase; - - if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR; - if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR; - - spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId]; - if (spdAddress == 0) return AGESA_ERROR; - ioBase = SMBUS0_BASE_ADDRESS; - setupFch (ioBase); - return readspd (ioBase, spdAddress, (void *) info->Buffer, 128); - } diff --git a/src/mainboard/amd/south_station/dimmSpd.h b/src/mainboard/amd/south_station/dimmSpd.h deleted file mode 100644 index 81ab02e..0000000 --- a/src/mainboard/amd/south_station/dimmSpd.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#ifndef _DIMMSPD_H_ -#define _DIMMSPD_H_ - -#include "Porting.h" -#include "AGESA.h" - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -AGESA_STATUS -AmdMemoryReadSPD ( - IN UINT32 Func, - IN UINT32 Data, - IN OUT AGESA_READ_SPD_PARAMS *SpdData - ); - -/*--------------------------------------------------------------------------------------- - * L O C A L F U N C T I O N S - *--------------------------------------------------------------------------------------- - */ - -#endif diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index 83b4b38..104492e 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <arch/io.h> #include <cpu/x86/msr.h> +#include <southbridge/amd/sb800/sb800.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <delay.h> @@ -80,6 +81,15 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); southstation_led_init(); + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the persimmon + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = {

1 0

New patch to review for coreboot: e6c3d1f AMD Inagua: Use SPD read code from F14 wrapper
by Kimarie Hoot 07 Mar '13

07 Mar '13

Kimarie Hoot (kimarie.hoot(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2607 -gerrit commit e6c3d1ffa639783df21004d84527b7616eabe0c9 Author: Kimarie Hoot <kimarie.hoot(a)se-eng.com> Date: Wed Mar 6 16:18:09 2013 -0700 AMD Inagua: Use SPD read code from F14 wrapper Changes: - Get rid of the inagua mainboard specific code and uses the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: Id05227fcf18c6ab94ffe1beb50b533ab7b0535db Signed-off-by: Kimarie Hoot <kimarie.hoot(a)se-eng.com> --- src/mainboard/amd/inagua/BiosCallOuts.c | 8 +- src/mainboard/amd/inagua/Makefile.inc | 2 - src/mainboard/amd/inagua/devicetree.cb | 5 + src/mainboard/amd/inagua/dimmSpd.c | 159 -------------------------------- src/mainboard/amd/inagua/dimmSpd.h | 63 ------------- src/mainboard/amd/inagua/mainboard.c | 11 ++- 6 files changed, 21 insertions(+), 227 deletions(-) diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c index 23e020f..452a592 100644 --- a/src/mainboard/amd/inagua/BiosCallOuts.c +++ b/src/mainboard/amd/inagua/BiosCallOuts.c @@ -19,10 +19,10 @@ #include "agesawrapper.h" #include "amdlib.h" -#include "dimmSpd.h" #include "BiosCallOuts.h" #include "heapManager.h" #include "SB800.h" +#include <northbridge/amd/agesa/family14/dimmSpd.h> STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] = { @@ -419,7 +419,11 @@ AGESA_STATUS BiosReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; - Status = AmdMemoryReadSPD (Func, Data, (AGESA_READ_SPD_PARAMS *)ConfigPtr); +#ifdef __PRE_RAM__ + Status = agesa_ReadSPD (Func, Data, ConfigPtr); +#else + Status = AGESA_UNSUPPORTED; +#endif return Status; } diff --git a/src/mainboard/amd/inagua/Makefile.inc b/src/mainboard/amd/inagua/Makefile.inc index b1a3014..17443bc 100644 --- a/src/mainboard/amd/inagua/Makefile.inc +++ b/src/mainboard/amd/inagua/Makefile.inc @@ -26,13 +26,11 @@ endif romstage-y += buildOpts.c romstage-y += agesawrapper.c -romstage-y += dimmSpd.c romstage-y += BiosCallOuts.c romstage-y += PlatformGnbPcie.c ramstage-y += buildOpts.c ramstage-y += agesawrapper.c -ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index 3d8ccb4..67c3a1a 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -86,6 +86,11 @@ chip northbridge/amd/agesa/family14/root_complex device pci 18.5 on end device pci 18.6 on end device pci 18.7 on end + + register "spdAddrLookup" = " + { + { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses + }" end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex diff --git a/src/mainboard/amd/inagua/dimmSpd.c b/src/mainboard/amd/inagua/dimmSpd.c deleted file mode 100644 index 730a2d0..0000000 --- a/src/mainboard/amd/inagua/dimmSpd.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" -#include "OEM.h" /* SMBUS0_BASE_ADDRESS */ - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info); -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) - -/*#pragma optimize ("", off) // for source level debug - *--------------------------------------------------------------------------- - * - * SPD address table - porting required - */ - -static const UINT8 spdAddressLookup [1] [2] [2] = // socket, channel, dimm -{ - // socket 0 - { - {0xA0, 0xA2}, // channel 0 dimms - {0x00, 0x00}, // channel 1 dimms - }, -}; - -/*----------------------------------------------------------------------------- - * - * readSmbusByteData - read a single SPD byte from any offset - */ - -static int readSmbusByteData (int iobase, int address, char *buffer, int offset) -{ - unsigned int status; - UINT64 limit; - - address |= 1; // set read bit - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 1, 0x1F); // clear error status - __outbyte (iobase + 3, offset); // offset in eeprom - __outbyte (iobase + 4, address); // slave address and read bit - __outbyte (iobase + 2, 0x48); // read byte command - - // time limit to avoid hanging for unexpected error status (should never happen) - limit = __rdtsc () + 2000000000 / 10; - for (;;) { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; -} - -/*----------------------------------------------------------------------------- - * - * readSmbusByte - read a single SPD byte from the default offset - * this function is faster function readSmbusByteData - */ - -static int readSmbusByte (int iobase, int address, char *buffer) -{ - unsigned int status; - UINT64 limit; - - __outbyte (iobase + 0, 0xFF); // clear error status - __outbyte (iobase + 2, 0x44); // read command - - // time limit to avoid hanging for unexpected error status - limit = __rdtsc () + 2000000000 / 10; - for (;;) { - status = __inbyte (iobase); - if (__rdtsc () > limit) break; - if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting - if ((status & 1) == 1) continue; // HostBusy set, keep waiting - break; - } - - buffer [0] = __inbyte (iobase + 5); - if (status == 2) status = 0; // check for done with no errors - return status; -} - -/*--------------------------------------------------------------------------- - * - * readspd - Read one or more SPD bytes from a DIMM. - * Start with offset zero and read sequentially. - * Optimization relies on autoincrement to avoid - * sending offset for every byte. - * Reads 128 bytes in 7-8 ms at 400 KHz. - */ - -static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count) -{ - int index, error; - - /* read the first byte using offset zero */ - error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0); - if (error) return error; - - /* read the remaining bytes using auto-increment for speed */ - for (index = 1; index < count; index++) { - error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]); - if (error) return error; - } - - return 0; -} - -static void writePmReg (int reg, int data) -{ - __outbyte (0xCD6, reg); - __outbyte (0xCD7, data); -} - -static void setupFch (int ioBase) -{ - writePmReg (0x2D, ioBase >> 8); - writePmReg (0x2C, ioBase | 1); - writePmReg (0x29, 0x80); - writePmReg (0x28, 0x61); - __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz -} - -AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) -{ - int spdAddress, ioBase; - - if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR; - if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR; - - spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId]; - if (spdAddress == 0) return AGESA_ERROR; - ioBase = SMBUS0_BASE_ADDRESS; - setupFch (ioBase); - return readspd (ioBase, spdAddress, (void *) info->Buffer, 128); -} diff --git a/src/mainboard/amd/inagua/dimmSpd.h b/src/mainboard/amd/inagua/dimmSpd.h deleted file mode 100644 index 81ab02e..0000000 --- a/src/mainboard/amd/inagua/dimmSpd.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#ifndef _DIMMSPD_H_ -#define _DIMMSPD_H_ - -#include "Porting.h" -#include "AGESA.h" - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -AGESA_STATUS -AmdMemoryReadSPD ( - IN UINT32 Func, - IN UINT32 Data, - IN OUT AGESA_READ_SPD_PARAMS *SpdData - ); - -/*--------------------------------------------------------------------------------------- - * L O C A L F U N C T I O N S - *--------------------------------------------------------------------------------------- - */ - -#endif diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index 8907ebb..26c345a 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -24,7 +24,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> -//#include <southbridge/amd/sb800/sb800.h> +#include <southbridge/amd/sb800/sb800.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ void set_pcie_reset(void); @@ -79,6 +79,15 @@ static void mainboard_enable(device_t dev) /* Inagua mainboard specific setting */ set_pcie_dereset(); + + /* + * Initialize ASF registers to an arbitrary address because someone + * long ago set things up this way inside the SPD read code. The + * SPD read code has been made generic and moved out of the inagua + * directory, so the ASF init is being done here. + */ + pm_iowrite(0x29, 0x80); + pm_iowrite(0x28, 0x61); } struct chip_operations mainboard_ops = {

1 0

Patch set updated for coreboot: d433f3c Eliminate do_div().
by David Hendricks 07 Mar '13

07 Mar '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2606 -gerrit commit d433f3ca0b710dd092da566c8ffcb963efc30eea Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Mar 6 20:43:55 2013 -0800 Eliminate do_div(). This eliminates the use of do_div() in favor of using libgcc wrapper functions. This was tested by building and booting on Google Snow (ARMv7) and Qemu (x86). printk()s which use division in vtxprintf() look good. Change-Id: Icad001d84a3c05bfbf77098f3d644816280b4a4d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- src/arch/armv7/include/div64.h | 233 ---------------------------------------- src/arch/armv7/lib/Makefile.inc | 2 - src/console/vtxprintf.c | 28 ++--- 4 files changed, 15 insertions(+), 250 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 0595ae2..8f9915f 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -124,7 +124,7 @@ endif $(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group else $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif diff --git a/src/arch/armv7/include/div64.h b/src/arch/armv7/include/div64.h deleted file mode 100644 index 5baed2b..0000000 --- a/src/arch/armv7/include/div64.h +++ /dev/null @@ -1,233 +0,0 @@ -/* taken from linux 2.6.31.14 */ - -#ifndef __ASM_ARM_DIV64 -#define __ASM_ARM_DIV64 - -//#include <asm/system.h> -//#include <linux/types.h> -// FIXME - -#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" -#define __LINUX_ARM_ARCH__ 7 - -/* - * The semantics of do_div() are: - * - * uint32_t do_div(uint64_t *n, uint32_t base) - * { - * uint32_t remainder = *n % base; - * *n = *n / base; - * return remainder; - * } - * - * In other words, a 64-bit dividend with a 32-bit divisor producing - * a 64-bit result and a 32-bit remainder. To accomplish this optimally - * we call a special __do_div64 helper with completely non standard - * calling convention for arguments and results (beware). - */ - -#ifdef __ARMEB__ -#define __xh "r0" -#define __xl "r1" -#else -#define __xl "r0" -#define __xh "r1" -#endif - -#define __do_div_asm(n, base) \ -({ \ - register unsigned int __base asm("r4") = base; \ - register unsigned long long __n asm("r0") = n; \ - register unsigned long long __res asm("r2"); \ - register unsigned int __rem asm(__xh); \ - asm( __asmeq("%0", __xh) \ - __asmeq("%1", "r2") \ - __asmeq("%2", "r0") \ - __asmeq("%3", "r4") \ - "bl __do_div64" \ - : "=r" (__rem), "=r" (__res) \ - : "r" (__n), "r" (__base) \ - : "ip", "lr", "cc"); \ - n = __res; \ - __rem; \ -}) - -#if __GNUC__ < 4 - -/* - * gcc versions earlier than 4.0 are simply too problematic for the - * optimized implementation below. First there is gcc PR 15089 that - * tend to trig on more complex constructs, spurious .global __udivsi3 - * are inserted even if none of those symbols are referenced in the - * generated code, and those gcc versions are not able to do constant - * propagation on long long values anyway. - */ -#define do_div(n, base) __do_div_asm(n, base) - -#elif __GNUC__ >= 4 - -//#include <asm/bug.h> - -/* - * If the divisor happens to be constant, we determine the appropriate - * inverse at compile time to turn the division into a few inline - * multiplications instead which is much faster. And yet only if compiling - * for ARMv4 or higher (we need umull/umlal) and if the gcc version is - * sufficiently recent to perform proper long long constant propagation. - * (It is unfortunate that gcc doesn't perform all this internally.) - */ -#define do_div(n, base) \ -({ \ - unsigned int __r, __b = (base); \ - if (!__builtin_constant_p(__b) || __b == 0 || \ - (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \ - /* non-constant divisor (or zero): slow path */ \ - __r = __do_div_asm(n, __b); \ - } else if ((__b & (__b - 1)) == 0) { \ - /* Trivial: __b is constant and a power of 2 */ \ - /* gcc does the right thing with this code. */ \ - __r = n; \ - __r &= (__b - 1); \ - n /= __b; \ - } else { \ - /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ - /* We rely on the fact that most of this code gets */ \ - /* optimized away at compile time due to constant */ \ - /* propagation and only a couple inline assembly */ \ - /* instructions should remain. Better avoid any */ \ - /* code construct that might prevent that. */ \ - unsigned long long __res, __x, __t, __m, __n = n; \ - unsigned int __c, __p, __z = 0; \ - /* preserve low part of n for reminder computation */ \ - __r = __n; \ - /* determine number of bits to represent __b */ \ - __p = 1 << __div64_fls(__b); \ - /* compute __m = ((__p << 64) + __b - 1) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ - /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ - __x = ~0ULL / __b * __b - 1; \ - __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ - __res >>= 32; \ - __res += (__m & 0xffffffff) * (__x >> 32); \ - __t = __res; \ - __res += (__x & 0xffffffff) * (__m >> 32); \ - __t = (__res < __t) ? (1ULL << 32) : 0; \ - __res = (__res >> 32) + __t; \ - __res += (__m >> 32) * (__x >> 32); \ - __res /= __p; \ - /* Now sanitize and optimize what we've got. */ \ - if (~0ULL % (__b / (__b & -__b)) == 0) { \ - /* those cases can be simplified with: */ \ - __n /= (__b & -__b); \ - __m = ~0ULL / (__b / (__b & -__b)); \ - __p = 1; \ - __c = 1; \ - } else if (__res != __x / __b) { \ - /* We can't get away without a correction */ \ - /* to compensate for bit truncation errors. */ \ - /* To avoid it we'd need an additional bit */ \ - /* to represent __m which would overflow it. */ \ - /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ - __c = 1; \ - /* Compute __m = (__p << 64) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += ((~0ULL % __b + 1) * __p) / __b; \ - } else { \ - /* Reduce __m/__p, and try to clear bit 31 */ \ - /* of __m when possible otherwise that'll */ \ - /* need extra overflow handling later. */ \ - unsigned int __bits = -(__m & -__m); \ - __bits |= __m >> 32; \ - __bits = (~__bits) << 1; \ - /* If __bits == 0 then setting bit 31 is */ \ - /* unavoidable. Simply apply the maximum */ \ - /* possible reduction in that case. */ \ - /* Otherwise the MSB of __bits indicates the */ \ - /* best reduction we should apply. */ \ - if (!__bits) { \ - __p /= (__m & -__m); \ - __m /= (__m & -__m); \ - } else { \ - __p >>= __div64_fls(__bits); \ - __m >>= __div64_fls(__bits); \ - } \ - /* No correction needed. */ \ - __c = 0; \ - } \ - /* Now we have a combination of 2 conditions: */ \ - /* 1) whether or not we need a correction (__c), and */ \ - /* 2) whether or not there might be an overflow in */ \ - /* the cross product (__m & ((1<<63) | (1<<31))) */ \ - /* Select the best insn combination to perform the */ \ - /* actual __m * __n / (__p << 64) operation. */ \ - if (!__c) { \ - asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - __res = __m; \ - asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ - "cmn %Q0, %Q1\n\t" \ - "adcs %R0, %R0, %R1\n\t" \ - "adc %Q0, %3, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n), "r" (__z) \ - : "cc" ); \ - } \ - if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ - "umlal %R0, %Q0, %Q1, %R2\n\t" \ - "mov %R0, #0\n\t" \ - "umlal %Q0, %R0, %R1, %R2" \ - : "+&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ - "umlal %R0, %1, %Q2, %R3\n\t" \ - "mov %R0, #0\n\t" \ - "adds %Q0, %1, %Q0\n\t" \ - "adc %R0, %R0, #0\n\t" \ - "umlal %Q0, %R0, %R2, %R3" \ - : "+&r" (__res), "+&r" (__z) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } \ - __res /= __p; \ - /* The reminder can be computed with 32-bit regs */ \ - /* only, and gcc is good at that. */ \ - { \ - unsigned int __res0 = __res; \ - unsigned int __b0 = __b; \ - __r -= __res0 * __b0; \ - } \ - /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ - n = __res; \ - } \ - __r; \ -}) - -/* our own fls implementation to make sure constant propagation is fine */ -#define __div64_fls(bits) \ -({ \ - unsigned int __left = (bits), __nr = 0; \ - if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ - if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ - if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ - if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ - if (__left & 0x00000002) __nr += 1; \ - __nr; \ -}) - -#endif - -#endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 388864a..508f776 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -6,12 +6,10 @@ bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c romstage-y += div0.c -romstage-y += div64.S romstage-y += syslib.c romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c ramstage-y += div0.c -ramstage-y += div64.S #ramstage-y += interrupts.c #ramstage-y += memcpy.S #ramstage-y += memset.S diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 9de2584..0146805 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -5,7 +5,6 @@ */ #include <string.h> -#include <div64.h> #include <console/console.h> #include <console/vtxprintf.h> @@ -70,20 +69,21 @@ static int number(void (*tx_byte)(unsigned char byte), if (num == 0) tmp[i++]='0'; else while (num != 0){ - /* there are some nice optimizations in the - * Macros-From-Hell that form the div64 code - * *IF* you call it with a constant. - * We're firmware, we only do bases - * 8, 10, and 16. Let's be smart. - * This greatly helps ARM, reduces the - * code footprint at compile time, and does not hurt x86. + /* + * We're firmware, we only do bases 8, 10, and 16. Let's be + * smart. This greatly helps ARM, reduces the code footprint + * at compile time, and does not hurt x86. */ - if (base == 10) - tmp[i++] = digits[do_div(num,10)]; - else if (base == 8) - tmp[i++] = digits[do_div(num,8)]; - else /* sorry, you're out of choices */ - tmp[i++] = digits[do_div(num,16)]; + if (base == 10) { + tmp[i++] = digits[num % 10]; + num /= 10; + } else if (base == 8) { + tmp[i++] = digits[num % 8]; + num /= 8; + } else { /* sorry, you're out of choices */ + tmp[i++] = digits[num % 16]; + num /= 16; + } } if (i > precision) precision = i;

1 0

Patch set updated for coreboot: 4797d51 Eliminate do_div().
by David Hendricks 07 Mar '13

07 Mar '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2606 -gerrit commit 4797d51ba8f8c1d9d23aacb7bbb37b7a2e8e3f7c Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Mar 6 20:43:55 2013 -0800 Eliminate do_div(). This eliminates the use of do_div() in favor of using libgcc wrapper functions. This was tested by building and booting on Google Snow (ARMv7) and Qemu (x86). printk()s which use division in vtxprintf() look good. Change-Id: Icad001d84a3c05bfbf77098f3d644816280b4a4d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- src/arch/armv7/lib/Makefile.inc | 2 -- src/console/vtxprintf.c | 28 ++++++++++++++-------------- 3 files changed, 15 insertions(+), 17 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 0595ae2..8f9915f 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -124,7 +124,7 @@ endif $(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group else $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 388864a..508f776 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -6,12 +6,10 @@ bootblock-y += cache-cp15.c romstage-y += cache_v7.c romstage-y += cache-cp15.c romstage-y += div0.c -romstage-y += div64.S romstage-y += syslib.c romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c ramstage-y += div0.c -ramstage-y += div64.S #ramstage-y += interrupts.c #ramstage-y += memcpy.S #ramstage-y += memset.S diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 9de2584..0146805 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -5,7 +5,6 @@ */ #include <string.h> -#include <div64.h> #include <console/console.h> #include <console/vtxprintf.h> @@ -70,20 +69,21 @@ static int number(void (*tx_byte)(unsigned char byte), if (num == 0) tmp[i++]='0'; else while (num != 0){ - /* there are some nice optimizations in the - * Macros-From-Hell that form the div64 code - * *IF* you call it with a constant. - * We're firmware, we only do bases - * 8, 10, and 16. Let's be smart. - * This greatly helps ARM, reduces the - * code footprint at compile time, and does not hurt x86. + /* + * We're firmware, we only do bases 8, 10, and 16. Let's be + * smart. This greatly helps ARM, reduces the code footprint + * at compile time, and does not hurt x86. */ - if (base == 10) - tmp[i++] = digits[do_div(num,10)]; - else if (base == 8) - tmp[i++] = digits[do_div(num,8)]; - else /* sorry, you're out of choices */ - tmp[i++] = digits[do_div(num,16)]; + if (base == 10) { + tmp[i++] = digits[num % 10]; + num /= 10; + } else if (base == 8) { + tmp[i++] = digits[num % 8]; + num /= 8; + } else { /* sorry, you're out of choices */ + tmp[i++] = digits[num % 16]; + num /= 16; + } } if (i > precision) precision = i;

1 0

New patch to review for coreboot: 3686a9c Eliminate do_div().
by David Hendricks 07 Mar '13

07 Mar '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2606 -gerrit commit 3686a9c6ab7e57052bb88b294f5d09cf41efaa59 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Mar 6 20:43:55 2013 -0800 Eliminate do_div(). This eliminates the use of do_div() in favor of using libgcc wrapper functions. This was tested by building and booting on Google Snow (ARMv7) and Qemu (x86). printk()s which use division in vtxprintf() look good. Change-Id: Icad001d84a3c05bfbf77098f3d644816280b4a4d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/Makefile.inc | 2 +- src/arch/armv7/lib/Makefile.inc | 2 -- src/arch/x86/include/div64.h | 30 ------------------------------ src/console/vtxprintf.c | 28 ++++++++++++++-------------- 4 files changed, 15 insertions(+), 47 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 0595ae2..8f9915f 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -124,7 +124,7 @@ endif $(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group else $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 0e81c99..0da3b0b 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -8,12 +8,10 @@ bootblock-y += div64.S romstage-y += cache_v7.c romstage-y += cache-cp15.c romstage-y += div0.c -romstage-y += div64.S romstage-y += syslib.c romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c ramstage-y += div0.c -ramstage-y += div64.S #ramstage-y += interrupts.c #ramstage-y += memcpy.S #ramstage-y += memset.S diff --git a/src/arch/x86/include/div64.h b/src/arch/x86/include/div64.h deleted file mode 100644 index bbc9921..0000000 --- a/src/arch/x86/include/div64.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __I386_DIV64 -#define __I386_DIV64 - -/* - * do_div() is NOT a C function. It wants to return - * two values (the quotient and the remainder), but - * since that doesn't work very well in C, what it - * does is: - * - * - modifies the 64-bit dividend _in_place_ - * - returns the 32-bit remainder - * - * This ends up being the most efficient "calling - * convention" on x86. - */ -#define do_div(n,base) ({ \ - unsigned long __upper, __low, __high, __mod, __base; \ - __base = (base); \ - asm("":"=a" (__low), "=d" (__high):"A" (n)); \ - __upper = __high; \ - if (__high) { \ - __upper = __high % (__base); \ - __high = __high / (__base); \ - } \ - asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); \ - asm("":"=A" (n):"a" (__low),"d" (__high)); \ - __mod; \ -}) - -#endif diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 9de2584..0146805 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -5,7 +5,6 @@ */ #include <string.h> -#include <div64.h> #include <console/console.h> #include <console/vtxprintf.h> @@ -70,20 +69,21 @@ static int number(void (*tx_byte)(unsigned char byte), if (num == 0) tmp[i++]='0'; else while (num != 0){ - /* there are some nice optimizations in the - * Macros-From-Hell that form the div64 code - * *IF* you call it with a constant. - * We're firmware, we only do bases - * 8, 10, and 16. Let's be smart. - * This greatly helps ARM, reduces the - * code footprint at compile time, and does not hurt x86. + /* + * We're firmware, we only do bases 8, 10, and 16. Let's be + * smart. This greatly helps ARM, reduces the code footprint + * at compile time, and does not hurt x86. */ - if (base == 10) - tmp[i++] = digits[do_div(num,10)]; - else if (base == 8) - tmp[i++] = digits[do_div(num,8)]; - else /* sorry, you're out of choices */ - tmp[i++] = digits[do_div(num,16)]; + if (base == 10) { + tmp[i++] = digits[num % 10]; + num /= 10; + } else if (base == 8) { + tmp[i++] = digits[num % 8]; + num /= 8; + } else { /* sorry, you're out of choices */ + tmp[i++] = digits[num % 16]; + num /= 16; + } } if (i > precision) precision = i;

1 0

Patch set updated for coreboot: 113f8b1 Persimmon DSDT: Add secondary bus range to PCI0
by Mike Loptien 07 Mar '13

07 Mar '13

Mike Loptien (mike.loptien(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2592 -gerrit commit 113f8b18162f91880919e048b7a9598afac87817 Author: Mike Loptien <mike.loptien(a)se-eng.com> Date: Tue Mar 5 14:21:28 2013 -0700 Persimmon DSDT: Add secondary bus range to PCI0 Adding the 'WordBusNumber' macro to the PCI0 CRES ResourceTemplate in the Persimmon DSDT. This sets up the bus number for the PCI0 device and the secondary bus number in the CRS method. This change came in response to a 'dmesg' error which states: '[FIRMWARE BUG]: ACPI: no secondary bus range in _CRS' By adding the 'WordBusNumber' macro, ACPI can set up a valid range for the PCIe downstream busses, thereby relieving the Linux kernel from "guessing" the valid range based off _BBN or assuming [0-0xFF]. The Linux kernel code that checks this bus range is in `drivers/acpi/pci_root.c`. PCI busses can have up to 256 secondary busses connected to them via a PCI-PCI bridge. However, these busses do not have to be sequentially numbered, so leaving out a section of the range (eg. allowing [0-0x7F]) will unnecessarily restrict the downstream busses. This change will apply to other AMD mainboards and will be in a different commit. Change-Id: I44f22bc03a0dcbcd2594d4291508826cc2146860 Signed-off-by: Mike Loptien <mike.loptien(a)se-eng.com> --- src/mainboard/amd/persimmon/dsdt.asl | 38 +++++++++++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl index 582ab7f..110837b 100644 --- a/src/mainboard/amd/persimmon/dsdt.asl +++ b/src/mainboard/amd/persimmon/dsdt.asl @@ -1157,6 +1157,15 @@ DefinitionBlock ( Device(PCI0) { External (TOM1) External (TOM2) + /* The Secondary bus range for PCI0 lets the system + * know what bus values are allowed on the downstream + * side of this PCI bus if there is a PCI-PCI bridge. + * PCI busses can have 256 secondary busses which + * range from [0-0xFF] but they do not need to be + * sequential. + */ + Name (PSBB, 0x0000) /* Secondary bus base variable for PCI0 */ + Name (PSBL, 0x0100) /* Secondary bus length variable for PCI0 */ Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1477,14 +1486,23 @@ DefinitionBlock ( } /* end Ac97modem */ Name(CRES, ResourceTemplate() { + /* Set the Bus number and Secondary Bus number for the PCI0 device */ + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, /* address granularity */ + 0x0000, /* range minimum */ + 0x007F, /* range maximum */ + 0x0000, /* translation */ + 0x0080, /* length */ + ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */ + IO(Decode16, 0x0CF8, 0x0CF8, 1, 8) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, /* address granularity */ - 0x0000, /* range minimum */ - 0x0CF7, /* range maximum */ - 0x0000, /* translation */ - 0x0CF8 /* length */ + 0x0000, /* address granularity */ + 0x0000, /* range minimum */ + 0x0CF7, /* range maximum */ + 0x0000, /* translation */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, @@ -1581,6 +1599,16 @@ DefinitionBlock ( Store(PBLN,EBML) } #endif + /* Set the secondary bus range for PCI0. */ + CreateWordField (CRES, ^PSB0._MIN, MIN0) + CreateWordField (CRES, ^PSB0._MAX, MAX0) + CreateWordField (CRES, ^PSB0._LEN, LEN0) + + Store (PSBB, MIN0) /* Put Secondary Bus Base value into MIN0 memory */ + Store (PSBL, LEN0) /* Put Secondary Bus Length value into LEN0 memory */ + Store (LEN0, Local0) /* Copy into Local0 for doing math */ + Add (MIN0, Decrement (Local0), MAX0) /* Add MIN0 to Local0 and put it into MAX0 memory */ + CreateDWordField(CRES, ^MMIO._BAS, MM1B) CreateDWordField(CRES, ^MMIO._LEN, MM1L) /*

1 0

Patch set updated for coreboot: 7f7a6fa Persimmon DSDT: Add secondary bus range to PCI0
by Mike Loptien 07 Mar '13

07 Mar '13

Mike Loptien (mike.loptien(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2592 -gerrit commit 7f7a6fafb82060b439cdeee2eb099cd89524df23 Author: Mike Loptien <mike.loptien(a)se-eng.com> Date: Tue Mar 5 14:21:28 2013 -0700 Persimmon DSDT: Add secondary bus range to PCI0 Adding the 'WordBusNumber' macro to the PCI0 CRES ResourceTemplate in the Persimmon DSDT. This sets up the bus number for the PCI0 device and the secondary bus number in the CRS method. This change came in response to a 'dmesg' error which states: '[FIRMWARE BUG]: ACPI: no secondary bus range in _CRS' By adding the 'WordBusNumber' macro, ACPI can set up a valid range for the PCIe downstream busses, thereby relieving the Linux kernel from "guessing" the valid range based off _BBN or assuming [0-0xFF]. The Linux kernel code that checks this bus range is in `drivers/acpi/pci_root.c`. PCI busses can have up to 256 secondary busses connected to them via a PCI-PCI bridge. However, these busses do not have to be sequentially numbered, so leaving out a section of the range (eg. allowing [0-0x7F]) will unnecessarily restrict the downstream busses. This change will apply to other AMD mainboards and will be in a different commit. Change-Id: I44f22bc03a0dcbcd2594d4291508826cc2146860 Signed-off-by: Mike Loptien <mike.loptien(a)se-eng.com> --- src/mainboard/amd/persimmon/dsdt.asl | 38 +++++++++++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl index 582ab7f..e99152c 100644 --- a/src/mainboard/amd/persimmon/dsdt.asl +++ b/src/mainboard/amd/persimmon/dsdt.asl @@ -1157,6 +1157,15 @@ DefinitionBlock ( Device(PCI0) { External (TOM1) External (TOM2) + /* The Secondary bus range for PCI0 lets the system + * know what bus values are allowed on the downstream + * side of this PCI bus if there is a PCI-PCI bridge. + * PCI busses can have 256 secondary busses which + * range from [0-0xFF] but they do not need to be + * sequential. + */ + Name (PSBB, 0x0000) /* Secondary bus base variable for PCI0 */ + Name (PSBL, 0x0100) /* Secondary bus length variable for PCI0 */ Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1477,14 +1486,23 @@ DefinitionBlock ( } /* end Ac97modem */ Name(CRES, ResourceTemplate() { + /* Set the Bus number and Secondary Bus number for the PCI0 device */ + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, /* address granularity */ + 0x0000, /* range minimum */ + 0x007F, /* range maximum */ + 0x0000, /* translation */ + 0x0080, /* length */ + ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */ + IO(Decode16, 0x0CF8, 0x0CF8, 1, 8) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, /* address granularity */ - 0x0000, /* range minimum */ - 0x0CF7, /* range maximum */ - 0x0000, /* translation */ - 0x0CF8 /* length */ + 0x0000, /* address granularity */ + 0x0000, /* range minimum */ + 0x0CF7, /* range maximum */ + 0x0000, /* translation */ + 0x0CF8 /* length */ ) WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, @@ -1581,6 +1599,16 @@ DefinitionBlock ( Store(PBLN,EBML) } #endif + /* Set the secondary bus range for PCI0. */ + CreateWordField (CRES, ^PSB0._MIN, MIN0) + CreateWordField (CRES, ^PSB0._MAX, MAX0) + CreateWordField (CRES, ^PSB0._LEN, LEN0) + + Store (PSBB, MIN0) /* Put Secondary Bus Base value into MIN0 memory */ + Store (PSBL, LEN0) /* Put Secondary Bus Length value into LEN0 memory */ + Store (LEN0, Local0) /* Copy into Local0 for doing math */ + Add (MIN0, Decrement (Local0), MAX0) /* Add MIN0 to Local0 and put it into MAX0 memory */ + CreateDWordField(CRES, ^MMIO._BAS, MM1B) CreateDWordField(CRES, ^MMIO._LEN, MM1L) /*

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New patch to review for coreboot: d8b1d2b FrontRunner/Toucan-AF: lower SPI speed to 22 MHz
by Jens Rottmann 07 Mar '13

07 Mar '13

Jens Rottmann (JRottmann(a)LiPPERTembedded.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2605 -gerrit commit d8b1d2b09194cf5c48d08f76da91df9d36e58efa Author: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> Date: Thu Mar 7 19:02:15 2013 +0100 FrontRunner/Toucan-AF: lower SPI speed to 22 MHz The Hudson-E1's default SPI speed for normal i.e. non-fast reads is 66 MHz, but the SST 25VF032B datasheet allows max. 25. Lower the speed to 22 MHz, otherwise BIOS flashing fails. Change-Id: I22e87d833a3ebd316b6e873595a2480831533ab1 Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> --- src/mainboard/lippert/frontrunner-af/mainboard.c | 5 +++++ src/mainboard/lippert/toucan-af/mainboard.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 83c90f3..72f2793 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -87,6 +87,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data) static void init(struct device *dev) { + volatile u8 *spi_base; // base addr of Hudson's SPI host controller int i; printk(BIOS_DEBUG, CONFIG_MAINBOARD_PART_NUMBER " ENTER %s\n", __func__); @@ -123,6 +124,10 @@ static void init(struct device *dev) outb((u8)val, SIO_RUNTIME_BASE + (val >> 8)); } + /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ + spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register + /* Notify the SMC we're alive and kicking, or after a while it will * effect a power cycle and switch to the alternate BIOS chip. * Should be done as late as possible. */ diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index 27952fa..367397e 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -56,6 +56,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data) static void init(struct device *dev) { + volatile u8 *spi_base; // base addr of Hudson's SPI host controller int i; printk(BIOS_DEBUG, CONFIG_MAINBOARD_PART_NUMBER " ENTER %s\n", __func__); @@ -90,6 +91,10 @@ static void init(struct device *dev) printk(BIOS_INFO, "Board revision ID: %u\n", fch_gpio_state(58)<<2 | fch_gpio_state(57)<<1 | fch_gpio_state(56)); + /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ + spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register + /* Notify the SMC we're alive and kicking, or after a while it will * effect a power cycle and switch to the alternate BIOS chip. * Should be done as late as possible. */

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coreboot March 2013