coreboot February 2013

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Patch set updated for coreboot: 9d238f2 snow: cleanup ramstage and call hardwaremain()
by David Hendricks 07 Feb '13

07 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2302 -gerrit commit 9d238f29d861a05c6f2f00956f909b4600fdb379 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Feb 6 16:29:42 2013 -0800 snow: cleanup ramstage and call hardwaremain() ** do not submit ** It dies when trying to init CBMEM, but at least it gets somewhere... Change-Id: I30200432535244de971a7cea9f7902f5e9b46403 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/arch/armv7/boot/coreboot_table.c | 17 +++++++++++++++++ src/lib/compute_ip_checksum.c | 5 +++++ src/mainboard/google/snow/ramstage.c | 21 ++++++++++++++------- 3 files changed, 36 insertions(+), 7 deletions(-) diff --git a/src/arch/armv7/boot/coreboot_table.c b/src/arch/armv7/boot/coreboot_table.c index b2d88aa..014316b 100644 --- a/src/arch/armv7/boot/coreboot_table.c +++ b/src/arch/armv7/boot/coreboot_table.c @@ -391,21 +391,30 @@ static void lb_reserve_table_memory(struct lb_header *head) static unsigned long lb_table_fini(struct lb_header *head, int fixup) { struct lb_record *rec, *first_rec; + printk(BIOS_DEBUG, "%s: entered\n", __func__); rec = lb_last_record(head); if (head->table_entries) { head->table_bytes += rec->size; } + printk(BIOS_DEBUG, "%s: checkpoint 1\n", __func__); + printk(BIOS_DEBUG, "%s: table_entries: %s, head->table_bytes: 0x%x\n", + __func__, head->table_entries ? "yes" : "no", head->table_bytes); if (fixup) lb_reserve_table_memory(head); + printk(BIOS_DEBUG, "%s: checkpoint 2\n", __func__); first_rec = lb_first_record(head); + printk(BIOS_DEBUG, "%s: checkpoint 3, first_rec: %p\n", __func__, first_rec); head->table_checksum = compute_ip_checksum(first_rec, head->table_bytes); + printk(BIOS_DEBUG, "%s: checkpoint 4\n", __func__); head->header_checksum = 0; head->header_checksum = compute_ip_checksum(head, sizeof(*head)); + printk(BIOS_DEBUG, "%s: checkpoint 5\n", __func__); printk(BIOS_DEBUG, "Wrote coreboot table at: %p, 0x%x bytes, checksum %x\n", head, head->table_bytes, head->table_checksum); + printk(BIOS_DEBUG, "%s: exitingn", __func__); return (unsigned long)rec + rec->size; } @@ -603,10 +612,18 @@ unsigned long write_coreboot_table( struct lb_memory *mem; #if CONFIG_WRITE_HIGH_TABLES + printk(BIOS_DEBUG, "low_table_start: 0x%lx, low_table_end: 0x%lx, " + "rom_table_start: 0x%lx, rom_table_end: 0x%lx\n", + low_table_start, low_table_end, + rom_table_start, rom_table_end); printk(BIOS_DEBUG, "Writing high table forward entry at 0x%08lx\n", low_table_end); head = lb_table_init(low_table_end); + printk(BIOS_DEBUG, "low_table_end: 0x%lx, head: 0x%p,... ", + low_table_end, head); + printk(BIOS_DEBUG, "writing head (0x%p)... ", head); lb_forward(head, (struct lb_header*)rom_table_end); + printk(BIOS_DEBUG, "done\n"); low_table_end = (unsigned long) lb_table_fini(head, 0); printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end); diff --git a/src/lib/compute_ip_checksum.c b/src/lib/compute_ip_checksum.c index 48f93d4..58f691a 100644 --- a/src/lib/compute_ip_checksum.c +++ b/src/lib/compute_ip_checksum.c @@ -1,6 +1,8 @@ #include <stdint.h> #include <ip_checksum.h> +#include <console/console.h> + unsigned long compute_ip_checksum(void *addr, unsigned long length) { uint8_t *ptr; @@ -15,6 +17,7 @@ unsigned long compute_ip_checksum(void *addr, unsigned long length) */ sum = 0; ptr = addr; + printk(BIOS_DEBUG, "%s: ptr: 0x%p, length: %ld\n", __func__, ptr, length); for(i = 0; i < length; i++) { unsigned long v; v = ptr[i]; @@ -28,8 +31,10 @@ unsigned long compute_ip_checksum(void *addr, unsigned long length) sum = (sum + (sum >> 16)) & 0xFFFF; } } + printk(BIOS_DEBUG, "%s: done\n", __func__); value.byte[0] = sum & 0xff; value.byte[1] = (sum >> 8) & 0xff; + printk(BIOS_DEBUG, "%s: exiting...\n", __func__); return (~value.word) & 0xFFFF; } diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 50050d3..d280dbe 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -19,14 +19,21 @@ #include <console/console.h> +#if CONFIG_WRITE_HIGH_TABLES +#include <cbmem.h> +#endif + +void hardwaremain(int boot_complete); void main(void) { -// volatile unsigned long *pshold = (unsigned long *)0x1004330c; -// *pshold &= ~0x100; /* shut down */ - - /* FIXME: console_init() seems to cause things to die... Maybe - we need to reset our stack pointer? */ -// console_init(); + console_init(); printk(BIOS_INFO, "hello from ramstage\n"); - while (1); + +#if CONFIG_WRITE_HIGH_TABLES + /* Leave some space for ACPI tables */ + high_tables_base = CONFIG_RAMBASE; + high_tables_size = CONFIG_RAMBASE + 0x100000; +#endif + + hardwaremain(0); }

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Patch set updated for coreboot: 5bf1fa5 snow: cleanup ramstage and call hardwaremain()
by David Hendricks 07 Feb '13

07 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2302 -gerrit commit 5bf1fa59748b29bd837401683a8bcd89c18b91f9 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Feb 6 16:29:42 2013 -0800 snow: cleanup ramstage and call hardwaremain() ** do not submit ** It dies when trying to init CBMEM, but at least it gets somewhere... Change-Id: I30200432535244de971a7cea9f7902f5e9b46403 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 50050d3..d280dbe 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -19,14 +19,21 @@ #include <console/console.h> +#if CONFIG_WRITE_HIGH_TABLES +#include <cbmem.h> +#endif + +void hardwaremain(int boot_complete); void main(void) { -// volatile unsigned long *pshold = (unsigned long *)0x1004330c; -// *pshold &= ~0x100; /* shut down */ - - /* FIXME: console_init() seems to cause things to die... Maybe - we need to reset our stack pointer? */ -// console_init(); + console_init(); printk(BIOS_INFO, "hello from ramstage\n"); - while (1); + +#if CONFIG_WRITE_HIGH_TABLES + /* Leave some space for ACPI tables */ + high_tables_base = CONFIG_RAMBASE; + high_tables_size = CONFIG_RAMBASE + 0x100000; +#endif + + hardwaremain(0); }

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Patch set updated for coreboot: ef01087 armv7: Clean up arm/snow bootblock build process.
by Hung-Te Lin 07 Feb '13

07 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2282 -gerrit commit ef01087dde5062b5bee45f04c127e91736843bf8 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Mon Feb 4 14:38:03 2013 +0800 armv7: Clean up arm/snow bootblock build process. Remove duplicated / testing code and share more driver for bootblock, romstage and ramstage. The __PRE_RAM__ is now also defined in bootblock build stage, since bootblock is executed before RAM is initialized. Change-Id: I4f5469b1545631eee1cf9f2f5df93cbe3a58268b Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- Makefile.inc | 6 +- src/arch/armv7/bootblock_exit.c | 28 -- src/arch/armv7/bootblock_simple.c | 10 +- src/arch/armv7/include/arch/bootblock_exit.h | 26 -- src/arch/armv7/include/arch/stages.h | 2 +- src/arch/armv7/lib/Makefile.inc | 2 +- src/arch/armv7/lib/romstage_console.c | 12 +- src/arch/armv7/stages.c | 4 +- src/console/Makefile.inc | 5 + src/cpu/samsung/exynos5-common/clk.h | 2 +- src/cpu/samsung/exynos5250/Makefile.inc | 1 + src/cpu/samsung/exynos5250/clock_init.h | 1 + src/cpu/samsung/exynos5250/power.c | 1 + src/cpu/samsung/exynos5250/uart.c | 3 + src/cpu/samsung/s5p-common/s3c24x0_i2c.c | 11 - src/drivers/maxim/max77686/Makefile.inc | 1 + src/mainboard/google/snow/bootblock.c | 536 +-------------------------- src/mainboard/google/snow/romstage.c | 59 +-- 18 files changed, 43 insertions(+), 667 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 0b473e4..069bdfe 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -111,8 +111,8 @@ $(error Your current configuration requires binary-only components, but you did endif endif -bootblock-c-ccopts:=-D__BOOT_BLOCK__ -bootblock-S-ccopts:=-D__BOOT_BLOCK__ +bootblock-c-ccopts:=-D__BOOT_BLOCK__ -D__PRE_RAM__ +bootblock-S-ccopts:=-D__BOOT_BLOCK__ -D__PRE_RAM__ smm-c-ccopts:=-D__SMM__ smm-S-ccopts:=-D__SMM__ @@ -292,7 +292,7 @@ $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $ $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__BOOT_BLOCK__ $(CFLAGS) -c -o $@ $< + $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< ####################################################################### # Clean up rules diff --git a/src/arch/armv7/bootblock_exit.c b/src/arch/armv7/bootblock_exit.c deleted file mode 100644 index 8b97d6b..0000000 --- a/src/arch/armv7/bootblock_exit.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#include <arch/bootblock_exit.h> - -void bootblock_exit(unsigned long addr) -{ - __attribute__((noreturn)) void (*doit)(void) = (void *)addr; - doit(); -} diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c index e808edc..fe2662e 100644 --- a/src/arch/armv7/bootblock_simple.c +++ b/src/arch/armv7/bootblock_simple.c @@ -38,19 +38,19 @@ static int boot_cpu(void) void main(void) { - const char *target1 = "fallback/romstage"; - unsigned long romstage_entry; + const char *stage_name = "fallback/romstage"; + void *entry; if (boot_cpu()) { bootblock_cpu_init(); bootblock_mainboard_init(); } + printk(BIOS_INFO, "hello from bootblock\n"); printk(BIOS_INFO, "bootblock main(): loading romstage\n"); - romstage_entry = (unsigned long)cbfs_load_stage( - CBFS_DEFAULT_MEDIA, target1); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); printk(BIOS_INFO, "bootblock main(): jumping to romstage\n"); - if (romstage_entry) stage_exit(romstage_entry); + if (entry) stage_exit(entry); hlt(); } diff --git a/src/arch/armv7/include/arch/bootblock_exit.h b/src/arch/armv7/include/arch/bootblock_exit.h deleted file mode 100644 index 0a039e1..0000000 --- a/src/arch/armv7/include/arch/bootblock_exit.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/** - * This is a shim that is to be compiled for the instruction set matching - * that of the entry point for the next boot stage (romstage). - */ -void bootblock_exit(unsigned long addr); diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/armv7/include/arch/stages.h index 215aaa8..671c02b 100644 --- a/src/arch/armv7/include/arch/stages.h +++ b/src/arch/armv7/include/arch/stages.h @@ -23,6 +23,6 @@ extern void main(void); void stage_entry(void) __attribute__((section(".text.stage_entry.armv7"))); -void stage_exit(unsigned long); +void stage_exit(void *); #endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index e33618b..343e9f8 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,4 +1,5 @@ bootblock-y += syslib.c +bootblock-y += romstage_console.c romstage-y += cache_v7.c romstage-y += cache-cp15.c @@ -8,7 +9,6 @@ romstage-y += romstage_console.c romstage-y += syslib.c #ramstage-y += printk_init.c -#romstage-y += walkcbfs.S ramstage-y += div0.c ramstage-y += div64.S diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c index ead26f3..42a9664 100644 --- a/src/arch/armv7/lib/romstage_console.c +++ b/src/arch/armv7/lib/romstage_console.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <console/vtxprintf.h> +// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250) #if CONFIG_SERIAL_CONSOLE #include <uart.h> #endif @@ -43,18 +44,15 @@ void console_tx_byte(unsigned char byte) #endif } -/* FIXME(dhendrix): add this back in */ -#if 0 -static void console_tx_flush(void) +static void _console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL - uart_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS); +#if CONFIG_SERIAL_CONSOLE + uart_tx_flush(); #endif #if CONFIG_USBDEBUG usbdebug_tx_flush(0); #endif } -#endif int do_printk(int msg_level, const char *fmt, ...) { @@ -69,7 +67,7 @@ int do_printk(int msg_level, const char *fmt, ...) i = vtxprintf(console_tx_byte, fmt, args); va_end(args); -// console_tx_flush(); + _console_tx_flush(); return i; } diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c index fd4374f..e8a47e5 100644 --- a/src/arch/armv7/stages.c +++ b/src/arch/armv7/stages.c @@ -38,8 +38,8 @@ void stage_entry(void) main(); } -void stage_exit(unsigned long addr) +void stage_exit(void *addr) { - __attribute__((noreturn)) void (*doit)(void) = (void *)addr; + __attribute__((noreturn)) void (*doit)(void) = addr; doit(); } diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 3c4777f..dd826d6 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -14,6 +14,11 @@ romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c +# TODO Add vtxprintf.c only when early console is required. +bootblock-y += vtxprintf.c +bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +bootblock-y += die.c + ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c ramstage-$(CONFIG_USBDEBUG) += usbdebug_console.c diff --git a/src/cpu/samsung/exynos5-common/clk.h b/src/cpu/samsung/exynos5-common/clk.h index 0178f88..eb3b253 100644 --- a/src/cpu/samsung/exynos5-common/clk.h +++ b/src/cpu/samsung/exynos5-common/clk.h @@ -52,7 +52,7 @@ struct clk_bit_info { s8 prediv_bit; }; -/* FIXME(dhendrix) conflicts with stp-common/clk.h */ +/* FIXME(dhendrix) conflicts with s5p-common/clk.h */ #if 0 unsigned long get_pll_clk(int pllreg); unsigned long get_arm_clk(void); diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 1c6d716..e2033ff 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,6 +9,7 @@ bootblock-y += clock_init.c bootblock-y += clock.c bootblock-y += pinmux.c +bootblock-y += power.c bootblock-y += soc.c bootblock-y += uart.c diff --git a/src/cpu/samsung/exynos5250/clock_init.h b/src/cpu/samsung/exynos5250/clock_init.h index 3757e7d..bb7f7e9 100644 --- a/src/cpu/samsung/exynos5250/clock_init.h +++ b/src/cpu/samsung/exynos5250/clock_init.h @@ -24,6 +24,7 @@ #ifndef __EXYNOS_CLOCK_INIT_H #define __EXYNOS_CLOCK_INIT_H +#include "dmc.h" /* These are the ratio's for configuring ARM clock */ struct arm_clk_ratios { diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 60003c4..d0650fb 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -25,6 +25,7 @@ #include <common.h> #include <arch/hlt.h> #include <arch/io.h> +#include <arch/hlt.h> #include <console/console.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index f3ee081..3126d7a 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -211,4 +211,7 @@ void uart_tx_byte(unsigned char data) { exynos5_uart_tx_byte(data); } + +void uart_tx_flush(void) { +} #endif diff --git a/src/cpu/samsung/s5p-common/s3c24x0_i2c.c b/src/cpu/samsung/s5p-common/s3c24x0_i2c.c index 2940b09..3e94ea7 100644 --- a/src/cpu/samsung/s5p-common/s3c24x0_i2c.c +++ b/src/cpu/samsung/s5p-common/s3c24x0_i2c.c @@ -221,22 +221,11 @@ void board_i2c_init(const void *blob) /* * MULTI BUS I2C support */ -/* - * FIXME(dhendrix): not sure why this had to be guarded, but the code - * should probably go into an exynos5-specific .c file if it really is - * not generic. - */ -//#ifdef CONFIG_EXYNOS5 static void i2c_bus_init(struct s3c24x0_i2c_bus *i2c, unsigned int bus) { exynos_pinmux_config(i2c->id, 0); - i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); } -//#else -//#error "should not be here" -//static void i2c_bus_init(struct s3c24x0_i2c_bus *i2c, unsigned int bus) {} -//#endif #ifdef CONFIG_I2C_MULTI_BUS int i2c_set_bus_num(unsigned int bus) diff --git a/src/drivers/maxim/max77686/Makefile.inc b/src/drivers/maxim/max77686/Makefile.inc index a5d7b90..097b291 100644 --- a/src/drivers/maxim/max77686/Makefile.inc +++ b/src/drivers/maxim/max77686/Makefile.inc @@ -17,5 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +bootblock-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c romstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c ramstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index fc0b208..64b12c6 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#if CONFIG_EARLY_SERIAL_CONSOLE #include <types.h> #include <arch/io.h> #include <cbfs.h> @@ -27,553 +28,28 @@ #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/clock_init.h> +#include <src/cpu/samsung/exynos5250/power.h> #include <drivers/maxim/max77686/max77686.h> #define I2C0_BASE 0x12c60000 - -/* - * Max77686 parameters values - * see max77686.h for parameters details - */ -struct max77686_para max77686_param[] = {/*{vol_addr, vol_bitpos, - vol_bitmask, reg_enaddr, reg_enbitpos, reg_enbitmask, reg_enbiton, - reg_enbitoff, vol_min, vol_div}*/ - {/* PMIC_BUCK1 */ 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK2 */ 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK3 */ 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK4 */ 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK5 */ 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK6 */ 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK7 */ 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK8 */ 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK9 */ 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_LDO1 */ 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, - {/* PMIC_LDO2 */ 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO3 */ 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO4 */ 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO5 */ 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO6 */ 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO7 */ 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO8 */ 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO9 */ 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO10 */ 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO11 */ 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO12 */ 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO13 */ 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO14 */ 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO15 */ 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO16 */ 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO17 */ 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO18 */ 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO19 */ 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO20 */ 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO21 */ 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO22 */ 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO23 */ 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO24 */ 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO25 */ 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO26 */ 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_EN32KHZ_CP */ 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, -}; - -/* - * Write a value to a register - * - * @param chip_addr i2c addr for max77686 - * @param reg reg number to write - * @param val value to be written - * - */ -static inline int max77686_i2c_write(unsigned char chip_addr, - unsigned int reg, unsigned char val) -{ - return i2c_write(chip_addr, reg, 1, &val, 1); -} - -/* - * Read a value from a register - * - * @param chip_addr i2c addr for max77686 - * @param reg reg number to write - * @param val value to be written - * - */ -static inline int max77686_i2c_read(unsigned char chip_addr, - unsigned int reg, unsigned char *val) -{ - return i2c_read(chip_addr, reg, 1, val, 1); -} - -/* Chip register numbers (not exported from this module) */ -enum { - REG_BBAT = 0x7e, - - /* Bits for BBAT */ - BBAT_BBCHOSTEN_MASK = 1 << 0, - BBAT_BBCVS_SHIFT = 3, - BBAT_BBCVS_MASK = 3 << BBAT_BBCVS_SHIFT, -}; - -int max77686_disable_backup_batt(void) -{ - unsigned char val; - int ret; - - //i2c_set_bus_num(0); - ret = max77686_i2c_read(MAX77686_I2C_ADDR, REG_BBAT, &val); - if (ret) { -// debug("max77686 i2c read failed\n"); - return ret; - } - - /* If we already have the correct values, exit */ - if ((val & (BBAT_BBCVS_MASK | BBAT_BBCHOSTEN_MASK)) == - BBAT_BBCVS_MASK) - return 0; - - /* First disable charging */ - val &= ~BBAT_BBCHOSTEN_MASK; - ret = max77686_i2c_write(MAX77686_I2C_ADDR, REG_BBAT, val); - if (ret) { - //debug("max77686 i2c write failed\n"); - return -1; - } - - /* Finally select 3.5V to minimize power consumption */ - val |= BBAT_BBCVS_MASK; - ret = max77686_i2c_write(MAX77686_I2C_ADDR, REG_BBAT, val); - if (ret) { - //debug("max77686 i2c write failed\n"); - return -1; - } - - return 0; -} - -static int max77686_enablereg(enum max77686_regnum reg, int enable) -{ - struct max77686_para *pmic; - unsigned char read_data; - int ret; - - pmic = &max77686_param[reg]; - - ret = max77686_i2c_read(MAX77686_I2C_ADDR, pmic->reg_enaddr, - &read_data); - if (ret != 0) { - //debug("max77686 i2c read failed.\n"); - return -1; - } - - if (enable == REG_DISABLE) { - clrbits_8(&read_data, - pmic->reg_enbitmask << pmic->reg_enbitpos); - } else { - clrsetbits_8(&read_data, - pmic->reg_enbitmask << pmic->reg_enbitpos, - pmic->reg_enbiton << pmic->reg_enbitpos); - } - - ret = max77686_i2c_write(MAX77686_I2C_ADDR, - pmic->reg_enaddr, read_data); - if (ret != 0) { - //debug("max77686 i2c write failed.\n"); - return -1; - } - - return 0; -} - -static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, - int enable, int volt_units) -{ - struct max77686_para *pmic; - unsigned char read_data; - int vol_level = 0; - int ret; - - pmic = &max77686_param[reg]; - - if (pmic->vol_addr == 0) { - //debug("not a voltage register.\n"); - return -1; - } - - ret = max77686_i2c_read(MAX77686_I2C_ADDR, pmic->vol_addr, &read_data); - if (ret != 0) { - //debug("max77686 i2c read failed.\n"); - return -1; - } - - if (volt_units == MAX77686_UV) - vol_level = volt - (u32)pmic->vol_min * 1000; - else - vol_level = (volt - (u32)pmic->vol_min) * 1000; - - if (vol_level < 0) { - //debug("Not a valid voltage level to set\n"); - return -1; - } - vol_level /= (u32)pmic->vol_div; - - clrsetbits_8(&read_data, pmic->vol_bitmask << pmic->vol_bitpos, - vol_level << pmic->vol_bitpos); - - ret = max77686_i2c_write(MAX77686_I2C_ADDR, pmic->vol_addr, read_data); - if (ret != 0) { - //debug("max77686 i2c write failed.\n"); - return -1; - } - - ret = max77686_enablereg(reg, enable); - if (ret != 0) { - //debug("Failed to enable buck/ldo.\n"); - return -1; - } - return 0; -} - -int max77686_volsetting(enum max77686_regnum reg, unsigned int volt, - int enable, int volt_units) -{ -// int old_bus = i2c_get_bus_num(); - int ret; - -// i2c_set_bus_num(0); - ret = max77686_do_volsetting(reg, volt, enable, volt_units); -// i2c_set_bus_num(old_bus); - return ret; -} - -/* power_init() stuff */ -static void power_init(void) -{ - max77686_disable_backup_batt(); - -#if 0 - /* FIXME: for debugging... */ - volatile unsigned long *addr = (unsigned long *)0x1004330c; - *addr |= 0x100; - while (1); #endif - max77686_volsetting(PMIC_BUCK2, CONFIG_VDD_ARM_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_BUCK3, CONFIG_VDD_INT_UV, - REG_ENABLE, MAX77686_UV); - max77686_volsetting(PMIC_BUCK1, CONFIG_VDD_MIF_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_BUCK4, CONFIG_VDD_G3D_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO2, CONFIG_VDD_LDO2_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO3, CONFIG_VDD_LDO3_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO5, CONFIG_VDD_LDO5_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV, - REG_ENABLE, MAX77686_MV); -} - -#include <console/vtxprintf.h> -#include <string.h> -#define ZEROPAD 1 /* pad with zero */ -#define SIGN 2 /* unsigned/signed long */ -#define PLUS 4 /* show plus */ -#define SPACE 8 /* space if plus */ -#define LEFT 16 /* left justified */ -#define SPECIAL 32 /* 0x */ -#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ -/* haha, don't need ctype.c */ -#define isdigit(c) ((c) >= '0' && (c) <= '9') -#define is_digit isdigit -#define isxdigit(c) (((c) >= '0' && (c) <= '9') || ((c) >= 'a' && (c) <= 'f') || ((c) >= 'A' && (c) <= 'F')) - -static int skip_atoi(const char **s) -{ - int i=0; - - while (is_digit(**s)) - i = i*10 + *((*s)++) - '0'; - return i; -} - -#include <div64.h> -static int number(void (*tx_byte)(unsigned char byte), - unsigned long long num, int base, int size, int precision, int type) -{ - char c,sign,tmp[66]; - const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; - int i; - int count = 0; - - if (type & LARGE) - digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; - if (type & LEFT) - type &= ~ZEROPAD; - if (base < 2 || base > 36) - return 0; - c = (type & ZEROPAD) ? '0' : ' '; - sign = 0; - if (type & SIGN) { - if ((signed long long)num < 0) { - sign = '-'; - num = -num; - size--; - } else if (type & PLUS) { - sign = '+'; - size--; - } else if (type & SPACE) { - sign = ' '; - size--; - } - } - if (type & SPECIAL) { - if (base == 16) - size -= 2; - else if (base == 8) - size--; - } - i = 0; - if (num == 0) { - tmp[i++]='0'; - } else while (num != 0) { - /* FIXME: do_div was broken */ -// tmp[i++] = digits[do_div(num,base)]; - tmp[i++] = digits[num & 0xf]; - num = num >> 4; - } - if (i > precision) - precision = i; - size -= precision; - if (!(type&(ZEROPAD+LEFT))) - while(size-->0) - tx_byte(' '), count++; - if (sign) - tx_byte(sign), count++; - if (type & SPECIAL) { - if (base==8) - tx_byte('0'), count++; - else if (base==16) { - tx_byte('0'), count++; - tx_byte(digits[33]), count++; - } - } - if (!(type & LEFT)) - while (size-- > 0) - tx_byte(c), count++; - while (i < precision--) - tx_byte('0'), count++; - while (i-- > 0) - tx_byte(tmp[i]), count++; - while (size-- > 0) - tx_byte(' '), count++; - return count; -} - -int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args) -{ - int len; - unsigned long long num; - int i, base; - const char *s; - - int flags; /* flags to number() */ - - int field_width; /* width of output field */ - int precision; /* min. # of digits for integers; max - number of chars for from string */ - int qualifier; /* 'h', 'l', or 'L' for integer fields */ - - int count; - - for (count=0; *fmt ; ++fmt) { - if (*fmt != '%') { - tx_byte(*fmt), count++; - continue; - } - - /* process flags */ - flags = 0; -repeat: - ++fmt; /* this also skips first '%' */ - switch (*fmt) { - case '-': flags |= LEFT; goto repeat; - case '+': flags |= PLUS; goto repeat; - case ' ': flags |= SPACE; goto repeat; - case '#': flags |= SPECIAL; goto repeat; - case '0': flags |= ZEROPAD; goto repeat; - } - - /* get field width */ - field_width = -1; - if (is_digit(*fmt)) - field_width = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - field_width = va_arg(args, int); - if (field_width < 0) { - field_width = -field_width; - flags |= LEFT; - } - } - - /* get the precision */ - precision = -1; - if (*fmt == '.') { - ++fmt; - if (is_digit(*fmt)) - precision = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - precision = va_arg(args, int); - } - if (precision < 0) - precision = 0; - } - - /* get the conversion qualifier */ - qualifier = -1; - if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt == 'z') { - qualifier = *fmt; - ++fmt; - if (*fmt == 'l') { - qualifier = 'L'; - ++fmt; - } - } - - /* default base */ - base = 10; - - switch (*fmt) { - case 'c': - if (!(flags & LEFT)) - while (--field_width > 0) - tx_byte(' '), count++; - tx_byte((unsigned char) va_arg(args, int)), count++; - while (--field_width > 0) - tx_byte(' '), count++; - continue; - - case 's': - s = va_arg(args, char *); - if (!s) - s = "<NULL>"; - - len = strnlen(s, precision); - - if (!(flags & LEFT)) - while (len < field_width--) - tx_byte(' '), count++; - for (i = 0; i < len; ++i) - tx_byte(*s++), count++; - while (len < field_width--) - tx_byte(' '), count++; - continue; - - case 'p': - if (field_width == -1) { - field_width = 2*sizeof(void *); - flags |= ZEROPAD; - } - count += number(tx_byte, - (unsigned long) va_arg(args, void *), 16, - field_width, precision, flags); - continue; - - case 'n': - if (qualifier == 'L') { - long long *ip = va_arg(args, long long *); - *ip = count; - } else if (qualifier == 'l') { - long * ip = va_arg(args, long *); - *ip = count; - } else { - int * ip = va_arg(args, int *); - *ip = count; - } - continue; - - case '%': - tx_byte('%'), count++; - continue; - - /* integer number formats - set up the flags and "break" */ - case 'o': - base = 8; - break; - - case 'X': - flags |= LARGE; - case 'x': - base = 16; - break; - - case 'd': - case 'i': - flags |= SIGN; - case 'u': - break; - - default: - tx_byte('%'), count++; - if (*fmt) - tx_byte(*fmt), count++; - else - --fmt; - continue; - } - if (qualifier == 'L') { - num = va_arg(args, unsigned long long); - } else if (qualifier == 'l') { - num = va_arg(args, unsigned long); - } else if (qualifier == 'z') { - num = va_arg(args, size_t); - } else if (qualifier == 'h') { - num = (unsigned short) va_arg(args, int); - if (flags & SIGN) - num = (short) num; - } else if (flags & SIGN) { - num = va_arg(args, int); - } else { - num = va_arg(args, unsigned int); - } - count += number(tx_byte, num, base, field_width, precision, flags); - } - return count; -} - -int do_printk(int msg_level, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vtxprintf(uart_tx_byte, fmt, args); - va_end(args); - - return i; -} - void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { struct mem_timings *mem; struct arm_clk_ratios *arm_ratios; - /* FIXME: we should not need UART in bootblock, this is only - done for testing purposes */ i2c_set_early_reg(I2C0_BASE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); power_init(); mem = get_mem_timings(); arm_ratios = get_arm_clk_ratios(); system_clock_init(mem, arm_ratios); + +#if CONFIG_EARLY_SERIAL_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); - printk(BIOS_INFO, "%s: UART initialized\n", __func__); - printk(BIOS_INFO, "%s: finished\n", __func__); + printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__); +#endif } diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 690d4aa..b8e5116 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -47,15 +47,12 @@ static int board_wakeup_permitted(void) void main(void) { - struct cbfs_media cbfs; -// i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -// power_init(); -// clock_init(); -// exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); - console_init(); - printk(BIOS_INFO, "hello from romstage\n"); struct mem_timings *mem; int ret; + void *entry; + + console_init(); + printk(BIOS_INFO, "hello from romstage\n"); mem = get_mem_timings(); if (!mem) { @@ -76,51 +73,9 @@ void main(void) } printk(BIOS_INFO, "ddr3_init done\n"); - /* wow, did it work? */ - int i; - u32 *c = (void *)CONFIG_RAMBASE; - -// mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024); -// printk(BIOS_INFO, "mmu_setup done\n"); - for(i = 0; i < 16384; i++) - c[i] = i+32768; - for(i = 0; i < 16384; i++) - if (c[i] != i+32768) - printk(BIOS_SPEW, "BADc[%02x]: %02x,", i, c[i]); - for(i = 0; i < 1048576; i++) - c[i] = 0; - - ret = init_default_cbfs_media(&cbfs); - if (ret){ - printk(BIOS_ERR, "init_default_cbfs_media returned %d: HALT\n", - ret); - while (1); - } - - struct cbfs_stage *stage = (struct cbfs_stage *) - cbfs_get_file_content(&cbfs, "fallback/coreboot_ram", - CBFS_TYPE_STAGE); - printk(BIOS_ERR, "Stage: %p\n", stage); - printk(BIOS_ERR, "loading stage %s @ 0x%x (0x%x bytes),entry @ 0x%p\n", - "ram stage", - (uint32_t) stage->load, stage->memlen, - (void *)(u32)stage->entry); - -#if 0 - /* for reference and testing ... we should be able to remove soon */ -// c = (void *)(u32)(stage->load + stage->len); - c = (void *)(u32)(stage->load); - printk(BIOS_ERR, "memzero 0x%x words starting at %p\n", - (stage->memlen /*- stage->len*/)/4, c); - for(i = 0; i < (stage->memlen /*- stage->len*/)/4; i++){ - printk(BIOS_INFO, "%p, ", &c[i]); - c[i] = 0; - } -#endif - void *entry = cbfs_load_stage(&cbfs, "fallback/coreboot_ram"); - printk(BIOS_INFO, "entry is %p\n", entry); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); - printk(BIOS_INFO, "sayonara, romstage!\n"); - stage_exit((unsigned long)entry); + stage_exit(entry); }

1 0

Patch set updated for coreboot: 7a60eca console: Revise serial console configuration names.
by Hung-Te Lin 07 Feb '13

07 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2299 -gerrit commit 7a60eca29dbb24172553f54ade06153912cb7d02 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 21:24:12 2013 +0800 console: Revise serial console configuration names. The console drivers (especially serial drivers) in Kconfig were named in different styles. This CL will change configuration names to a better naming style. - EARLY_CONSOLE: Enable output in pre-ram stage. (Renamed from EARLY_SERIAL_CONSOLE because it also supports non-serial) - CONSOLE_SERIAL: Enable serial output console, from one of the serial drivers. (Renamed from SERIAL_CONSOLE because other non-serial drivers were named as CONSOLE_XXX like CONSOLE_CBMEM) - CONSOLE_SERIAL_UART: Device-specific UART driver. (Renamed from CONSOLE_SERIAL_NONSTANDARD_MEM because it may be not memory-mapped) - HAVE_UART_SPECIAL: A dependency for CONSOLE_SERIAL_UART. Change-Id: I4bea3c8fea05bbb7d78df6bc22f82414ac66f973 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/Kconfig | 4 ++++ src/arch/armv7/lib/romstage_console.c | 6 +++--- src/console/Kconfig | 39 ++++++++++++++++++----------------- src/console/Makefile.inc | 4 ++-- src/console/console.c | 2 +- src/cpu/Kconfig | 2 +- src/cpu/samsung/Kconfig | 5 ++++- src/include/console/console.h | 4 ++-- src/mainboard/google/snow/Kconfig | 5 ++--- src/mainboard/google/snow/bootblock.c | 4 ++-- 10 files changed, 41 insertions(+), 34 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 92bdf11..32a63d8 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -277,6 +277,10 @@ config HAVE_UART_MEMORY_MAPPED bool default n +config HAVE_UART_SPECIAL + bool + default n + config HAVE_ACPI_RESUME bool default n diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c index 42a9664..b0ac34e 100644 --- a/src/arch/armv7/lib/romstage_console.c +++ b/src/arch/armv7/lib/romstage_console.c @@ -20,7 +20,7 @@ #include <console/console.h> #include <console/vtxprintf.h> // TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250) -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL #include <uart.h> #endif #if CONFIG_USBDEBUG @@ -33,7 +33,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL_UART uart_tx_byte(byte); #endif #if CONFIG_USBDEBUG @@ -46,7 +46,7 @@ void console_tx_byte(unsigned char byte) static void _console_tx_flush(void) { -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL_UART uart_tx_flush(); #endif #if CONFIG_USBDEBUG diff --git a/src/console/Kconfig b/src/console/Kconfig index b1f41de..e57d568 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -1,20 +1,21 @@ menu "Console" -config SERIAL_CONSOLE - bool "Serial port console output" - default y - help - Send coreboot debug output to a serial port -config EARLY_SERIAL_CONSOLE - bool - depends on SERIAL_CONSOLE +config EARLY_CONSOLE + bool "Enable early (pre-RAM) console output." default n help - Use serial console during early (pre-RAM) boot stages + Use console during early (pre-RAM) boot stages + +config CONSOLE_SERIAL + bool "Serial port console output" + default y + help + Send coreboot debug output to a serial port (should be one or more of + CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART) config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL depends on HAVE_UART_IO_MAPPED default y help @@ -22,21 +23,21 @@ config CONSOLE_SERIAL8250 config CONSOLE_SERIAL8250MEM bool "Serial port console output (memory mapped, 8250-compatible)" - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL depends on HAVE_UART_MEMORY_MAPPED help Send coreboot debug output to a memory mapped serial port console. -config CONSOLE_SERIAL_NONSTANDARD_MEM - bool "Serial port console output (memory-mapped, device-specific)" - depends on SERIAL_CONSOLE - depends on HAVE_UART_MEMORY_MAPPED +config CONSOLE_SERIAL_UART + bool "Serial port console output (device-specific UART)" + depends on CONSOLE_SERIAL + depends on HAVE_UART_SPECIAL + default y help - Send coreboot debug output to a memory mapped serial port console - on a device-specific UART. + Send coreboot debug output to a device-specific serial port console. choice - prompt "Serial port" + prompt "Serial port for 8250" default CONSOLE_SERIAL_COM1 depends on CONSOLE_SERIAL8250 @@ -72,7 +73,7 @@ config TTYS0_BASE choice prompt "Baud rate" default CONSOLE_SERIAL_115200 - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_115200 bool "115200" diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index dd826d6..8e6037a 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,13 +10,13 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +romstage-$(CONFIG_EARLY_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c # TODO Add vtxprintf.c only when early console is required. bootblock-y += vtxprintf.c -bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +bootblock-$(CONFIG_EARLY_CONSOLE) += console.c bootblock-y += die.c ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c diff --git a/src/console/console.c b/src/console/console.c index 4c47d7f..d4b4b88 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -107,7 +107,7 @@ void console_init(void) enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index ddc46cf..c2c3816 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,7 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool - select EARLY_SERIAL_CONSOLE + select EARLY_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/Kconfig b/src/cpu/samsung/Kconfig index abfc049..c905b2a 100644 --- a/src/cpu/samsung/Kconfig +++ b/src/cpu/samsung/Kconfig @@ -5,7 +5,10 @@ config CPU_SAMSUNG_EXYNOS config CPU_SAMSUNG_EXYNOS5 depends on ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS - select EARLY_SERIAL_CONSOLE + select HAVE_UART_SPECIAL + # TODO remove EARLY_CONSOLE when we can run ramstage without early UART + # init. + select EARLY_CONSOLE bool default n diff --git a/src/include/console/console.h b/src/include/console/console.h index 375e5a4..edd49e0 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -24,8 +24,8 @@ #include <console/loglevel.h> #include <console/post_codes.h> -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> +#if CONFIG_CONSOLE_SERIAL +#include <uart.h> #endif #if CONFIG_USBDEBUG #include <usbdebug.h> diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index a0c76d6..bee987d 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS5 select HAVE_UART_MEMORY_MAPPED - select CONSOLE_SERIAL_NONSTANDARD_MEM # enable serial debugging # select EC_GOOGLE_CHROMEEC select BOARD_ROMSIZE_KB_4096 select DRIVER_MAXIM_MAX77686 @@ -71,7 +70,7 @@ config NR_DRAM_BANKS choice prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_NONSTANDARD_MEM + depends on CONSOLE_SERIAL_UART config CONSOLE_SERIAL_UART0 bool "UART0" @@ -97,7 +96,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_NONSTANDARD_MEM + depends on CONSOLE_SERIAL_UART default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 64b12c6..ff5e4a0 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if CONFIG_EARLY_SERIAL_CONSOLE +#if CONFIG_EARLY_CONSOLE #include <types.h> #include <arch/io.h> #include <cbfs.h> @@ -47,7 +47,7 @@ void bootblock_mainboard_init(void) arm_ratios = get_arm_clk_ratios(); system_clock_init(mem, arm_ratios); -#if CONFIG_EARLY_SERIAL_CONSOLE +#if CONFIG_EARLY_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__);

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Patch set updated for coreboot: 09babf8 armv7: Unify console in all stages.
by Hung-Te Lin 07 Feb '13

07 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2301 -gerrit commit 09babf85cd278e7332472025edfaf555ac74784a Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 22:01:18 2013 +0800 armv7: Unify console in all stages. Uses same console initialization procedure for all ARM stages (bootblock, romstage, and ramstage): #include <console/console.h> console_init() ... printk(level, format, ...) Change-Id: Idd689219035e67450ea133838a2ca02f8d74557e Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/arch/armv7/Makefile.inc | 9 ++-- src/arch/armv7/bootblock_simple.c | 2 + src/arch/armv7/include/common.h | 13 ------ src/arch/armv7/lib/Makefile.inc | 6 +-- src/arch/armv7/lib/early_console.c | 81 +++++++++++++++++++++++++++++++++ src/arch/armv7/lib/romstage_console.c | 73 ----------------------------- src/cpu/samsung/exynos5-common/uart.h | 2 - src/cpu/samsung/exynos5250/Makefile.inc | 13 ++---- src/cpu/samsung/exynos5250/uart.c | 4 +- src/include/uart.h | 5 +- src/mainboard/google/snow/bootblock.c | 12 ++--- src/mainboard/google/snow/ramstage.c | 4 +- 12 files changed, 102 insertions(+), 122 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 7d02e7c..0471b94 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -223,17 +223,18 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ + -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) @printf " LINK $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c index fe2662e..0132b87 100644 --- a/src/arch/armv7/bootblock_simple.c +++ b/src/arch/armv7/bootblock_simple.c @@ -23,6 +23,7 @@ #include <arch/hlt.h> #include <arch/stages.h> #include <cbfs.h> +#include <console/console.h> #include "stages.c" @@ -46,6 +47,7 @@ void main(void) bootblock_mainboard_init(); } + console_init(); printk(BIOS_INFO, "hello from bootblock\n"); printk(BIOS_INFO, "bootblock main(): loading romstage\n"); entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); diff --git a/src/arch/armv7/include/common.h b/src/arch/armv7/include/common.h index d95a74d..d8698db 100644 --- a/src/arch/armv7/include/common.h +++ b/src/arch/armv7/include/common.h @@ -422,19 +422,6 @@ int strcmp_compar(const void *, const void *); /* lib/time.c */ void udelay (unsigned long); -#if 0 -/* lib/vsprintf.c */ -ulong simple_strtoul(const char *cp,char **endp,unsigned int base); -int strict_strtoul(const char *cp, unsigned int base, unsigned long *res); -unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base); -long simple_strtol(const char *cp,char **endp,unsigned int base); -void panic(const char *fmt, ...) - __attribute__ ((format (__printf__, 1, 2), noreturn)); -int sprintf(char * buf, const char *fmt, ...) - __attribute__ ((format (__printf__, 2, 3))); -int vsprintf(char *buf, const char *fmt, va_list args); -#endif - /* lib/strmhz.c */ char * strmhz(char *buf, unsigned long hz); diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index 343e9f8..048e071 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,14 +1,12 @@ bootblock-y += syslib.c -bootblock-y += romstage_console.c +bootblock-$(CONFIG_EARLY_CONSOLE) += early_console.c romstage-y += cache_v7.c romstage-y += cache-cp15.c romstage-y += div0.c romstage-y += div64.S -romstage-y += romstage_console.c romstage-y += syslib.c - -#ramstage-y += printk_init.c +romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c ramstage-y += div0.c ramstage-y += div64.S diff --git a/src/arch/armv7/lib/early_console.c b/src/arch/armv7/lib/early_console.c new file mode 100644 index 0000000..68e81c6 --- /dev/null +++ b/src/arch/armv7/lib/early_console.c @@ -0,0 +1,81 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <console/console.h> +#include <console/vtxprintf.h> + +/* FIXME: need to make console driver more generic */ +void console_tx_byte(unsigned char byte) +{ + if (byte == '\n') + console_tx_byte('\r'); + +#if CONFIG_CONSOLE_SERIAL8250MEM + if (oxford_oxpcie_present) { + uart8250_mem_tx_byte( + CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte); + } +#endif +#if CONFIG_CONSOLE_SERIAL8250 + uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); +#endif +#if CONFIG_CONSOLE_SERIAL_UART + uart_tx_byte(byte); +#endif +#if CONFIG_USBDEBUG + usbdebug_tx_byte(0, byte); +#endif +#if CONFIG_CONSOLE_CBMEM + cbmemc_tx_byte(byte); +#endif +} + +static void _console_tx_flush(void) +{ +#if CONFIG_CONSOLE_SERIAL8250MEM + uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); +#endif +#if CONFIG_CONSOLE_SERIAL8250 + uart8250_tx_flush(CONFIG_TTYS0_BASE); +#endif +#if CONFIG_CONSOLE_SERIAL_UART + uart_tx_flush(); +#endif +#if CONFIG_USBDEBUG + usbdebug_tx_flush(0); +#endif +} + +int do_printk(int msg_level, const char *fmt, ...) +{ + va_list args; + int i; + + if (msg_level > console_loglevel) { + return 0; + } + + va_start(args, fmt); + i = vtxprintf(console_tx_byte, fmt, args); + va_end(args); + + _console_tx_flush(); + + return i; +} diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c deleted file mode 100644 index b0ac34e..0000000 --- a/src/arch/armv7/lib/romstage_console.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#include <console/console.h> -#include <console/vtxprintf.h> -// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250) -#if CONFIG_CONSOLE_SERIAL -#include <uart.h> -#endif -#if CONFIG_USBDEBUG -#include <usbdebug.h> -#endif - -/* FIXME: need to make console driver more generic */ -void console_tx_byte(unsigned char byte) -{ - if (byte == '\n') - console_tx_byte('\r'); - -#if CONFIG_CONSOLE_SERIAL_UART - uart_tx_byte(byte); -#endif -#if CONFIG_USBDEBUG - usbdebug_tx_byte(0, byte); -#endif -#if CONFIG_CONSOLE_CBMEM - cbmemc_tx_byte(byte); -#endif -} - -static void _console_tx_flush(void) -{ -#if CONFIG_CONSOLE_SERIAL_UART - uart_tx_flush(); -#endif -#if CONFIG_USBDEBUG - usbdebug_tx_flush(0); -#endif -} - -int do_printk(int msg_level, const char *fmt, ...) -{ - va_list args; - int i; - - if (msg_level > console_loglevel) { - return 0; - } - - va_start(args, fmt); - i = vtxprintf(console_tx_byte, fmt, args); - va_end(args); - - _console_tx_flush(); - - return i; -} diff --git a/src/cpu/samsung/exynos5-common/uart.h b/src/cpu/samsung/exynos5-common/uart.h index 52da62d..350e224 100644 --- a/src/cpu/samsung/exynos5-common/uart.h +++ b/src/cpu/samsung/exynos5-common/uart.h @@ -52,6 +52,4 @@ static inline int s5p_uart_divslot(void) return 0; } -void uart_init(void); - #endif diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index e2033ff..7e11536 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -11,7 +11,7 @@ bootblock-y += clock.c bootblock-y += pinmux.c bootblock-y += power.c bootblock-y += soc.c -bootblock-y += uart.c +bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c romstage-y += clock.c romstage-y += clock_init.c @@ -19,23 +19,18 @@ romstage-y += exynos_cache.c romstage-y += pinmux.c romstage-y += power.c romstage-y += soc.c -romstage-y += uart.c romstage-y += dmc_common.c romstage-y += dmc_init_ddr3.c +romstage-$(CONFIG_EARLY_CONSOLE) += uart.c -#ramstage-y += clock.c -#ramstage-y += clock_init.c -#ramstage-y += power.c -#ramstage-y += uart.c -#ramstage-y += pinmux.c -##ramstage-y += tzpc_init.c +#ramstage-y += tzpc_init.c ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += exynos_cache.c ramstage-y += pinmux.c ramstage-y += power.c ramstage-y += soc.c -ramstage-y += uart.c +ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c #ramstage-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 3126d7a..dacdc10 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -28,6 +28,8 @@ #include <console/console.h> /* for __console definition */ #include <cpu/samsung/exynos5-common/exynos5-common.h> +#include <cpu/samsung/exynos5-common/uart.h> +#include <cpu/samsung/exynos5250/uart.h> #include <cpu/samsung/exynos5250/clk.h> #define RX_FIFO_COUNT_MASK 0xff @@ -188,7 +190,7 @@ static void exynos5_uart_tx_byte(unsigned char data) writeb(data, &uart->utxh); } -#if !defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__) +#if !defined(__PRE_RAM__) static const struct console_driver exynos5_uart_console __console = { .init = exynos5_init_dev, .tx_byte = exynos5_uart_tx_byte, diff --git a/src/include/uart.h b/src/include/uart.h index e424496..ca5191e 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -30,14 +30,11 @@ #include <uart8250.h> #endif -#if CONFIG_CPU_SAMSUNG_EXYNOS5 -#include <cpu/samsung/exynos5-common/uart.h> -#endif - #if !defined(__ROMCC__) && CONFIG_CONSOLE_SERIAL_UART unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); +void uart_init(void); #endif #endif /* UART_H */ diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index ff5e4a0..be5a99f 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,12 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if CONFIG_EARLY_CONSOLE #include <types.h> #include <arch/io.h> -#include <cbfs.h> -#include <uart.h> -#include <console/console.h> #include <device/i2c.h> #include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/dmc.h> @@ -30,9 +26,9 @@ #include <cpu/samsung/exynos5250/clock_init.h> #include <src/cpu/samsung/exynos5250/power.h> #include <drivers/maxim/max77686/max77686.h> +#include <console/console.h> #define I2C0_BASE 0x12c60000 -#endif void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) @@ -46,10 +42,8 @@ void bootblock_mainboard_init(void) mem = get_mem_timings(); arm_ratios = get_arm_clk_ratios(); system_clock_init(mem, arm_ratios); - -#if CONFIG_EARLY_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); - uart_init(); + + console_init(); printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__); -#endif } diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 50050d3..f9d9c96 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -24,9 +24,7 @@ void main(void) // volatile unsigned long *pshold = (unsigned long *)0x1004330c; // *pshold &= ~0x100; /* shut down */ - /* FIXME: console_init() seems to cause things to die... Maybe - we need to reset our stack pointer? */ -// console_init(); + console_init(); printk(BIOS_INFO, "hello from ramstage\n"); while (1); }

1 0

Patch set updated for coreboot: 7c27085 console: Support EARLY_CONSOLE correctly.
by Hung-Te Lin 07 Feb '13

07 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2300 -gerrit commit 7c27085b65b919404e4a9ea3578e2f0f46bd0146 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 21:51:15 2013 +0800 console: Support EARLY_CONSOLE correctly. Refines console source file dependency (especially for EARLY_CONSOLE), and interprets printk/console_init according to EARLY_CONSOLE setting (no-ops if EARLY_CONSOLE is not defined). Change-Id: Idbbd3a26bc1135c9d3ae282aad486961fb60e0ea Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/arch/x86/lib/Makefile.inc | 2 +- src/console/Makefile.inc | 9 ++++----- src/console/console.c | 8 +++++--- src/include/console/console.h | 16 ++++++++++++++-- src/include/uart.h | 4 ++-- 5 files changed, 26 insertions(+), 13 deletions(-) diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index f4dc8b8..49d7e9e 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -10,7 +10,7 @@ ramstage-y += memcpy.c ramstage-y += ebda.c ramstage-y += rom_media.c -romstage-y += romstage_console.c +romstage-$(CONFIG_EARLY_CONSOLE) += romstage_console.c romstage-y += cbfs_and_run.c romstage-y += memset.c romstage-y += memcpy.c diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 8e6037a..9499180 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -9,14 +9,13 @@ smm-y += printk.c smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c -romstage-y += vtxprintf.c -romstage-$(CONFIG_EARLY_CONSOLE) += console.c +romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c +romstage-y += console.c romstage-y += post.c romstage-y += die.c -# TODO Add vtxprintf.c only when early console is required. -bootblock-y += vtxprintf.c -bootblock-$(CONFIG_EARLY_CONSOLE) += console.c +bootblock-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c +bootblock-y += console.c bootblock-y += die.c ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c diff --git a/src/console/console.c b/src/console/console.c index d4b4b88..fc77df7 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -99,10 +99,10 @@ int console_tst_byte(void) #else // __PRE_RAM__ ^^^ NOT defined vvv defined -#include <uart.h> - void console_init(void) { +#if CONFIG_EARLY_CONSOLE + #if CONFIG_USBDEBUG enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); @@ -127,5 +127,7 @@ void console_init(void) COREBOOT_BUILD " starting...\n"; print_info(console_test); + +#endif /* CONFIG_EARLY_CONSOLE */ } -#endif +#endif /* __PRE_RAM__ */ diff --git a/src/include/console/console.h b/src/include/console/console.h index edd49e0..497a517 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -74,6 +74,15 @@ void mainboard_post(u8 value); void __attribute__ ((noreturn)) die(const char *msg); int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); +#if defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE + +static inline void printk(int LEVEL, const char *fmt, ...); +static inline void printk(int LEVEL, const char *fmt, ...) { + /* Do nothing. */ +} + +#else /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */ + #undef WE_CLEANED_UP_ALL_SIDE_EFFECTS /* We saw some strange effects in the past like coreboot crashing while * disabling cache as ram for a maximum console log level of 6 and above while @@ -97,7 +106,7 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, } \ } while(0) -#else +#else /* WE_CLEANED_UP_ALL_SIDE_EFFECTS */ #define printk(LEVEL, fmt, args...) \ do { \ @@ -107,7 +116,10 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, do_printk(BIOS_NEVER, fmt, ##args); \ } \ } while(0) -#endif + +#endif /* WE_CLEANED_UP_ALL_SIDE_EFFECTS */ + +#endif /* defined(__PRE_RAM__) && !CONFIG_EARLY_CONSOLE */ #define print_emerg(STR) printk(BIOS_EMERG, "%s", (STR)) #define print_alert(STR) printk(BIOS_ALERT, "%s", (STR)) diff --git a/src/include/uart.h b/src/include/uart.h index 2a72575..e424496 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -26,7 +26,7 @@ #ifndef UART_H #define UART_H -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif @@ -34,7 +34,7 @@ #include <cpu/samsung/exynos5-common/uart.h> #endif -#ifndef __ROMCC__ +#if !defined(__ROMCC__) && CONFIG_CONSOLE_SERIAL_UART unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void);

1 0

Patch merged into coreboot/master: c720d8d cbfs: Fix CBFS max size calculation.
by gerrit＠coreboot.org 07 Feb '13

07 Feb '13

the following patch was just integrated into master: commit c720d8d5d419d8e9128392cd7ab90e3a3fca1d4b Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 12:11:57 2013 +0800 cbfs: Fix CBFS max size calculation. For x86, the old CBFS search behavior was to bypass bootblock and we should keep that. This will speed up searching if a file does not exist in CBFS. For arm, the size in header is correct now so we can remove the hack by CONFIG_ROM_SIZE. Change-Id: I541961bc4dd083a583f8a80b69e293694fb055ef Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2292 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Wed Feb 6 19:39:51 2013, giving +1 Build-Tested: build bot (Jenkins) at Wed Feb 6 05:45:32 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Wed Feb 6 10:50:58 2013, giving +2 See http://review.coreboot.org/2292 for details. -gerrit

1 0

Patch set updated for coreboot: 9695841 armv7: Clean up arm/snow bootblock build process.
by Hung-Te Lin 07 Feb '13

07 Feb '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2282 -gerrit commit 969584172c55f0f6cf677cf8227a9fc5eedc1911 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Mon Feb 4 14:38:03 2013 +0800 armv7: Clean up arm/snow bootblock build process. Remove duplicated / testing code and share more driver for bootblock, romstage and ramstage. The __PRE_RAM__ is now also defined in bootblock build stage, since bootblock is also executed before RAM is initialized. Change-Id: I4f5469b1545631eee1cf9f2f5df93cbe3a58268b Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- Makefile.inc | 6 +- src/arch/armv7/bootblock_exit.c | 28 -- src/arch/armv7/bootblock_simple.c | 10 +- src/arch/armv7/include/arch/bootblock_exit.h | 26 -- src/arch/armv7/include/arch/stages.h | 2 +- src/arch/armv7/lib/Makefile.inc | 2 +- src/arch/armv7/lib/romstage_console.c | 12 +- src/arch/armv7/stages.c | 4 +- src/console/Makefile.inc | 5 + src/cpu/samsung/exynos5-common/clk.h | 2 +- src/cpu/samsung/exynos5250/Makefile.inc | 1 + src/cpu/samsung/exynos5250/clock_init.h | 1 + src/cpu/samsung/exynos5250/power.c | 1 + src/cpu/samsung/exynos5250/uart.c | 3 + src/cpu/samsung/s5p-common/s3c24x0_i2c.c | 11 - src/drivers/maxim/max77686/Makefile.inc | 1 + src/mainboard/google/snow/bootblock.c | 536 +-------------------------- src/mainboard/google/snow/romstage.c | 59 +-- 18 files changed, 43 insertions(+), 667 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 0b473e4..069bdfe 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -111,8 +111,8 @@ $(error Your current configuration requires binary-only components, but you did endif endif -bootblock-c-ccopts:=-D__BOOT_BLOCK__ -bootblock-S-ccopts:=-D__BOOT_BLOCK__ +bootblock-c-ccopts:=-D__BOOT_BLOCK__ -D__PRE_RAM__ +bootblock-S-ccopts:=-D__BOOT_BLOCK__ -D__PRE_RAM__ smm-c-ccopts:=-D__SMM__ smm-S-ccopts:=-D__SMM__ @@ -292,7 +292,7 @@ $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $ $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__BOOT_BLOCK__ $(CFLAGS) -c -o $@ $< + $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< ####################################################################### # Clean up rules diff --git a/src/arch/armv7/bootblock_exit.c b/src/arch/armv7/bootblock_exit.c deleted file mode 100644 index 8b97d6b..0000000 --- a/src/arch/armv7/bootblock_exit.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -#include <arch/bootblock_exit.h> - -void bootblock_exit(unsigned long addr) -{ - __attribute__((noreturn)) void (*doit)(void) = (void *)addr; - doit(); -} diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c index e808edc..fe2662e 100644 --- a/src/arch/armv7/bootblock_simple.c +++ b/src/arch/armv7/bootblock_simple.c @@ -38,19 +38,19 @@ static int boot_cpu(void) void main(void) { - const char *target1 = "fallback/romstage"; - unsigned long romstage_entry; + const char *stage_name = "fallback/romstage"; + void *entry; if (boot_cpu()) { bootblock_cpu_init(); bootblock_mainboard_init(); } + printk(BIOS_INFO, "hello from bootblock\n"); printk(BIOS_INFO, "bootblock main(): loading romstage\n"); - romstage_entry = (unsigned long)cbfs_load_stage( - CBFS_DEFAULT_MEDIA, target1); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); printk(BIOS_INFO, "bootblock main(): jumping to romstage\n"); - if (romstage_entry) stage_exit(romstage_entry); + if (entry) stage_exit(entry); hlt(); } diff --git a/src/arch/armv7/include/arch/bootblock_exit.h b/src/arch/armv7/include/arch/bootblock_exit.h deleted file mode 100644 index 0a039e1..0000000 --- a/src/arch/armv7/include/arch/bootblock_exit.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -/** - * This is a shim that is to be compiled for the instruction set matching - * that of the entry point for the next boot stage (romstage). - */ -void bootblock_exit(unsigned long addr); diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/armv7/include/arch/stages.h index 215aaa8..671c02b 100644 --- a/src/arch/armv7/include/arch/stages.h +++ b/src/arch/armv7/include/arch/stages.h @@ -23,6 +23,6 @@ extern void main(void); void stage_entry(void) __attribute__((section(".text.stage_entry.armv7"))); -void stage_exit(unsigned long); +void stage_exit(void *); #endif diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc index e33618b..343e9f8 100644 --- a/src/arch/armv7/lib/Makefile.inc +++ b/src/arch/armv7/lib/Makefile.inc @@ -1,4 +1,5 @@ bootblock-y += syslib.c +bootblock-y += romstage_console.c romstage-y += cache_v7.c romstage-y += cache-cp15.c @@ -8,7 +9,6 @@ romstage-y += romstage_console.c romstage-y += syslib.c #ramstage-y += printk_init.c -#romstage-y += walkcbfs.S ramstage-y += div0.c ramstage-y += div64.S diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c index ead26f3..42a9664 100644 --- a/src/arch/armv7/lib/romstage_console.c +++ b/src/arch/armv7/lib/romstage_console.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <console/vtxprintf.h> +// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250) #if CONFIG_SERIAL_CONSOLE #include <uart.h> #endif @@ -43,18 +44,15 @@ void console_tx_byte(unsigned char byte) #endif } -/* FIXME(dhendrix): add this back in */ -#if 0 -static void console_tx_flush(void) +static void _console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL - uart_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS); +#if CONFIG_SERIAL_CONSOLE + uart_tx_flush(); #endif #if CONFIG_USBDEBUG usbdebug_tx_flush(0); #endif } -#endif int do_printk(int msg_level, const char *fmt, ...) { @@ -69,7 +67,7 @@ int do_printk(int msg_level, const char *fmt, ...) i = vtxprintf(console_tx_byte, fmt, args); va_end(args); -// console_tx_flush(); + _console_tx_flush(); return i; } diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c index fd4374f..e8a47e5 100644 --- a/src/arch/armv7/stages.c +++ b/src/arch/armv7/stages.c @@ -38,8 +38,8 @@ void stage_entry(void) main(); } -void stage_exit(unsigned long addr) +void stage_exit(void *addr) { - __attribute__((noreturn)) void (*doit)(void) = (void *)addr; + __attribute__((noreturn)) void (*doit)(void) = addr; doit(); } diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 3c4777f..dd826d6 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -14,6 +14,11 @@ romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c +# TODO Add vtxprintf.c only when early console is required. +bootblock-y += vtxprintf.c +bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +bootblock-y += die.c + ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c ramstage-$(CONFIG_USBDEBUG) += usbdebug_console.c diff --git a/src/cpu/samsung/exynos5-common/clk.h b/src/cpu/samsung/exynos5-common/clk.h index 0178f88..eb3b253 100644 --- a/src/cpu/samsung/exynos5-common/clk.h +++ b/src/cpu/samsung/exynos5-common/clk.h @@ -52,7 +52,7 @@ struct clk_bit_info { s8 prediv_bit; }; -/* FIXME(dhendrix) conflicts with stp-common/clk.h */ +/* FIXME(dhendrix) conflicts with s5p-common/clk.h */ #if 0 unsigned long get_pll_clk(int pllreg); unsigned long get_arm_clk(void); diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 1c6d716..e2033ff 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,6 +9,7 @@ bootblock-y += clock_init.c bootblock-y += clock.c bootblock-y += pinmux.c +bootblock-y += power.c bootblock-y += soc.c bootblock-y += uart.c diff --git a/src/cpu/samsung/exynos5250/clock_init.h b/src/cpu/samsung/exynos5250/clock_init.h index 3757e7d..bb7f7e9 100644 --- a/src/cpu/samsung/exynos5250/clock_init.h +++ b/src/cpu/samsung/exynos5250/clock_init.h @@ -24,6 +24,7 @@ #ifndef __EXYNOS_CLOCK_INIT_H #define __EXYNOS_CLOCK_INIT_H +#include "dmc.h" /* These are the ratio's for configuring ARM clock */ struct arm_clk_ratios { diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 60003c4..d0650fb 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -25,6 +25,7 @@ #include <common.h> #include <arch/hlt.h> #include <arch/io.h> +#include <arch/hlt.h> #include <console/console.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index f3ee081..3126d7a 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -211,4 +211,7 @@ void uart_tx_byte(unsigned char data) { exynos5_uart_tx_byte(data); } + +void uart_tx_flush(void) { +} #endif diff --git a/src/cpu/samsung/s5p-common/s3c24x0_i2c.c b/src/cpu/samsung/s5p-common/s3c24x0_i2c.c index 2940b09..3e94ea7 100644 --- a/src/cpu/samsung/s5p-common/s3c24x0_i2c.c +++ b/src/cpu/samsung/s5p-common/s3c24x0_i2c.c @@ -221,22 +221,11 @@ void board_i2c_init(const void *blob) /* * MULTI BUS I2C support */ -/* - * FIXME(dhendrix): not sure why this had to be guarded, but the code - * should probably go into an exynos5-specific .c file if it really is - * not generic. - */ -//#ifdef CONFIG_EXYNOS5 static void i2c_bus_init(struct s3c24x0_i2c_bus *i2c, unsigned int bus) { exynos_pinmux_config(i2c->id, 0); - i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); } -//#else -//#error "should not be here" -//static void i2c_bus_init(struct s3c24x0_i2c_bus *i2c, unsigned int bus) {} -//#endif #ifdef CONFIG_I2C_MULTI_BUS int i2c_set_bus_num(unsigned int bus) diff --git a/src/drivers/maxim/max77686/Makefile.inc b/src/drivers/maxim/max77686/Makefile.inc index a5d7b90..097b291 100644 --- a/src/drivers/maxim/max77686/Makefile.inc +++ b/src/drivers/maxim/max77686/Makefile.inc @@ -17,5 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +bootblock-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c romstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c ramstage-$(CONFIG_DRIVER_MAXIM_MAX77686) += max77686.c diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index fc0b208..64b12c6 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#if CONFIG_EARLY_SERIAL_CONSOLE #include <types.h> #include <arch/io.h> #include <cbfs.h> @@ -27,553 +28,28 @@ #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/clock_init.h> +#include <src/cpu/samsung/exynos5250/power.h> #include <drivers/maxim/max77686/max77686.h> #define I2C0_BASE 0x12c60000 - -/* - * Max77686 parameters values - * see max77686.h for parameters details - */ -struct max77686_para max77686_param[] = {/*{vol_addr, vol_bitpos, - vol_bitmask, reg_enaddr, reg_enbitpos, reg_enbitmask, reg_enbiton, - reg_enbitoff, vol_min, vol_div}*/ - {/* PMIC_BUCK1 */ 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK2 */ 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK3 */ 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK4 */ 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500}, - {/* PMIC_BUCK5 */ 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK6 */ 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK7 */ 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK8 */ 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_BUCK9 */ 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000}, - {/* PMIC_LDO1 */ 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000}, - {/* PMIC_LDO2 */ 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO3 */ 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO4 */ 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO5 */ 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO6 */ 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO7 */ 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO8 */ 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO9 */ 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO10 */ 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO11 */ 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO12 */ 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO13 */ 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO14 */ 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO15 */ 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000}, - {/* PMIC_LDO16 */ 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000}, - {/* PMIC_LDO17 */ 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO18 */ 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO19 */ 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO20 */ 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO21 */ 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO22 */ 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO23 */ 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO24 */ 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO25 */ 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_LDO26 */ 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000}, - {/* PMIC_EN32KHZ_CP */ 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0}, -}; - -/* - * Write a value to a register - * - * @param chip_addr i2c addr for max77686 - * @param reg reg number to write - * @param val value to be written - * - */ -static inline int max77686_i2c_write(unsigned char chip_addr, - unsigned int reg, unsigned char val) -{ - return i2c_write(chip_addr, reg, 1, &val, 1); -} - -/* - * Read a value from a register - * - * @param chip_addr i2c addr for max77686 - * @param reg reg number to write - * @param val value to be written - * - */ -static inline int max77686_i2c_read(unsigned char chip_addr, - unsigned int reg, unsigned char *val) -{ - return i2c_read(chip_addr, reg, 1, val, 1); -} - -/* Chip register numbers (not exported from this module) */ -enum { - REG_BBAT = 0x7e, - - /* Bits for BBAT */ - BBAT_BBCHOSTEN_MASK = 1 << 0, - BBAT_BBCVS_SHIFT = 3, - BBAT_BBCVS_MASK = 3 << BBAT_BBCVS_SHIFT, -}; - -int max77686_disable_backup_batt(void) -{ - unsigned char val; - int ret; - - //i2c_set_bus_num(0); - ret = max77686_i2c_read(MAX77686_I2C_ADDR, REG_BBAT, &val); - if (ret) { -// debug("max77686 i2c read failed\n"); - return ret; - } - - /* If we already have the correct values, exit */ - if ((val & (BBAT_BBCVS_MASK | BBAT_BBCHOSTEN_MASK)) == - BBAT_BBCVS_MASK) - return 0; - - /* First disable charging */ - val &= ~BBAT_BBCHOSTEN_MASK; - ret = max77686_i2c_write(MAX77686_I2C_ADDR, REG_BBAT, val); - if (ret) { - //debug("max77686 i2c write failed\n"); - return -1; - } - - /* Finally select 3.5V to minimize power consumption */ - val |= BBAT_BBCVS_MASK; - ret = max77686_i2c_write(MAX77686_I2C_ADDR, REG_BBAT, val); - if (ret) { - //debug("max77686 i2c write failed\n"); - return -1; - } - - return 0; -} - -static int max77686_enablereg(enum max77686_regnum reg, int enable) -{ - struct max77686_para *pmic; - unsigned char read_data; - int ret; - - pmic = &max77686_param[reg]; - - ret = max77686_i2c_read(MAX77686_I2C_ADDR, pmic->reg_enaddr, - &read_data); - if (ret != 0) { - //debug("max77686 i2c read failed.\n"); - return -1; - } - - if (enable == REG_DISABLE) { - clrbits_8(&read_data, - pmic->reg_enbitmask << pmic->reg_enbitpos); - } else { - clrsetbits_8(&read_data, - pmic->reg_enbitmask << pmic->reg_enbitpos, - pmic->reg_enbiton << pmic->reg_enbitpos); - } - - ret = max77686_i2c_write(MAX77686_I2C_ADDR, - pmic->reg_enaddr, read_data); - if (ret != 0) { - //debug("max77686 i2c write failed.\n"); - return -1; - } - - return 0; -} - -static int max77686_do_volsetting(enum max77686_regnum reg, unsigned int volt, - int enable, int volt_units) -{ - struct max77686_para *pmic; - unsigned char read_data; - int vol_level = 0; - int ret; - - pmic = &max77686_param[reg]; - - if (pmic->vol_addr == 0) { - //debug("not a voltage register.\n"); - return -1; - } - - ret = max77686_i2c_read(MAX77686_I2C_ADDR, pmic->vol_addr, &read_data); - if (ret != 0) { - //debug("max77686 i2c read failed.\n"); - return -1; - } - - if (volt_units == MAX77686_UV) - vol_level = volt - (u32)pmic->vol_min * 1000; - else - vol_level = (volt - (u32)pmic->vol_min) * 1000; - - if (vol_level < 0) { - //debug("Not a valid voltage level to set\n"); - return -1; - } - vol_level /= (u32)pmic->vol_div; - - clrsetbits_8(&read_data, pmic->vol_bitmask << pmic->vol_bitpos, - vol_level << pmic->vol_bitpos); - - ret = max77686_i2c_write(MAX77686_I2C_ADDR, pmic->vol_addr, read_data); - if (ret != 0) { - //debug("max77686 i2c write failed.\n"); - return -1; - } - - ret = max77686_enablereg(reg, enable); - if (ret != 0) { - //debug("Failed to enable buck/ldo.\n"); - return -1; - } - return 0; -} - -int max77686_volsetting(enum max77686_regnum reg, unsigned int volt, - int enable, int volt_units) -{ -// int old_bus = i2c_get_bus_num(); - int ret; - -// i2c_set_bus_num(0); - ret = max77686_do_volsetting(reg, volt, enable, volt_units); -// i2c_set_bus_num(old_bus); - return ret; -} - -/* power_init() stuff */ -static void power_init(void) -{ - max77686_disable_backup_batt(); - -#if 0 - /* FIXME: for debugging... */ - volatile unsigned long *addr = (unsigned long *)0x1004330c; - *addr |= 0x100; - while (1); #endif - max77686_volsetting(PMIC_BUCK2, CONFIG_VDD_ARM_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_BUCK3, CONFIG_VDD_INT_UV, - REG_ENABLE, MAX77686_UV); - max77686_volsetting(PMIC_BUCK1, CONFIG_VDD_MIF_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_BUCK4, CONFIG_VDD_G3D_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO2, CONFIG_VDD_LDO2_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO3, CONFIG_VDD_LDO3_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO5, CONFIG_VDD_LDO5_MV, - REG_ENABLE, MAX77686_MV); - max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV, - REG_ENABLE, MAX77686_MV); -} - -#include <console/vtxprintf.h> -#include <string.h> -#define ZEROPAD 1 /* pad with zero */ -#define SIGN 2 /* unsigned/signed long */ -#define PLUS 4 /* show plus */ -#define SPACE 8 /* space if plus */ -#define LEFT 16 /* left justified */ -#define SPECIAL 32 /* 0x */ -#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ -/* haha, don't need ctype.c */ -#define isdigit(c) ((c) >= '0' && (c) <= '9') -#define is_digit isdigit -#define isxdigit(c) (((c) >= '0' && (c) <= '9') || ((c) >= 'a' && (c) <= 'f') || ((c) >= 'A' && (c) <= 'F')) - -static int skip_atoi(const char **s) -{ - int i=0; - - while (is_digit(**s)) - i = i*10 + *((*s)++) - '0'; - return i; -} - -#include <div64.h> -static int number(void (*tx_byte)(unsigned char byte), - unsigned long long num, int base, int size, int precision, int type) -{ - char c,sign,tmp[66]; - const char *digits="0123456789abcdefghijklmnopqrstuvwxyz"; - int i; - int count = 0; - - if (type & LARGE) - digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; - if (type & LEFT) - type &= ~ZEROPAD; - if (base < 2 || base > 36) - return 0; - c = (type & ZEROPAD) ? '0' : ' '; - sign = 0; - if (type & SIGN) { - if ((signed long long)num < 0) { - sign = '-'; - num = -num; - size--; - } else if (type & PLUS) { - sign = '+'; - size--; - } else if (type & SPACE) { - sign = ' '; - size--; - } - } - if (type & SPECIAL) { - if (base == 16) - size -= 2; - else if (base == 8) - size--; - } - i = 0; - if (num == 0) { - tmp[i++]='0'; - } else while (num != 0) { - /* FIXME: do_div was broken */ -// tmp[i++] = digits[do_div(num,base)]; - tmp[i++] = digits[num & 0xf]; - num = num >> 4; - } - if (i > precision) - precision = i; - size -= precision; - if (!(type&(ZEROPAD+LEFT))) - while(size-->0) - tx_byte(' '), count++; - if (sign) - tx_byte(sign), count++; - if (type & SPECIAL) { - if (base==8) - tx_byte('0'), count++; - else if (base==16) { - tx_byte('0'), count++; - tx_byte(digits[33]), count++; - } - } - if (!(type & LEFT)) - while (size-- > 0) - tx_byte(c), count++; - while (i < precision--) - tx_byte('0'), count++; - while (i-- > 0) - tx_byte(tmp[i]), count++; - while (size-- > 0) - tx_byte(' '), count++; - return count; -} - -int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args) -{ - int len; - unsigned long long num; - int i, base; - const char *s; - - int flags; /* flags to number() */ - - int field_width; /* width of output field */ - int precision; /* min. # of digits for integers; max - number of chars for from string */ - int qualifier; /* 'h', 'l', or 'L' for integer fields */ - - int count; - - for (count=0; *fmt ; ++fmt) { - if (*fmt != '%') { - tx_byte(*fmt), count++; - continue; - } - - /* process flags */ - flags = 0; -repeat: - ++fmt; /* this also skips first '%' */ - switch (*fmt) { - case '-': flags |= LEFT; goto repeat; - case '+': flags |= PLUS; goto repeat; - case ' ': flags |= SPACE; goto repeat; - case '#': flags |= SPECIAL; goto repeat; - case '0': flags |= ZEROPAD; goto repeat; - } - - /* get field width */ - field_width = -1; - if (is_digit(*fmt)) - field_width = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - field_width = va_arg(args, int); - if (field_width < 0) { - field_width = -field_width; - flags |= LEFT; - } - } - - /* get the precision */ - precision = -1; - if (*fmt == '.') { - ++fmt; - if (is_digit(*fmt)) - precision = skip_atoi(&fmt); - else if (*fmt == '*') { - ++fmt; - /* it's the next argument */ - precision = va_arg(args, int); - } - if (precision < 0) - precision = 0; - } - - /* get the conversion qualifier */ - qualifier = -1; - if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt == 'z') { - qualifier = *fmt; - ++fmt; - if (*fmt == 'l') { - qualifier = 'L'; - ++fmt; - } - } - - /* default base */ - base = 10; - - switch (*fmt) { - case 'c': - if (!(flags & LEFT)) - while (--field_width > 0) - tx_byte(' '), count++; - tx_byte((unsigned char) va_arg(args, int)), count++; - while (--field_width > 0) - tx_byte(' '), count++; - continue; - - case 's': - s = va_arg(args, char *); - if (!s) - s = "<NULL>"; - - len = strnlen(s, precision); - - if (!(flags & LEFT)) - while (len < field_width--) - tx_byte(' '), count++; - for (i = 0; i < len; ++i) - tx_byte(*s++), count++; - while (len < field_width--) - tx_byte(' '), count++; - continue; - - case 'p': - if (field_width == -1) { - field_width = 2*sizeof(void *); - flags |= ZEROPAD; - } - count += number(tx_byte, - (unsigned long) va_arg(args, void *), 16, - field_width, precision, flags); - continue; - - case 'n': - if (qualifier == 'L') { - long long *ip = va_arg(args, long long *); - *ip = count; - } else if (qualifier == 'l') { - long * ip = va_arg(args, long *); - *ip = count; - } else { - int * ip = va_arg(args, int *); - *ip = count; - } - continue; - - case '%': - tx_byte('%'), count++; - continue; - - /* integer number formats - set up the flags and "break" */ - case 'o': - base = 8; - break; - - case 'X': - flags |= LARGE; - case 'x': - base = 16; - break; - - case 'd': - case 'i': - flags |= SIGN; - case 'u': - break; - - default: - tx_byte('%'), count++; - if (*fmt) - tx_byte(*fmt), count++; - else - --fmt; - continue; - } - if (qualifier == 'L') { - num = va_arg(args, unsigned long long); - } else if (qualifier == 'l') { - num = va_arg(args, unsigned long); - } else if (qualifier == 'z') { - num = va_arg(args, size_t); - } else if (qualifier == 'h') { - num = (unsigned short) va_arg(args, int); - if (flags & SIGN) - num = (short) num; - } else if (flags & SIGN) { - num = va_arg(args, int); - } else { - num = va_arg(args, unsigned int); - } - count += number(tx_byte, num, base, field_width, precision, flags); - } - return count; -} - -int do_printk(int msg_level, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vtxprintf(uart_tx_byte, fmt, args); - va_end(args); - - return i; -} - void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { struct mem_timings *mem; struct arm_clk_ratios *arm_ratios; - /* FIXME: we should not need UART in bootblock, this is only - done for testing purposes */ i2c_set_early_reg(I2C0_BASE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); power_init(); mem = get_mem_timings(); arm_ratios = get_arm_clk_ratios(); system_clock_init(mem, arm_ratios); + +#if CONFIG_EARLY_SERIAL_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); - printk(BIOS_INFO, "%s: UART initialized\n", __func__); - printk(BIOS_INFO, "%s: finished\n", __func__); + printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__); +#endif } diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 690d4aa..b8e5116 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -47,15 +47,12 @@ static int board_wakeup_permitted(void) void main(void) { - struct cbfs_media cbfs; -// i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -// power_init(); -// clock_init(); -// exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); - console_init(); - printk(BIOS_INFO, "hello from romstage\n"); struct mem_timings *mem; int ret; + void *entry; + + console_init(); + printk(BIOS_INFO, "hello from romstage\n"); mem = get_mem_timings(); if (!mem) { @@ -76,51 +73,9 @@ void main(void) } printk(BIOS_INFO, "ddr3_init done\n"); - /* wow, did it work? */ - int i; - u32 *c = (void *)CONFIG_RAMBASE; - -// mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024); -// printk(BIOS_INFO, "mmu_setup done\n"); - for(i = 0; i < 16384; i++) - c[i] = i+32768; - for(i = 0; i < 16384; i++) - if (c[i] != i+32768) - printk(BIOS_SPEW, "BADc[%02x]: %02x,", i, c[i]); - for(i = 0; i < 1048576; i++) - c[i] = 0; - - ret = init_default_cbfs_media(&cbfs); - if (ret){ - printk(BIOS_ERR, "init_default_cbfs_media returned %d: HALT\n", - ret); - while (1); - } - - struct cbfs_stage *stage = (struct cbfs_stage *) - cbfs_get_file_content(&cbfs, "fallback/coreboot_ram", - CBFS_TYPE_STAGE); - printk(BIOS_ERR, "Stage: %p\n", stage); - printk(BIOS_ERR, "loading stage %s @ 0x%x (0x%x bytes),entry @ 0x%p\n", - "ram stage", - (uint32_t) stage->load, stage->memlen, - (void *)(u32)stage->entry); - -#if 0 - /* for reference and testing ... we should be able to remove soon */ -// c = (void *)(u32)(stage->load + stage->len); - c = (void *)(u32)(stage->load); - printk(BIOS_ERR, "memzero 0x%x words starting at %p\n", - (stage->memlen /*- stage->len*/)/4, c); - for(i = 0; i < (stage->memlen /*- stage->len*/)/4; i++){ - printk(BIOS_INFO, "%p, ", &c[i]); - c[i] = 0; - } -#endif - void *entry = cbfs_load_stage(&cbfs, "fallback/coreboot_ram"); - printk(BIOS_INFO, "entry is %p\n", entry); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); - printk(BIOS_INFO, "sayonara, romstage!\n"); - stage_exit((unsigned long)entry); + stage_exit(entry); }

1 0

New patch to review for coreboot: 1b17ca9 snow: call hardwaremain()
by David Hendricks 07 Feb '13

07 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2302 -gerrit commit 1b17ca9d7ad15c1f2c65acb5c74518e330ca4597 Author: David Hendricks <dhendrix(a)chromium.org> Date: Wed Feb 6 16:29:42 2013 -0800 snow: call hardwaremain() ** do not submit ** It dies when trying to init CBMEM, but at least it gets somewhere... Change-Id: I30200432535244de971a7cea9f7902f5e9b46403 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/snow/ramstage.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index 50050d3..f706ce8 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -19,6 +19,7 @@ #include <console/console.h> +void hardwaremain(int boot_complete); void main(void) { // volatile unsigned long *pshold = (unsigned long *)0x1004330c; @@ -26,7 +27,7 @@ void main(void) /* FIXME: console_init() seems to cause things to die... Maybe we need to reset our stack pointer? */ -// console_init(); + console_init(); printk(BIOS_INFO, "hello from ramstage\n"); - while (1); + hardwaremain(0); }

1 0

Patch set updated for coreboot: b115b35 armv7: Clean up: remove deprecated SPL.
by David Hendricks 07 Feb '13

07 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2297 -gerrit commit b115b35c581af7892739afd7c4aaf2250e260f51 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 17:48:20 2013 +0800 armv7: Clean up: remove deprecated SPL. "SPL" from U-Boot is deprecated by bootblock in coreboot/arm, so we don't need it anymore. Change-Id: Id16877075d0b870839a10160073ad70777a2af0a Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/arch/armv7/Kconfig | 4 - src/arch/armv7/lib/eabi_compat.c | 5 +- src/cpu/samsung/exynos5-common/spl.h | 94 ------- src/cpu/samsung/exynos5-common/spl_boot.c | 447 ------------------------------ src/cpu/samsung/exynos5250/Kconfig | 4 - src/cpu/samsung/exynos5250/clk.h | 3 - src/cpu/samsung/exynos5250/clock_init.c | 2 - src/cpu/samsung/exynos5250/dmc_common.c | 2 +- src/cpu/samsung/exynos5250/power.c | 4 +- src/cpu/samsung/s5p-common/cpu_info.c | 2 +- src/cpu/samsung/s5p-common/s5p_gpio.c | 2 - src/cpu/samsung/s5p-common/timer.c | 3 +- src/mainboard/google/snow/Makefile.inc | 8 - src/mainboard/google/snow/romstage.c | 13 + src/mainboard/google/snow/smdk5250_spl.c | 89 ------ 15 files changed, 20 insertions(+), 662 deletions(-) diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 65de2d5..488ca97 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -1,9 +1,5 @@ menu "Architecture (armv7)" -config SPL_BUILD - bool "Build second-phase bootloader (SPL)" - default y - config EABI_COMPAT bool "Toolchain is EABI compatible" default n diff --git a/src/arch/armv7/lib/eabi_compat.c b/src/arch/armv7/lib/eabi_compat.c index 5f59892..2772de6 100644 --- a/src/arch/armv7/lib/eabi_compat.c +++ b/src/arch/armv7/lib/eabi_compat.c @@ -10,14 +10,13 @@ */ #include <common.h> +#include <console/console.h> /* FIXME(dhendrix): prototypes added for assembler */ int raise (int signum); int raise (int signum) { -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) - printf("raise: Signal # %d caught\n", signum); -#endif + printk(BIOS_CRIT, "raise: Signal # %d caught\n", signum); return 0; } diff --git a/src/cpu/samsung/exynos5-common/spl.h b/src/cpu/samsung/exynos5-common/spl.h deleted file mode 100644 index afa9a8e..0000000 --- a/src/cpu/samsung/exynos5-common/spl.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2012 The Chromium OS Authors. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_EXYNOS_SPL_H__ -#define __ASM_ARCH_EXYNOS_SPL_H__ - -#include <cpu/samsung/exynos5-common/cpu.h> -/* FIXME(dhendrix): non-common header included by a common header... */ -#include <cpu/samsung/exynos5250/dmc.h> - -/* Parameters of early board initialization in SPL */ -struct spl_machine_param { - /* Add fields as and when required */ - u32 signature; - u32 version; /* Version number */ - u32 size; /* Size of block */ - /** - * Parameters we expect, in order, terminated with \0. Each parameter - * is a single character representing one 32-bit word in this - * structure. - * - * Valid characters in this string are: - * - * Code Name - * v mem_iv_size - * m mem_type - * u uboot_size - * b boot_source - * f frequency_mhz (memory frequency in MHz) - * a ARM clock frequency in MHz - * s serial base address - * i i2c base address for early access (meant for PMIC) - * r board rev GPIO numbers used to read board revision - * (lower halfword=bit 0, upper=bit 1) - * M Memory Manufacturer name - * w Bad Wake GPIO number - * \0 termination - */ - char params[12]; /* Length must be word-aligned */ - u32 mem_iv_size; /* Memory channel interleaving size */ - enum ddr_mode mem_type; /* Type of on-board memory */ - /* - * U-boot size - The iROM mmc copy function used by the SPL takes a - * block count paramter to describe the u-boot size unlike the spi - * boot copy function which just uses the u-boot size directly. Align - * the u-boot size to block size (512 bytes) when populating the SPL - * table only for mmc boot. - */ - u32 uboot_size; - enum boot_mode boot_source; /* Boot device */ - unsigned frequency_mhz; /* Frequency of memory in MHz */ - unsigned arm_freq_mhz; /* ARM Frequency in MHz */ - u32 serial_base; /* Serial base address */ - u32 i2c_base; /* i2c base address */ - u32 board_rev_gpios; /* Board revision GPIOs */ - enum mem_manuf mem_manuf; /* Memory Manufacturer */ - u32 bad_wake_gpio; /* If high at wake time disallow wake */ -} __attribute__((__packed__)); - -/** - * Validate signature and return a pointer to the parameter table. If the - * signature is invalid, call panic() and never return. - * - * @return pointer to the parameter table if signature matched or never return. - */ -struct spl_machine_param *spl_get_machine_params(void); - -/* - * Initialize the timer and serial driver in SPL u-boot. - * Besides the serial driver, it also setup the minimal set of its dependency, - * like gd struct, pinmux, and serial. - */ -void spl_early_init(void); - -#endif /* __ASM_ARCH_EXYNOS_SPL_H__ */ diff --git a/src/cpu/samsung/exynos5-common/spl_boot.c b/src/cpu/samsung/exynos5-common/spl_boot.c deleted file mode 100644 index ddf6937..0000000 --- a/src/cpu/samsung/exynos5-common/spl_boot.c +++ /dev/null @@ -1,447 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* FIXME(dhendrix): pulled in a lot of extra crap such as partition and string - libs*/ -#include <assert.h> -#include <common.h> -#include <stdlib.h> -#include <string.h> - -#include <console/console.h> -#include <console/loglevel.h> -//#include <asm/arch/board.h> - -#include <config.h> -#include <spi.h> -#if 0 -#include <asm/arch/clock.h> -#include <asm/arch-exynos/spi.h> -#include <asm/arch/pinmux.h> -#include <asm/arch/power.h> -#endif -#include <arch/hlt.h> -#include <cpu/samsung/exynos5250/clk.h> -#include <cpu/samsung/exynos5250/cpu.h> -#include <cpu/samsung/exynos5250/periph.h> -#include <cpu/samsung/exynos5250/pinmux.h> -#include <cpu/samsung/exynos5250/power.h> -#include <cpu/samsung/exynos5250/spi.h> - -#include <cpu/samsung/exynos5-common/cpu.h> -#include <cpu/samsung/exynos5-common/exynos5-common.h> - -//#include <asm/system.h> -#include <system.h> - -#include <arch/io.h> - -#define OM_STAT (0x1f << 1) - -/** - * Copy data from SD or MMC device to RAM. - * - * @param offset Block offset of the data - * @param nblock Number of blocks - * @param dst Destination address - * @return 1 = True or 0 = False - */ -typedef u32 (*mmc_copy_func_t)(u32 offset, u32 nblock, u32 dst); - -/** - * Copy data from SPI flash to RAM. - * - * @param offset Block offset of the data - * @param nblock Number of blocks - * @param dst Destination address - * @return 1 = True or 0 = False - */ -typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); - - -/** - * Copy data through USB. - * - * @return 1 = True or 0 = False - */ -typedef u32 (*usb_copy_func_t)(void); - -/* - * Set/clear program flow prediction and return the previous state. - */ -static int config_branch_prediction(int set_cr_z) -{ - unsigned int cr; - - /* System Control Register: 11th bit Z Branch prediction enable */ - cr = get_cr(); - set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z); - - return cr & CR_Z; -} - -#if 0 -static void spi_rx_tx(struct exynos_spi *regs, int todo, - void *dinp, void const *doutp, int i) -{ - uint *rxp = (uint *)(dinp + (i * (32 * 1024))); - int rx_lvl, tx_lvl; - uint out_bytes, in_bytes; - - out_bytes = in_bytes = todo; - setbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt); - - while (in_bytes) { - uint32_t spi_sts; - int temp; - - spi_sts = readl(&regs->spi_sts); - rx_lvl = ((spi_sts >> 15) & 0x7f); - tx_lvl = ((spi_sts >> 6) & 0x7f); - while (tx_lvl < 32 && out_bytes) { - temp = 0xffffffff; - writel(temp, &regs->tx_data); - out_bytes -= 4; - tx_lvl += 4; - } - while (rx_lvl >= 4 && in_bytes) { - temp = readl(&regs->rx_data); - if (rxp) - *rxp++ = temp; - in_bytes -= 4; - rx_lvl -= 4; - } - } -} -#endif - -/* FIXME(dhendrix): feels like exynos_spi_copy should go somewhere else... */ -#if 0 -/** - * Copy uboot from spi flash to RAM - * - * @parma uboot_size size of u-boot to copy - */ -static void exynos_spi_copy(unsigned int uboot_size) -{ - int upto, todo; - int i; -// struct exynos_spi *regs = (struct exynos_spi *)samsung_get_base_spi1(); - struct exynos_spi *regs = (struct exynos_spi *)0x12d30000; - - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ - /* set the spi1 GPIO */ - exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); - - /* set pktcnt and enable it */ - writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt); - /* set FB_CLK_SEL */ - writel(SPI_FB_DELAY_180, &regs->fb_clk); - /* set CH_WIDTH and BUS_WIDTH as word */ - setbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ - - /* clear rx and tx channel if set priveously */ - clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); - - setbits_le32(&regs->swap_cfg, SPI_RX_SWAP_EN | - SPI_RX_BYTE_SWAP | - SPI_RX_HWORD_SWAP); - - /* do a soft reset */ - setbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - - /* now set rx and tx channel ON */ - setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN); - clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */ - - /* Send read instruction (0x3h) followed by a 24 bit addr */ - writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, &regs->tx_data); - - /* waiting for TX done */ - while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)); - - for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) { - todo = MIN(uboot_size - upto, (1 << 15)); - spi_rx_tx(regs, todo, (void *)(CONFIG_SYS_TEXT_BASE), - (void *)(SPI_FLASH_UBOOT_POS), i); - } - - setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */ - - /* - * Let put controller mode to BYTE as - * SPI driver does not support WORD mode yet - */ - clrbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - writel(0, &regs->swap_cfg); - - /* - * Flush spi tx, rx fifos and reset the SPI controller - * and clear rx/tx channel - */ - clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); -} -#endif - -/* Copy U-Boot image to RAM */ -static void copy_uboot_to_ram(void) -{ - unsigned int sec_boot_check; - unsigned int uboot_size = CONFIG_COREBOOT_ROMSIZE_KB_4096; - int is_cr_z_set; - enum boot_mode boot_mode = BOOT_MODE_OM; - mmc_copy_func_t mmc_copy; - - usb_copy_func_t usb_copy; - -#if 0 - uboot_size = exynos_get_uboot_size(); - boot_mode = exynos_get_boot_device(); -#endif - - if (boot_mode == BOOT_MODE_OM) { - /* Read iRAM location to check for secondary USB boot mode */ - sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE); - if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT) - boot_mode = BOOT_MODE_USB; - } - debug("U-Boot size %u\n", uboot_size); - - if (boot_mode == BOOT_MODE_OM) - boot_mode = readl(EXYNOS_POWER_BASE) & OM_STAT; - - switch (boot_mode) { -#if defined(CONFIG_EXYNOS_SPI_BOOT) - case BOOT_MODE_SERIAL: - /* let us our own function to copy u-boot from SF */ - exynos_spi_copy(uboot_size); - break; -#endif - case BOOT_MODE_MMC: - mmc_copy = *(mmc_copy_func_t *)EXYNOS_COPY_MMC_FNPTR_ADDR; - assert(!(uboot_size & 511)); - mmc_copy(BL2_START_OFFSET, uboot_size / 512, - CONFIG_SYS_TEXT_BASE); - break; - case BOOT_MODE_USB: - /* - * iROM needs program flow prediction to be disabled - * before copy from USB device to RAM - */ - is_cr_z_set = config_branch_prediction(0); - usb_copy = *(usb_copy_func_t *) - EXYNOS_COPY_USB_FNPTR_ADDR; - usb_copy(); - config_branch_prediction(is_cr_z_set); - break; - default: - printk(BIOS_ERR, "Invalid boot mode selection\n"); - hlt(); - break; - } - debug("U-Boot copied\n"); -} - -#if 0 -/** - * Set up the U-Boot global_data pointer - * - * This sets the address of the global data, and sets up basic values. - * - * @param gdp Value to give to gd - */ -static void setup_global_data(gd_t *gdp) -{ - gd = gdp; - memzero((void *)gd, sizeof(gd_t)); - gd->flags |= GD_FLG_RELOC; - gd->baudrate = CONFIG_BAUDRATE; - gd->have_console = 1; -} -#endif - -#if 0 -/* Tell the loaded U-Boot that it was loaded from SPL */ -static void exynos5_set_spl_marker(void) -{ - uint32_t *marker = (uint32_t *)CONFIG_SPL_MARKER; - - *marker = EXYNOS5_SPL_MARKER; -} -#endif - -/* Board-specific call to see if wakeup is allowed. */ -static int __def_board_wakeup_permitted(void) -{ - return 1; -} -int board_wakeup_permitted(void) - __attribute__((weak, alias("__def_board_wakeup_permitted"))); - -void board_init_f(void) -{ - /* - * The gd struct is only needed for serial initialization. Since this - * function is called in SPL u-boot. We store the gd struct in the - * stack instead of the default memory region which may not be - * initialized. - */ -// __attribute__((aligned(8))) gd_t local_gd; -// __attribute__((noreturn)) void (*uboot)(void); - -// exynos5_set_spl_marker(); -// setup_global_data(&local_gd); - - /* - * Init subsystems, and resume if required. For a normal boot this - * will set up the UART and display a message. - */ - if (lowlevel_init_subsystems()) { - if (!board_wakeup_permitted()) - power_reset(); - power_exit_wakeup(); - } - -// printk(BIOS_INFO, "\n\nU-Boot SPL, board rev %u\n", board_get_revision()); - - copy_uboot_to_ram(); - /* Jump to U-Boot image */ -// uboot = (void *)CONFIG_SYS_TEXT_BASE; -// uboot(); - /* Never returns Here */ -// printk(BIOS_ERR, "%s: u-boot jump failed", __func__); - printk(BIOS_INFO, "%s: we should not be here...", __func__); - hlt(); -} - -//void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} - -#if 0 -/* - * The following functions are required when linking console library to SPL. - * - * Enabling UART in SPL u-boot requires console library. But some - * functions we needed in the console library depends on a bunch - * of library in libgeneric, like lib/ctype.o, lib/div64.o, lib/string.o, - * and lib/vsprintf.o. Adding them makes the SPL u-boot too large and not - * fit into the expected size. - * - * So we mock these functions in SPL, i.e. vsprintf(), panic(), etc., - * in order to cut its dependency. - */ -int vsprintf(char *buf, const char *fmt, va_list args) -{ - char *str = buf, *s; - ulong u; - - /* - * We won't implement all full functions of vsprintf(). - * We only implement %s and %u, and ignore others and directly use - * the original format string as its result. - */ - - while (*fmt) { - if (*fmt != '%') { - *str++ = *fmt++; - continue; - } - fmt++; - switch (*fmt) { - case '%': - *str++ = *fmt++; - break; - case 's': - fmt++; - s = va_arg(args, char *); - while (*s) - *str++ = *s++; - break; - case 'u': - fmt++; - u = va_arg(args, ulong); - s = simple_itoa(u); - while (*s) - *str++ = *s++; - break; - default: - /* Print the original string for unsupported formats */ - *str++ = '%'; - *str++ = *fmt++; - } - } - *str = '\0'; - return str - buf; -} -#endif - -#if 0 -void panic(const char *fmt, ...) -{ - va_list args; - va_start(args, fmt); - vprintf(fmt, args); - putc('\n'); - va_end(args); -#if defined(CONFIG_PANIC_HANG) - hang(); -#else - udelay(100000); /* allow messages to go out */ - do_reset(NULL, 0, 0, NULL); -#endif - while (1) - ; -} -#endif - -#if 0 -void __assert_fail(const char *assertion, const char *file, unsigned line, - const char *function) -{ - /* This will not return */ - panic("%s:%u: %s: Assertion `%s' failed.", file, line, function, - assertion); -} -#endif - -#if 0 -char *simple_itoa(ulong i) -{ - /* 21 digits plus null terminator, good for 64-bit or smaller ints */ - static char local[22] __attribute__((section(".data"))); - char *p = &local[21]; - - *p-- = '\0'; - do { - *p-- = '0' + i % 10; - i /= 10; - } while (i > 0); - return p + 1; -} -#endif diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 6a09d88..0b07b90 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -88,10 +88,6 @@ config SYS_SDRAM_BASE hex "SDRAM base address" default 0x40000000 -config SPL_BUILD - bool - default n - config SYS_TEXT_BASE hex "Executable code section" default 0x43e00000 diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 2de949a..dbddce0 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -564,8 +564,6 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf); * At present we are using 14148 of 14336 bytes. If we change this function * to be exported in SPL, we go over the edge. */ -/* TODO(dhendrix): do we still need this ifndef? */ -//#ifndef CONFIG_SPL_BUILD /** * Get the required memory type and speed (Main U-Boot version). * @@ -581,6 +579,5 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf); int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); -//#endif /* CONFIG_SPL_BUILD */ #endif diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c index 4f21022..27e96ae 100644 --- a/src/cpu/samsung/exynos5250/clock_init.c +++ b/src/cpu/samsung/exynos5250/clock_init.c @@ -452,7 +452,6 @@ void clock_init_dp_clock(void) setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); } -#ifdef CONFIG_SPL_BUILD /* * This is a custom implementation for the udelay(), as we do not the timer * initialise during the SPL boot. We are assuming the cpu takes 3 instruction @@ -466,4 +465,3 @@ void udelay(unsigned usec) count = usec * (get_pll_clk(APLL) / (3 * 10000000)); sdelay(count); } -#endif diff --git a/src/cpu/samsung/exynos5250/dmc_common.c b/src/cpu/samsung/exynos5250/dmc_common.c index f91cbb3..8c4b583 100644 --- a/src/cpu/samsung/exynos5250/dmc_common.c +++ b/src/cpu/samsung/exynos5250/dmc_common.c @@ -22,13 +22,13 @@ * MA 02111-1307 USA */ +#include <arch/io.h> #include <assert.h> #include <common.h> #include <console/console.h> #include <cpu/samsung/exynos5250/setup.h> #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/clock_init.h> -#include <cpu/samsung/exynos5-common/spl.h> #include <system.h> #include "clock_init.h" diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 7c61655..60003c4 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -23,12 +23,12 @@ */ #include <common.h> +#include <arch/hlt.h> #include <arch/io.h> #include <console/console.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> #include <cpu/samsung/exynos5250/sysreg.h> -#include <cpu/samsung/exynos5-common/spl.h> #include <drivers/maxim/max77686/max77686.h> #include "device/i2c.h" @@ -62,7 +62,7 @@ void power_shutdown(void) clrbits_le32(&power->ps_hold_ctrl, POWER_PS_HOLD_CONTROL_DATA_HIGH); - hang(); + hlt(); } void power_enable_dp_phy(void) diff --git a/src/cpu/samsung/s5p-common/cpu_info.c b/src/cpu/samsung/s5p-common/cpu_info.c index 6b4742e..1c4c49f 100644 --- a/src/cpu/samsung/s5p-common/cpu_info.c +++ b/src/cpu/samsung/s5p-common/cpu_info.c @@ -92,7 +92,7 @@ int print_cpuinfo(void) } #endif -#ifndef CONFIG_SPL_BUILD +#if 0 void board_show_dram(ulong size) { enum ddr_mode mem_type; diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c index 0023beb..e91b9df 100644 --- a/src/cpu/samsung/s5p-common/s5p_gpio.c +++ b/src/cpu/samsung/s5p-common/s5p_gpio.c @@ -95,9 +95,7 @@ static struct s5p_gpio_bank *gpio_get_bank(unsigned int gpio) } } -#ifndef CONFIG_SPL_BUILD assert(gpio < GPIO_MAX_PORT); /* ...which it will not be */ -#endif return NULL; } //#endif diff --git a/src/cpu/samsung/s5p-common/timer.c b/src/cpu/samsung/s5p-common/timer.c index 373c374..c6ed830 100644 --- a/src/cpu/samsung/s5p-common/timer.c +++ b/src/cpu/samsung/s5p-common/timer.c @@ -67,7 +67,7 @@ int init_timer(void) pwm_init(4, MUX_DIV_4, 0); pwm_config(4, 100000, 100000); pwm_enable(4); -#ifndef CONFIG_SPL_BUILD + /* Use this as the current monotonic time in us */ //gd->timer_reset_value = 0; timer_reset_value = 0; @@ -75,7 +75,6 @@ int init_timer(void) /* Use this as the last timer value we saw */ //gd->lastinc = timer_get_us_down(); lastinc = timer_get_us_down(); -#endif } return 0; diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc index 130c354..04bf543 100644 --- a/src/mainboard/google/snow/Makefile.inc +++ b/src/mainboard/google/snow/Makefile.inc @@ -26,14 +26,6 @@ romstage-y += memory.c romstage-y += romstage.c # ramstage-y += ec.c - -# FIXME: smdk5250_spl and mainboard.c are a mess. In the long -# run we'll want to replace low-level code that calls mainboard code -# with mainboard code that calls low-level code with appropriate -# parameters. Grep around for spl_get_machine_params for examples. -romstage-y += smdk5250_spl.c -ramstage-y += smdk5250_spl.c -#ramstage-y += mainboard.c ramstage-y += ramstage.c # romstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 03fd1be..690d4aa 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -32,6 +32,19 @@ #include "mainboard.h" +#if 0 +static int board_wakeup_permitted(void) +{ + const int gpio = GPIO_Y10; + int is_bad_wake; + + /* We're a bad wakeup if the gpio was defined and was high */ + is_bad_wake = ((gpio != -1) && gpio_get_value(gpio)); + + return !is_bad_wake; +} +#endif + void main(void) { struct cbfs_media cbfs; diff --git a/src/mainboard/google/snow/smdk5250_spl.c b/src/mainboard/google/snow/smdk5250_spl.c deleted file mode 100644 index 33f27b1..0000000 --- a/src/mainboard/google/snow/smdk5250_spl.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright (c) 2012 The Chromium OS Authors. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <arch/gpio.h> -#include <cpu/samsung/exynos5-common/spl.h> -#include <cpu/samsung/exynos5250/gpio.h> - -#define SIGNATURE 0xdeadbeef - -/* Parameters of early board initialization in SPL */ -static struct spl_machine_param machine_param = { - .signature = SIGNATURE, - .version = 1, - .params = "vmubfasirMw", - .size = sizeof(machine_param), - - .mem_iv_size = 0x1f, - .mem_type = DDR_MODE_DDR3, - - /* - * Set uboot_size to 0x100000 bytes. - * - * This is an overly conservative value chosen to accommodate all - * possible U-Boot image. You are advised to set this value to a - * smaller realistic size via scripts that modifies the .machine_param - * section of output U-Boot image. - */ - .uboot_size = 0x100000, - - .boot_source = BOOT_MODE_OM, - .frequency_mhz = 800, - .arm_freq_mhz = 1700, - .serial_base = 0x12c30000, - .i2c_base = 0x12c60000, - .board_rev_gpios = GPIO_D00 | (GPIO_D01 << 16), - .mem_manuf = MEM_MANUF_SAMSUNG, - .bad_wake_gpio = GPIO_Y10, -}; - -struct spl_machine_param *spl_get_machine_params(void) -{ - if (machine_param.signature != SIGNATURE) { - /* TODO: Call panic() here */ - while (1) - ; - } - - return &machine_param; -} - -#if 0 -int board_get_revision(void) -{ - struct spl_machine_param *params = spl_get_machine_params(); - unsigned gpio[CONFIG_BOARD_REV_GPIO_COUNT]; - - gpio[0] = params->board_rev_gpios & 0xffff; - gpio[1] = params->board_rev_gpios >> 16; - return gpio_decode_number(gpio, CONFIG_BOARD_REV_GPIO_COUNT); -} -#endif - -int board_wakeup_permitted(void) -{ - struct spl_machine_param *param = spl_get_machine_params(); - const int gpio = param->bad_wake_gpio; - int is_bad_wake; - - /* We're a bad wakeup if the gpio was defined and was high */ - is_bad_wake = ((gpio != -1) && gpio_get_value(gpio)); - - return !is_bad_wake; -}

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coreboot February 2013