Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1002
-gerrit
commit ceb11f76b4099fdde0210ed6eb1967dffc79ff73
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Thu May 3 16:40:41 2012 -0700
Hook up MRC cache update
This one is a WIP:
- should not depend on CONFIG_CHROMEOS
- There might be a better place for it. Requirements:
- must be in ramstage (locking flash while executing code from there
might not work)
- must be after cbmem is reinitialized (so the mrc cache copy of the
current run can be found)
Change-Id: I8028fb073349ce2b027ef5f8397dc1a1b8b31c02
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
---
src/arch/x86/boot/tables.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 4fefc7d..ff57422 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -53,6 +53,11 @@ struct lb_memory *write_tables(void)
*/
unsigned long high_table_pointer;
+#if CONFIG_CHROMEOS
+ void update_mrc_cache(void);
+ update_mrc_cache();
+#endif
+
if (!high_tables_base) {
printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n");
// Are there any boards without?
the following patch was just integrated into master:
commit a2d207db706d961acb7efdea5a20bd99c4a645e1
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Wed May 2 16:33:18 2012 -0700
Make CBFS output more consistent
- Prefix all CBFS output messages with CBFS:
- Add an option DEBUG_CBFS that is off by default. Without DEBUG_CBFS
enabled, the code will no longer print all the files it walks for
every file lookup.
- Add DEBUG() macro next to LOG() and ERROR() to specify which messages
should only be visible with DEBUG_CBFS printed.
- Actually print a message when the file we're looking for was found. :)
old:
Searching for fallback/coreboot_ram
Check cmos_layout.bin
Check pci8086,0106.rom
Check fallback/romstage
Check fallback/coreboot_ram
Change-Id: I2d731fae17a5f6ca51d435cfb7a58d6e017efa24
Stage: loading fallback/coreboot_ram @ 0x100000 (540672 bytes), entry @ 0x100000
Stage: done loading.
new:
CBFS: Looking for 'fallback/coreboot_ram'
CBFS: found.
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (507904 bytes), entry @ 0x100000
CBFS: stage loaded.
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
See http://review.coreboot.org/993 for details.
-gerrit
the following patch was just integrated into master:
commit 620d539482e5a21b931f37fb248b54915b7f8a88
Author: Patrick Georgi <patrick.georgi(a)secunet.com>
Date: Fri Oct 7 14:25:01 2011 +0200
siemens/sitemp_g1p1: Drop debug code
Change-Id: I40a4201b468131ba67e48ab68d62ca5413f2e2e8
Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>
Build-Tested: build bot (Jenkins) at Thu May 3 12:27:48 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu May 3 19:33:50 2012, giving +2
See http://review.coreboot.org/1000 for details.
-gerrit
the following patch was just integrated into master:
commit 5273ea56be0c1aa191fde01c5d5d160952fa22d6
Author: Patrick Georgi <patrick.georgi(a)secunet.com>
Date: Thu May 3 11:34:20 2012 +0200
roda/rk886ex: Expose VGA devices in devicetree
Otherwise set_subsystem isn't called for these (as they're not
marked on_mainboard)
Change-Id: I08e781735c59e4aa61009d2afa165d782f5a849e
Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>
Build-Tested: build bot (Jenkins) at Thu May 3 11:55:24 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu May 3 19:32:16 2012, giving +2
See http://review.coreboot.org/998 for details.
-gerrit
the following patch was just integrated into master:
commit 13a40c24f0d5c60df2045ad5c7b3709d2d82ccc4
Author: Patrick Georgi <patrick.georgi(a)secunet.com>
Date: Thu May 3 11:55:17 2012 +0200
lint: Avoid downloading blobs repository
The stable lint test "build-dir-handling" ran the build system
in a way that made it download the blobs repository. Since this
is part of the pre-commit hook, this might have kicked in with
users desiring not to have them.
Change-Id: I44a00137352c5966ff7fe2a030673276f6803908
Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>
Build-Tested: build bot (Jenkins) at Thu May 3 12:13:41 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Thu May 3 19:32:25 2012, giving +2
See http://review.coreboot.org/999 for details.
-gerrit
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1002
-gerrit
commit 3e4612f12abc040419971ac86f32ee7a5a39f75f
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Thu May 3 16:40:41 2012 -0700
Hook up MRC cache update
This one is a WIP:
- should not depend on CONFIG_CHROMEOS
- There might be a better place for it. Requirements:
- must be in ramstage (locking flash while executing code from there
might not work)
- must be after cbmem is reinitialized (so the mrc cache copy of the
current run can be found)
Change-Id: I8028fb073349ce2b027ef5f8397dc1a1b8b31c02
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
---
src/arch/x86/boot/tables.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 4fefc7d..ff57422 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -53,6 +53,11 @@ struct lb_memory *write_tables(void)
*/
unsigned long high_table_pointer;
+#if CONFIG_CHROMEOS
+ void update_mrc_cache(void);
+ update_mrc_cache();
+#endif
+
if (!high_tables_base) {
printk(BIOS_ERR, "ERROR: High Tables Base is not set.\n");
// Are there any boards without?