coreboot March 2012

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Patch set updated for coreboot: bb904b2 Increase size of the coreboot table area
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/704 -gerrit commit bb904b224e508d1fa0cd06bfeb1c450732a04ec1 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Sun Aug 14 13:52:03 2011 -0700 Increase size of the coreboot table area Packing a device tree into the coreboot table can easily make the table exceed the current limit of 8KB. However, right now there is no error handling in place to catch that case. Increase the maximum memory usable for all tables from 64KB to 128KB and increase the maximum coreboot table size from 8KB to 32KB. Change-Id: I2025bf070d0adb276c1cd610aa8402b50bdf2525 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/x86/boot/tables.c | 2 +- src/include/cbmem.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index 29d2ec0..b7dc4fe 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -202,7 +202,7 @@ struct lb_memory *write_tables(void) } #endif -#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE (32 * 1024) post_code(0x9d); high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE); diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 7c5ec07..9806854 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -20,8 +20,8 @@ #ifndef _CBMEM_H_ #define _CBMEM_H_ -/* Reserve 64k for ACPI and other tables */ -#define HIGH_MEMORY_DEF_SIZE ( 64 * 1024 ) +/* Reserve 128k for ACPI and other tables */ +#define HIGH_MEMORY_DEF_SIZE ( 128 * 1024 ) extern uint64_t high_tables_base, high_tables_size; #if CONFIG_HAVE_ACPI_RESUME

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Patch set updated for coreboot: 5365441 Fix compilation with CONFIG_USE_OPTION_TABLE enabled
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/696 -gerrit commit 536544151d45351e129b6ce018cd2128eca1da6f Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 29 15:34:14 2011 -0700 Fix compilation with CONFIG_USE_OPTION_TABLE enabled Change-Id: I6c5d973442bc1770702180a8964f1bf6ed6062ed Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/lib/Makefile.inc | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 432e24e..b930fcc 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -43,3 +43,11 @@ smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-$(CONFIG_USBDEBUG) += usbdebug.c $(obj)/lib/version.ramstage.o : $(obj)/build.h + +OPTION_TABLE_H:= +ifeq ($(CONFIG_HAVE_OPTION_TABLE),y) +OPTION_TABLE_H:=$(obj)/option_table.h +endif + +$(obj)/lib/uart8250mem.smm.o : $(OPTION_TABLE_H) +

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Patch set updated for coreboot: 9271105 Fix dependency problem for uart8250.c as well
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/698 -gerrit commit 927110510039eee5c16036b6e74607ae84950fcc Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Aug 11 14:51:31 2011 -0700 Fix dependency problem for uart8250.c as well If you build in parallel, option_table.h will occasionally not be there yet and the build will fail. Change-Id: I828956ab2e05c48d20c2f7c55616cc8fa19e1227 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/lib/Makefile.inc | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index b930fcc..906dfae 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -50,4 +50,5 @@ OPTION_TABLE_H:=$(obj)/option_table.h endif $(obj)/lib/uart8250mem.smm.o : $(OPTION_TABLE_H) +$(obj)/lib/uart8250.smm.o : $(OPTION_TABLE_H)

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Patch set updated for coreboot: 116004a Clean up use of CONFIG_ variables in coreboot_table.c
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/701 -gerrit commit 116004afe7d1796bfdad3a71ae04afad0fa8d462 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Aug 15 11:26:35 2011 -0700 Clean up use of CONFIG_ variables in coreboot_table.c CONFIG_ variables are used inconsistently within the file src/arch/x86/boot/coreboot_table.c. #ifdef will do the wrong thing if the option is disabled. #if (CONFIG_FOO == 1) is not needed. Change-Id: Ifcac6ceac5fb34b931281beae500023597b3533b Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/arch/x86/boot/coreboot_table.c | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index 78ff97d..77a1126 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -29,7 +29,7 @@ #include <version.h> #include <device/device.h> #include <stdlib.h> -#if (CONFIG_USE_OPTION_TABLE == 1) +#if CONFIG_USE_OPTION_TABLE #include <option_table.h> #include <cbfs.h> #endif @@ -198,7 +198,7 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header) return mainboard; } -#if (CONFIG_USE_OPTION_TABLE == 1) +#if CONFIG_USE_OPTION_TABLE static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header) { struct lb_record *rec; @@ -512,7 +512,7 @@ static void add_lb_reserved(struct lb_memory *mem) lb_add_rsvd_range, mem); } -#if CONFIG_WRITE_HIGH_TABLES == 1 +#if CONFIG_WRITE_HIGH_TABLES extern uint64_t high_tables_base, high_tables_size; #endif @@ -523,7 +523,7 @@ unsigned long write_coreboot_table( struct lb_header *head; struct lb_memory *mem; -#if CONFIG_WRITE_HIGH_TABLES == 1 +#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "Writing high table forward entry at 0x%08lx\n", low_table_end); head = lb_table_init(low_table_end); @@ -559,7 +559,7 @@ unsigned long write_coreboot_table( rom_table_end &= ~0xffff; printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end); -#if (CONFIG_USE_OPTION_TABLE == 1) +#if CONFIG_USE_OPTION_TABLE { struct cmos_option_table *option_table = cbfs_find_file("cmos_layout.bin", 0x1aa); if (option_table) { @@ -584,7 +584,7 @@ unsigned long write_coreboot_table( lb_add_memory_range(mem, LB_MEM_TABLE, rom_table_start, rom_table_end-rom_table_start); -#if CONFIG_WRITE_HIGH_TABLES == 1 +#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "Adding high table area\n"); // should this be LB_MEM_ACPI? lb_add_memory_range(mem, LB_MEM_TABLE, @@ -594,7 +594,7 @@ unsigned long write_coreboot_table( /* Add reserved regions */ add_lb_reserved(mem); -#if (CONFIG_HAVE_MAINBOARD_RESOURCES == 1) +#if CONFIG_HAVE_MAINBOARD_RESOURCES add_mainboard_resources(mem); #endif

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Patch set updated for coreboot: 5972775 Fix coreboot table size calculations.
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/703 -gerrit commit 597277514a7ea03d0a4494460a33b33d3463455b Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Tue Aug 16 11:44:35 2011 -0700 Fix coreboot table size calculations. The code when reporting the coreboot table size did not account for the last added table record. This change fixes the problem. . rebuild coreboot, program it on the target, restart it . look for 'Wrote coreboot table at:' in the console log . observe the adequate table size reported $ grep 'Wrote coreboot table:' /tmp/cb.log Wrote coreboot table at: 00000500, 0x10 bytes, checksum c06f Wrote coreboot table at: 7f6fc000, 0x1a73 bytes, checksum 3e45 $ Change-Id: Ic55501a4ae06fab2bcda9aea58e362325f2edccf Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> --- src/arch/x86/boot/coreboot_table.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index a001259..b0dcc9e 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -320,9 +320,10 @@ static unsigned long lb_table_fini(struct lb_header *head, int fixup) head->table_checksum = compute_ip_checksum(first_rec, head->table_bytes); head->header_checksum = 0; head->header_checksum = compute_ip_checksum(head, sizeof(*head)); - printk(BIOS_DEBUG, "Wrote coreboot table at: %p - %p checksum %x\n", - head, rec, head->table_checksum); - return (unsigned long)rec; + printk(BIOS_DEBUG, + "Wrote coreboot table at: %p, 0x%x bytes, checksum %x\n", + head, head->table_bytes, head->table_checksum); + return (unsigned long)rec + rec->size; } static void lb_cleanup_memory_ranges(struct lb_memory *mem)

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Patch set updated for coreboot: 40dea3f Fix compilation when USE_OPTION_TABLE is not defined.
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/702 -gerrit commit 40dea3f447fc9976a9cf781243480b411b064d82 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon Aug 15 16:35:10 2011 -0700 Fix compilation when USE_OPTION_TABLE is not defined. Change-Id: Id622e4e96b6c8e87b00a96c324a0b4dbfac3391d Signed-off-by: Duncan Laurie <dlaurie(a)google.com> --- src/arch/x86/boot/coreboot_table.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index 77a1126..a001259 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -29,9 +29,9 @@ #include <version.h> #include <device/device.h> #include <stdlib.h> +#include <cbfs.h> #if CONFIG_USE_OPTION_TABLE #include <option_table.h> -#include <cbfs.h> #endif static struct lb_header *lb_table_init(unsigned long addr)

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New patch to review for coreboot: 566c472 Initialize CBMEM early.
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/711 -gerrit commit 566c472c98872ea51b16dc428dc48e1988fa582b Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Tue Sep 20 17:07:14 2011 -0700 Initialize CBMEM early. We want to be able to share data between different phases of firmware (rom stage/ram stage/payload). Coreboot CBMEM seems an appropriate location for this data, but normally it is not initialized until coreboot reaches the ram stage. This change initializes the CBMEM while still in rom stage in case CONFIG_EARLY_CBMEM_INIT is set. Note that there is a discrepancy in how coreboot determines the size of DRAM at rom and ram stages, get_top_of_ram() is used at rom stage and is not defined for all platforms. Those platforms will have to define this function should they enable the CONFIG_EARLY_CBMEM_INIT flag. Change-Id: I81691d45e28de59496fb227f2cca4e8c15ece717 Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> --- src/include/cbmem.h | 4 +++- src/lib/cbmem.c | 39 +++++++++++++++++++++++---------------- 2 files changed, 26 insertions(+), 17 deletions(-) diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 9806854..a681c36 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -22,7 +22,9 @@ /* Reserve 128k for ACPI and other tables */ #define HIGH_MEMORY_DEF_SIZE ( 128 * 1024 ) +#ifndef __PRE_RAM__ extern uint64_t high_tables_base, high_tables_size; +#endif #if CONFIG_HAVE_ACPI_RESUME #define HIGH_MEMORY_SIZE ((CONFIG_RAMTOP - CONFIG_RAMBASE) + HIGH_MEMORY_DEF_SIZE) @@ -41,7 +43,7 @@ extern uint64_t high_tables_base, high_tables_size; #define CBMEM_ID_SMBIOS 0x534d4254 #define CBMEM_ID_NONE 0x00000000 -void cbmem_initialize(void); +int cbmem_initialize(void); void cbmem_init(u64 baseaddr, u64 size); int cbmem_reinit(u64 baseaddr); diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 202f521..f5c3d3a 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -183,30 +183,38 @@ void *cbmem_find(u32 id) return (void *)NULL; } -#ifndef __PRE_RAM__ -#if CONFIG_HAVE_ACPI_RESUME +#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) extern u8 acpi_slp_type; #endif -void cbmem_initialize(void) +#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) +/* Returns True if it was not intialized before. */ +int cbmem_initialize(void) { -#if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "%s: acpi_slp_type=%d\n", __func__, acpi_slp_type); - if (acpi_slp_type == 3 || acpi_slp_type == 2) { - if (!cbmem_reinit(high_tables_base)) { - printk(BIOS_DEBUG, "cbmem_reinit failed\n"); - /* Something went wrong, our high memory area got wiped */ + int rv = 0; + +#ifdef __PRE_RAM__ + extern unsigned long get_top_of_ram(void); + uint64_t high_tables_base = get_top_of_ram() - HIGH_MEMORY_SIZE; + uint64_t high_tables_size = HIGH_MEMORY_SIZE; +#endif + + /* We expect the romstage to always initialize it. */ + if (!cbmem_reinit(high_tables_base)) { +#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) + /* Something went wrong, our high memory area got wiped */ + if (acpi_slp_type == 3 || acpi_slp_type == 2) acpi_slp_type = 0; - cbmem_init(high_tables_base, high_tables_size); - } - } else { +#endif cbmem_init(high_tables_base, high_tables_size); + rv = 1; } -#else - cbmem_init(high_tables_base, high_tables_size); -#endif +#ifndef __PRE_RAM__ cbmem_arch_init(); +#endif + return rv; } +#endif #ifndef __PRE_RAM__ void cbmem_list(void) @@ -240,5 +248,4 @@ void cbmem_list(void) } #endif -#endif

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New patch to review for coreboot: 19b7323 Introduce config option to initialize CBMEM early.
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/710 -gerrit commit 19b732385037e1a8a2ee710ad9c4e5d6b169a874 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Tue Sep 20 16:46:46 2011 -0700 Introduce config option to initialize CBMEM early. We want to be able to communicate information between rom and ram stages of coreboot. This configuration option will be used to compile such ability in. Change-Id: I6736fdc264ecd0b63369b28462d7bb96e4c2b012 Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> --- src/Kconfig | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index c165d93..544b61b 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -112,6 +112,14 @@ config INCLUDE_CONFIG_FILE help Include in CBFS the coreboot config file that was used to compile the ROM image +config EARLY_CBMEM_INIT + bool "Initialize CBMEM while in ROM stage" + default n + help + Make coreboot initialize the cbmem structures while running in rom + stage. This could be useful when the rom stage wants to communicate + some, for instance, execution timestamps. + endmenu source src/mainboard/Kconfig

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New patch to review for coreboot: 0e771e7 Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/709 -gerrit commit 0e771e77afd8f12d8c4971deee73bd422b9664a8 Author: Gabe Black <gabeblack(a)google.com> Date: Fri Sep 16 02:24:03 2011 -0700 Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available by including byteorder.h Change-Id: I9ab8cb51bd680e861b28d5130d09547bb9ab3b1f Signed-off-by: Gabe Black <gabeblack(a)google.com> --- src/include/cbfs_core.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h index 70368f8..43e6b9b 100644 --- a/src/include/cbfs_core.h +++ b/src/include/cbfs_core.h @@ -49,6 +49,8 @@ #ifndef _CBFS_CORE_H_ #define _CBFS_CORE_H_ +#include <arch/byteorder.h> + /** These are standard values for the known compression alogrithms that coreboot knows about for stages and payloads. Of course, other CBFS users can use whatever

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New patch to review for coreboot: 618c314 Add an implementation for the memchr library function
by Stefan Reinauer 05 Mar '12

05 Mar '12

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/708 -gerrit commit 618c314d845a4fc23f8fc8902bcff334c1d8fd12 Author: Gabe Black <gabeblack(a)google.com> Date: Fri Sep 16 02:18:56 2011 -0700 Add an implementation for the memchr library function This function is declared in string.h, but no implementation was compiled in this change adds a very simple, naive implementation. Change-Id: Icded479d246f7cce8a3d2154c69f75178fa513e1 Signed-off-by: Gabe Black <gabeblack(a)google.com> --- src/lib/Makefile.inc | 2 ++ src/lib/memchr.c | 11 +++++++++++ 2 files changed, 13 insertions(+), 0 deletions(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 906dfae..e0e5e75 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -1,6 +1,7 @@ romstage-y += memset.c +romstage-y += memchr.c romstage-y += memcpy.c romstage-y += memcmp.c romstage-y += cbfs.c @@ -15,6 +16,7 @@ romstage-$(CONFIG_CONSOLE_NE2K) += compute_ip_checksum.c romstage-$(CONFIG_USBDEBUG) += usbdebug.c ramstage-y += memset.c +ramstage-y += memchr.c ramstage-y += memcpy.c ramstage-y += memcmp.c ramstage-y += memmove.c diff --git a/src/lib/memchr.c b/src/lib/memchr.c new file mode 100644 index 0000000..a890dce --- /dev/null +++ b/src/lib/memchr.c @@ -0,0 +1,11 @@ +#include <string.h> +void *memchr(const void *s, int c, size_t n) +{ + const unsigned char *sc = s; + while (n--) { + if (*sc == (unsigned char)c) + return (void *)sc; + sc++; + } + return NULL; +}

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coreboot March 2012