coreboot June 2011

coreboot@coreboot.org

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274 discussions

[commit] r6618 - trunk/src/include/device
by repository service 03 Jun '11

03 Jun '11

Author: uwe Date: Fri Jun 3 21:46:25 2011 New Revision: 6618 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6618 Log: Correct wrong PCI ID for VIA K8M890 Chrome. With the K8T800/M800 patch from r6367 the PCI IDs for the VIA chrome were moved to pci_ids.h. The PCI ID for K8M890 chrome was copied incorrectly. (3220 instead of 3230). This patch defines the correct PCI ID for this device. Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/src/include/device/pci_ids.h Modified: trunk/src/include/device/pci_ids.h ============================================================================== --- trunk/src/include/device/pci_ids.h Fri Jun 3 12:14:56 2011 (r6617) +++ trunk/src/include/device/pci_ids.h Fri Jun 3 21:46:25 2011 (r6618) @@ -1281,7 +1281,7 @@ #define PCI_DEVICE_ID_VIA_K8M890CE_4 0x4336 #define PCI_DEVICE_ID_VIA_K8M890CE_5 0x5336 #define PCI_DEVICE_ID_VIA_K8M890CE_7 0x7336 -#define PCI_DEVICE_ID_VIA_K8M890_CHROME 0x3220 +#define PCI_DEVICE_ID_VIA_K8M890_CHROME 0x3230 #define PCI_DEVICE_ID_VIA_K8T890CE_PEG 0xa238 #define PCI_DEVICE_ID_VIA_K8T890CE_PEX0 0xc238 #define PCI_DEVICE_ID_VIA_K8T890CE_PEX1 0xd238

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[PATCH] More explicite and straight way to set seed
by Bao, Zheng 03 Jun '11

03 Jun '11

More explicite and straight way to set seed. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: src/northbridge/amd/amdmct/mct/mctsrc.c =================================================================== --- src/northbridge/amd/amdmct/mct/mctsrc.c (revision 6135) +++ src/northbridge/amd/amdmct/mct/mctsrc.c (working copy) @@ -1023,13 +1023,9 @@ dev = pDCTstat->dev_dct; for (index = 0x50; index <= 0x52; index ++) { - val = Get_NB32_index_wait(dev, index_reg, index); - val |= (FenceTrnFinDlySeed & 0x1F); + val = (FenceTrnFinDlySeed & 0x1F); if (index != 0x52) { - val &= ~(0xFF << 8); - val |= (val & 0xFF) << 8; - val &= 0xFFFF; - val |= val << 16; + val |= val << 8 | val << 16 | val << 24; } Set_NB32_index_wait(dev, index_reg, index, val); } Index: src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c =================================================================== --- src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (revision 6135) +++ src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c (working copy) @@ -972,13 +972,9 @@ */ dev = pDCTstat->dev_dct; for (index = 0x50; index <= 0x52; index ++) { - val = Get_NB32_index_wait(dev, index_reg, index) & ~0xFF; - val |= (FenceTrnFinDlySeed & 0x1F); + val = (FenceTrnFinDlySeed & 0x1F); if (index != 0x52) { - val &= ~(0xFF << 8); - val |= (val & 0xFF) << 8; - val &= 0xFFFF; - val |= val << 16; + val |= val << 8 | val << 16 | val << 24; } Set_NB32_index_wait(dev, index_reg, index, val); }

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phoronix.com: Coreboot Finally Takes The Interest Of OEMs
by Xavi Drudis Ferran 03 Jun '11

03 Jun '11

Just saw an article on coreboot Coreboot Finally Takes The Interest Of OEMs http://www.phoronix.com/scan.php?page=news_item&px=OTUyMg

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[rfc] ACPI cleanup proposal
by Cristian Măgherușan-Stanciu 03 Jun '11

03 Jun '11

Hello, Please find attached a diff that contains my work done during the hackathon in Prague. The motherboard code that creates ACPi is cleaner, as you can see on the Asus M2V-MX-SE code modified as a reference. For some reasons the motherboard failed to boot after I applied it, so most likely there is a bug which needs to be fixed. I don't have access to the mainboard anymore (it was Ruik's) and I will only have access to mine in a month or so, so I thought that I should send the code as a RFC, maybe someone will be able to figure it out sooner than that and why not port it to other boards if appropriate. Cheers, Cristi

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[commit] r6617 - trunk/src/mainboard/advansus/a785e-i
by repository service 03 Jun '11

03 Jun '11

Author: kerry Date: Fri Jun 3 12:14:56 2011 New Revision: 6617 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6617 Log: advansus/a785e-i mainboard enable warning as error Signed-off-by: Kerry She <kerry.she(a)amd.com> Acked-by: Kerry She <kerry.she(a)amd.com> Modified: trunk/src/mainboard/advansus/a785e-i/Kconfig trunk/src/mainboard/advansus/a785e-i/romstage.c Modified: trunk/src/mainboard/advansus/a785e-i/Kconfig ============================================================================== --- trunk/src/mainboard/advansus/a785e-i/Kconfig Wed Jun 1 21:54:16 2011 (r6616) +++ trunk/src/mainboard/advansus/a785e-i/Kconfig Fri Jun 3 12:14:56 2011 (r6617) @@ -107,6 +107,6 @@ config WARNINGS_ARE_ERRORS bool - default n + default y endif #BOARD_ADVANSUS_A785E_I Modified: trunk/src/mainboard/advansus/a785e-i/romstage.c ============================================================================== --- trunk/src/mainboard/advansus/a785e-i/romstage.c Wed Jun 1 21:54:16 2011 (r6616) +++ trunk/src/mainboard/advansus/a785e-i/romstage.c Fri Jun 3 12:14:56 2011 (r6617) @@ -25,6 +25,7 @@ #define FAM10_SCAN_PCI_BUS 0 #define FAM10_ALLOCATE_IO_RANGE 0 +#include <lib.h> #include <stdint.h> #include <string.h> #include <device/pci_def.h>

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haveing troubling building core boot!
by Raleigh Boulware 02 Jun '11

02 Jun '11

i try to do a build Of core boot and I get this after running make. This is my first time EVER doing this can someone help. [root@localhost coreboot]# make CC lib/memset.romstage.o CC lib/memcpy.romstage.o CC lib/memcmp.romstage.o CC lib/cbfs.romstage.o CC lib/lzma.romstage.o CC lib/ramtest.romstage.o CC lib/uart8250.romstage.o CC console/vtxprintf.romstage.o GEN build.h CC console/console.romstage.o CC console/post.romstage.o CC console/die.romstage.o CC romstage.inc POST romstage.inc GEN crt0.S CC mainboard/asus/mew-am/crt0.s CC mainboard/asus/mew-am/crt0.romstage.o CC arch/x86/lib/romstage_console.romstage.o CC arch/x86/lib/cbfs_and_run.romstage.o CC southbridge/intel/i82801ax/early_smbus.romstage.o CC northbridge/intel/i82810/raminit.romstage.o CC northbridge/intel/i82810/debug.romstage.o LINK coreboot /usr/bin/ld: section .eh_frame [00000000fffffff0 -> 0000000100000a17] overlaps section .reset [00000000fffffff0 -> 00000000ffffffff] /usr/bin/ld: build/coreboot: section .eh_frame vma 0xfffffff0 overlaps previous sections collect2: ld returned 1 exit status make: *** [build/coreboot] Error 1 [root@localhost coreboot]# ^C [root@localhost coreboot]#

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JetwayJNC92-330 support
by Joe Holden 01 Jun '11

01 Jun '11

Hi guys, Not sure if this is the right place to ask, but what are the chances of the above board being supported? I have a couple in use and they look like pretty standard ICH7/945 boards: http://www.mini-itx.com/store/?c=47#jnc92-330 Thanks, J

2 1

[commit] r6616 - trunk
by repository service 01 Jun '11

01 Jun '11

Author: oxygene Date: Wed Jun 1 21:54:16 2011 New Revision: 6616 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6616 Log: Really fix iasl filename issues in our build system There's a remaining issue that iasl cuts of "\..*$" from output paths, even if that substring contains "/" (ie. across directories) Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/Makefile.inc Modified: trunk/Makefile.inc ============================================================================== --- trunk/Makefile.inc Wed Jun 1 21:29:48 2011 (r6615) +++ trunk/Makefile.inc Wed Jun 1 21:54:16 2011 (r6616) @@ -64,8 +64,8 @@ $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(abspath $(obj)/config.h) -I$(src) -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl - cd $$(dir $$@); iasl -p $$(abspath $$(obj)/$(1)) -tc $$(notdir $$(basename $$(a))).asl - mv $$(obj)/$(1).hex $$(basename $$(a)).c + cd $$(dir $$@); iasl -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl + mv $$(basename $$(a)).hex $$(basename $$(a)).c $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex

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[commit] r6615 - trunk/util/abuild
by repository service 01 Jun '11

01 Jun '11

Author: oxygene Date: Wed Jun 1 21:29:48 2011 New Revision: 6615 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6615 Log: Report build result from abuild (did all requested boards build?) Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/util/abuild/abuild Modified: trunk/util/abuild/abuild ============================================================================== --- trunk/util/abuild/abuild Wed Jun 1 04:00:30 2011 (r6614) +++ trunk/util/abuild/abuild Wed Jun 1 21:29:48 2011 (r6615) @@ -35,6 +35,9 @@ # Configure-only mode configureonly=0 +# Did any board fail to build? +failed=0 + # One might want to adjust these in case of cross compiling for i in make gmake gnumake nonexistant_make; do $i --version 2>/dev/null |grep "GNU Make" >/dev/null && break @@ -294,6 +297,7 @@ printf "FAILED after ${duration}s!\nLog excerpt:\n" tail -n $CONTEXT make.log 2> /dev/null || tail -$CONTEXT make.log cd $CURR + failed=1 return 1 fi } @@ -622,3 +626,4 @@ fi xml '</abuild>' +exit $failed

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[RFC]Using gerrit for patch management (and jenkins for QA)
by Patrick Georgi 01 Jun '11

01 Jun '11

Hi, I'm officially sick and tired of patchwork. Or from losing patches to the mailing list. Given how the git read-only mirror gains popularity, maybe we should use that to our advantage and upgrade other parts of our tool set, too. Enter gerrit: A web tool to push git commits to, have them reviewed, with proper handling of updated patches. Automatic support for dependencies between commits (by default it assumes that ancestry means dependency). An automated gatekeeper to the repository. It's built by Google and they use it for Android (https://review.source.android.com/) and Chromium (http://gerrit.chromium.org/). Thankfully, it's open source. Should we use it, I'd also add Jenkins (http://www.jenkins-ci.org) to the mix. Jenkins is a fork of Hudson, both are Continuous Integration tools. Kinda like our current build bot at qa.coreboot.org, just with some more maintenance behind it, and a couple of neat features: "The mix" would be inclue jenkins test-building all proposed patches on gerrit, vetoing those that fail in gerrit. Nice for commits where the dev forgot to add a file to the repo, or which were only partially tested. Anyway, this would be a rather large change in the development workflow, so unlike other changes to our infrastructure this is nothing I can "just do". Opinions? Patrick

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coreboot June 2011