coreboot

coreboot@coreboot.org
  • 62 participants
  • 161 discussions
Re: [coreboot] DL145 G1 with dual dualcore CPU using coreboot ?
by Oskar Enoksson
8 years, 1 month
I865 memory controller status
by James Wall
8 years, 2 months
Hackaton in Prague 2011
by Rudolf Marek
8 years, 4 months
[PATCH] ASRock E350M1 update
by Scott Duplichan
8 years, 5 months
[patch] ck804 ACPI PIC/APIC interrupt logic
by Jonathan A. Kollasch
8 years, 5 months
[patch] update ddr3 max frequency
by Marc Jones
8 years, 5 months
[PATCH] Correct wrong PCI ID vor VIA K8M890 Chrome
by Alex G.
8 years, 5 months
[PATCH] More explicite and straight way to set seed
by Bao, Zheng
8 years, 5 months
haveing troubling building core boot!
by Raleigh Boulware
8 years, 5 months
[RFC]Using gerrit for patch management (and jenkins for QA)
by Patrick Georgi
8 years, 5 months
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