coreboot May 2010

coreboot@coreboot.org

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300 discussions

[commit] r5570 - trunk/util/crossgcc
by repository service 19 May '10

19 May '10

Author: oxygene Date: Wed May 19 09:21:31 2010 New Revision: 5570 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5570 Log: Fix path for mingw workaround. Trivial. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/util/crossgcc/buildgcc Modified: trunk/util/crossgcc/buildgcc ============================================================================== --- trunk/util/crossgcc/buildgcc Tue May 18 18:24:07 2010 (r5569) +++ trunk/util/crossgcc/buildgcc Wed May 19 09:21:31 2010 (r5570) @@ -371,7 +371,7 @@ printf "Building binutils ${BINUTILS_VERSION} ... " ( # workaround for building binutils 2.20.1 on MINGW: - touch ../binutils-${BINUTILS_VERSION}/bfd/doc/bfd.info + touch binutils-${BINUTILS_VERSION}/bfd/doc/bfd.info # now build binutils cd build-binutils rm -f .failed

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[Qemu] [PATCH] Allow booting large Coreboot image as BIOS
by Ed Swierk 19 May '10

19 May '10

When I build a 1024-kB Coreboot image (emulation/qemu-x86 mainboard), qemu goes into a loop, resetting just after the "Jumping to boot code" message. This can be avoided by removing the "| IO_MEM_ROM" from the call to cpu_register_physical_memory(0x100000 - isa_bios_size, ...) call in pc_memory_init(). The next problem I hit is the complaint "ERROR: No valid CBFS header found! Maybe the ROM isn't entirely mapped yet?". I can work around this by allocating a separate chunk of RAM for the top 128 kB of the BIOS image in ISA space and copying it rather than mapping it from the full ROM image. Both of these changes are the result of random hacking rather than any real understanding of the issues involved. I'd appreciate any better ideas. Signed-off-by: Ed Swierk <eswierk(a)aristanetworks.com> --- hw/pc.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)

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ask for support for some hardware
by Benediktus Anindito 18 May '10

18 May '10

hi everybody, i have some servers on the lab, and here is the flashrom and superiotool dump. is coreboot supports their hardware? regards, benny.

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[commit] r5569 - in trunk/src/superio/winbond: w83627ehg w83627hf
by repository service 18 May '10

18 May '10

Author: stepan Date: Tue May 18 18:24:07 2010 New Revision: 5569 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5569 Log: get rid of some duplicate inclusion warnings. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/superio/winbond/w83627ehg/w83627ehg.h trunk/src/superio/winbond/w83627hf/w83627hf.h Modified: trunk/src/superio/winbond/w83627ehg/w83627ehg.h ============================================================================== --- trunk/src/superio/winbond/w83627ehg/w83627ehg.h Mon May 17 13:02:25 2010 (r5568) +++ trunk/src/superio/winbond/w83627ehg/w83627ehg.h Tue May 18 18:24:07 2010 (r5569) @@ -19,6 +19,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __SUPERIO_WINBOND_W83627EHG_W83627EHG_H +#define __SUPERIO_WINBOND_W83627EHG_W83627EHG_H + #define W83627EHG_FDC 0 /* Floppy */ #define W83627EHG_PP 1 /* Parallel Port */ #define W83627EHG_SP1 2 /* Com1 */ @@ -50,3 +53,5 @@ void w83627ehg_disable_dev(device_t dev); void w83627ehg_enable_serial(device_t dev, unsigned iobase); #endif + +#endif Modified: trunk/src/superio/winbond/w83627hf/w83627hf.h ============================================================================== --- trunk/src/superio/winbond/w83627hf/w83627hf.h Mon May 17 13:02:25 2010 (r5568) +++ trunk/src/superio/winbond/w83627hf/w83627hf.h Tue May 18 18:24:07 2010 (r5569) @@ -20,6 +20,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#ifndef __SUPERIO_WINBOND_W83627HF_W83627HF_H +#define __SUPERIO_WINBOND_W83627HF_W83627HF_H + #define W83627HF_FDC 0 /* Floppy */ #define W83627HF_PP 1 /* Parallel Port */ #define W83627HF_SP1 2 /* Com1 */ @@ -117,3 +120,4 @@ void w83627hf_set_clksel_48(device_t dev); #endif +#endif

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[PATCH][again] 440BX raminit cleanup
by Keith Hui 18 May '10

18 May '10

A number of cleanups for 440BX raminit code. Resolves a number of TODOs items within, and clarified a number of other TODOs. Change register_values[] from long to u8 (byte). For what we are doing this is sufficient and makes it only 1/4 the size. Remove a hard-coding of SDRAMC register that is redundant and now incorrect, now that SDRAMC is conditioned on SDRAMPWR_4DIMM Kconfig and set through register_values[]. RPS registers are now set in runtime code; remove it from register_values[] table. Bring DUMPNORTH() back. The code it refers to is still there. Move #define of NB up so the DUMPNORTH() macro can use it. Signed-off-by: Keith Hui <buurin(a)gmail.com>

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Re: [coreboot] [PATCH] SECC Pentium 2/3 users are gonna love this
by Keith Hui 18 May '10

18 May '10

Hi all, This is it. The 72oz steak. ;-) It is ~180k seasoned with a few other related changes (below), so it is gzipped. I may have committed a few "crimes" here, but anyway... First, I found out why the debug output isn't correct - A typo caused the cache size to got lost amid the shuffle. It has been fixed in this version. This patch: 1. Brings back L2 initialization from coreboot v1 for family 63x,65x and 67x CPUs. Need someone with a Mendocino Celeron to see if the entire 128k of L2 is still enabled. 2. Split model_67x/65x and model_63x from model_6xx. model_67x also serves model 65x because they share too much code. Also included are Intel microcode for all CPUs in these families. There's just one file for all microcodes in one family. 3. In Slot 1 Makefile.inc, conditionally bring in sources in models 63x/67x/6bx only when the proper config has been selected in Kconfig. Also, only include cache_as_ram.inc if USE_DCACHE_RAM (ie. CAR) has been selected. 4. Remove USE_DCACHE_RAM from Slot 1 Kconfig. They should be in the mainboards. Add CPU_INTEL_MODEL_6xX Kconfigs needed for (3) above. 5. Blocked out some apparently unused #includes from model_6xx_init.c. Once we're sure nothing really are using it, then remove them. Bootlog with a PIII 600MHz can be found here: http://coreboot.pastebin.com/PNUzJXZT Have fun, bon appetit and cheers. Signed-off-by: Keith Hui <buurin(a)gmail.com> On Wed, May 12, 2010 at 12:16 PM, Joseph Smith <joe(a)settoplinux.org> wrote: > > > > On Wed, 12 May 2010 11:48:57 -0400, Keith Hui <buurin(a)gmail.com> wrote: >> Yes, the debug output from the L2 init code does say 128K, but >> /proc/cpuinfo reports 512K. This is where I'd like some expert >> opinions. >> > Sure, but we need to see the code to give an opinion :-) > > -- > Thanks, > Joseph Smith > Set-Top-Linux > www.settoplinux.org > >

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Indtast Bcc Advice needed about payload when only usingLinux. (FILO, GRUB2?)
by anders＠jenbo.dk 18 May '10

18 May '10

I have used gurb to boot from usb on a system where the BIOS didn't support usb boot so grub also has usb support. Mvh Anders ----- Reply message ----- Fra: "Stefan Reinauer" <stefan.reinauer(a)coresystems.de> Dato: tir., maj 18, 2010 16:43 Emne: [coreboot] Advice needed about payload when only usingLinux. (FILO, GRUB2?) Til: <coreboot(a)coreboot.org> > > I thourght that filo was being depricated for grub2? > Does it say so somewhere? If so, we should remove that statement. Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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H8QME 128GB RAM not Booting
by Knut Kujat 18 May '10

18 May '10

Hi, I have a board here with 128GB Ram (16*8GB) and it won't boot. It hangs at "Copying data from cache to RAM -- switching to use RAM as stack...". So at least ram initialization is done, but why does it stop booting? Some values I have to increment in order to use more RAM? Thanks, Knut Kujat.

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Re: [coreboot] Advice needed about payload when only usingLinux. (FILO, GRUB2?)
by Anders Jenbo 18 May '10

18 May '10

I thourght that filo was being depricated for grub2? Can some one tell me the difference benifit of one over the othere? -Anders On Tue 18/05/10 13:09 , Joseph Smith <joe(a)settoplinux.org> wrote: > On Tue, 18 May 2010 10:14:46 +0200, "Joop Boonen" > wrote: > > All, > > > > I need some advice > > > > As I'm using Linux I don't prefer to use a BIOS like SEABIOS but i > prefer > > to use something mean and lean line FILO or GRUB2 (As Linux > doesn't need > > BIOS). > > > > The things that are important to me are e few things: > > 1) Boot Linux > > 2) Be able to install Linux from a CD > > > > Which payload do you advice? Is there still development effort in > FILO or > > GRUB2? > > > > Regards, > > > > Joop. > > > FILO hands down :-) > -- > Thanks, > Joseph Smith > Set-Top-Linux > www.settoplinux.org > -- > coreboot mailing list: > http://www.coreboot.org/mailman/listinfo/coreboot > > ---- Msg sent via @Mail - http://atmail.com/

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Advice needed about payload when only using Linux. (FILO, GRUB2?)
by Joop Boonen 18 May '10

18 May '10

All, I need some advice As I'm using Linux I don't prefer to use a BIOS like SEABIOS but i prefer to use something mean and lean line FILO or GRUB2 (As Linux doesn't need BIOS). The things that are important to me are e few things: 1) Boot Linux 2) Be able to install Linux from a CD Which payload do you advice? Is there still development effort in FILO or GRUB2? Regards, Joop.

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coreboot May 2010