coreboot May 2010

coreboot@coreboot.org

59 participants
300 discussions

FYI Cheap Rioworks HDAMA's
by Joseph Smith 21 May '10

21 May '10

FYI Cheap Rioworks HDAMA's http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=230372173250&ssPageName=… Just need HDD and Memory :-) -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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How to sent options via FILO
by Joop Boonen 21 May '10

21 May '10

All, I have a question for troubleshooting I need to sent kernel boot options to the kernel. Does anyone know if this is possible, if so what is the syntax? Regards, Joop.

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Re: [coreboot] Indtast Bcc Wyse S10 and coreboot
by Oliver Schinagl 21 May '10

21 May '10

Right, I saw on the wiki that the S50 was tested etc, so it should be "supported". The bios is socketed! I can take some foto's next week for the wiki if desired! I have attached several documents from the several commands. These commands where run on an Ubuntu 10.04 from a USB stick. It took about 10 minutes to start, but runs reasonable well :) Flashrom.txt lists flashrom -V; on a sidenote, since I have several of these terminals, and I can 'hotswap' I could test the erase thing? How would this work and how would I recover if it goes bad. I'm willing to try if you give me detailed instructions :) Superiotool didn't report anything interesting; there is no superio chip :) I also attached lspci -vvvxxx and dmesg aswell as cpuinfo To recap; I think it's an AMD Geode GX2 or LX, with an CS5536 'companion chip'. The audiochip isn't anything special; it's an ACL655 and the network is powerd by an RTL8100CL. What I'm hoping, is using someting like bayou to boot either whatever is stored on the local 'hdd' or boot an PXE image. USB would be handy too I suppose :) Thanks for your time again; Oliver On 05/20/2010 07:27 PM, anders(a)jenbo.dk wrote: > Can the BIOS be swapped (is it socketed), do you have a spare (or one > you fan borrow from motherboard) . > Is the board using a supported or documented SuperIO (use superiotool, > the manual, the we or your eyes to see what chip you have). > Is the southbridg supported. > Is the northbridg supported. > > Mvh Anders > > ----- Reply message ----- > Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> > Dato: tor., maj 20, 2010 18:28 > Emne: [coreboot] Wyse S10 and coreboot > Til: <coreboot(a)coreboot.org> > > Hello all, > > I am very interested in starting to play with coreboot and use it on > some of my systems. I have been interested in coreboot and following it > for a few years now. > > I'll skip the chit chat and get straight to it. I got my hands on a few > Wyse S10 thinclients, and they work quite well, booting via PXE or USB. > Recently, I found some cheap Disk on Module 44pin 'ssd' and wanted to > try them out in the S10. > > Unforuntatly, I'm getting an error when trying to run someting from it; > that the IDE port has been disabled. > > Since getting a bios upgrade (which might not fix it) is a very tedious > task; i decided to look at coreboot. > > My question is, I suppose quite simple; Where do I start? > > Thanks, > > Oliver > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > >

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[PATCH] reduce the size of devices
by Myles Watson 21 May '10

21 May '10

Use linked lists for resources instead of fixed arrays. resources.diff - changes the definitions resource_usage.diff - changes the functions where resources are used sconfig.diff - changes the device tree >From the qemu boot log: before: malloc Enter, size 1092, free_mem_ptr 00118444 malloc 00118444 after: malloc Enter, size 228, free_mem_ptr 001180e4 malloc 001180e4 I allocate resources in blocks of 64. It could be smaller to decrease memory usage, but I think it's plenty large (2560 bytes) Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

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Indtast Bcc Indtast Bcc Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by anders＠jenbo.dk 21 May '10

21 May '10

Make sure that it is 2MB and now 2Mb(it = 256KB). And then pick the right size in coreboot. Mvh Anders ----- Reply message ----- Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> Dato: fre., maj 21, 2010 08:36 Emne: [coreboot] Indtast Bcc Indtast Bcc Indtast Bcc Wyse S10 and coreboot Til: <coreboot(a)coreboot.org> On 05/21/2010 08:28 AM, anders(a)jenbo.dk wrote: > You will need the developer package of pciutils, use the name on the > wiki it is in the ubuntu repository. I couldn't find it, well unless it's pciutils and pci-utils-dev :p I'll search more. > > Yes seabios is the best to start of with, download it via git, and > configure it as a payload (se wiki) then make it. All right. > > For coreboot al you need to do is pick s50 as the board, pick the > right Rom size, point to the payload. The romsize defaults to 256k but according to flashrom (And the markings on the chip) it's a 2mb flash unit? Also there's a lot of VGA, VSA and other settings that where very confusing as I read somewhere on the wiki; that the Geode GX2/LX don't support VGA things? And the VSA bit, I found that there is OpenVSA but it's highly experimental? Do I need it at all? > As for network boot you will need an additional tool (look at the wiki). GPXE stuff I belive? Thank you for your time so far! Oliver -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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Indtast Bcc Indtast Bcc Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by anders＠jenbo.dk 21 May '10

21 May '10

I haven't worked with build in gratis cards, but you will probably need a copy of your vga Rom. I prefer to have seabios load the vga Rom. Mvh Anders ----- Reply message ----- Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> Dato: fre., maj 21, 2010 08:36 Emne: [coreboot] Indtast Bcc Indtast Bcc Indtast Bcc Wyse S10 and coreboot Til: <coreboot(a)coreboot.org> On 05/21/2010 08:28 AM, anders(a)jenbo.dk wrote: > You will need the developer package of pciutils, use the name on the > wiki it is in the ubuntu repository. I couldn't find it, well unless it's pciutils and pci-utils-dev :p I'll search more. > > Yes seabios is the best to start of with, download it via git, and > configure it as a payload (se wiki) then make it. All right. > > For coreboot al you need to do is pick s50 as the board, pick the > right Rom size, point to the payload. The romsize defaults to 256k but according to flashrom (And the markings on the chip) it's a 2mb flash unit? Also there's a lot of VGA, VSA and other settings that where very confusing as I read somewhere on the wiki; that the Geode GX2/LX don't support VGA things? And the VSA bit, I found that there is OpenVSA but it's highly experimental? Do I need it at all? > As for network boot you will need an additional tool (look at the wiki). GPXE stuff I belive? Thank you for your time so far! Oliver -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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Indtast Bcc Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by anders＠jenbo.dk 21 May '10

21 May '10

You will need the developer package of pciutils, use the name on the wiki it is in the ubuntu repository. Yes seabios is the best to start of with, download it via git, and configure it as a payload (se wiki) then make it. For coreboot al you need to do is pick s50 as the board, pick the right Rom size, point to the payload. As for network boot you will need an additional tool (look at the wiki). Mvh Anders ----- Reply message ----- Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> Dato: fre., maj 21, 2010 08:08 Emne: [coreboot] Indtast Bcc Indtast Bcc Wyse S10 and coreboot Til: <coreboot(a)coreboot.org> On 05/21/2010 07:50 AM, anders(a)jenbo.dk wrote: > Also check out the required tool chain here > coreboot.org/Development_Guidelines > I checked those and I have everything on my Ubuntu laptop, except pciutils-dev package. Seems like it doesn't exist. I checked through the sources and there weren't many header files included; Which files from pciutils-dev are needed that wouldn't be in a pciutils package? -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by Oliver Schinagl 21 May '10

21 May '10

On 05/21/2010 07:30 AM, anders(a)jenbo.dk wrote: > Yeah I looked at the manual, only difference is between s10-s90 is RAM > and hdd size. Ah, didn't even know they had HDD versions too in the S series... oliver

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Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by anders＠jenbo.dk 21 May '10

21 May '10

Also check out the required tool chain here coreboot.org/Development_Guidelines Mvh Anders ----- Reply message ----- Fra: "Myles Watson" <mylesgw(a)gmail.com> Dato: tor., maj 20, 2010 22:45 Emne: [coreboot] Indtast Bcc Wyse S10 and coreboot Til: "'Oliver Schinagl'" <oliver(a)schinagl.nl>, <coreboot(a)coreboot.org> > > Try compiling the S50 code and flash the content to your bios. It seams > > that there is no com port so you will need a USB debug device if you > > want to debug the boot process. > > > Oh yeah, I forgot to ask; 'compile' how? Is there a good wiki page? The links here: http://www.coreboot.org/Welcome_to_coreboot like these: http://www.coreboot.org/Build_HOWTO http://www.coreboot.org/Download_coreboot should help. Thanks, Myles -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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Indtast Bcc Indtast Bcc Wyse S10 and coreboot
by anders＠jenbo.dk 21 May '10

21 May '10

svn co svn://coreboot.org/coreboot/trunk coreboot http://www.coreboot.org/Build_HOWTO Mvh Anders ----- Reply message ----- Fra: "Oliver Schinagl" <oliver(a)schinagl.nl> Dato: tor., maj 20, 2010 22:30 Emne: [coreboot] Indtast Bcc Wyse S10 and coreboot Til: <coreboot(a)coreboot.org> On 05/20/2010 09:48 PM, Anders Jenbo wrote: > Heres a few lines to test erase and restore every thing. > > sudo flashrom -r S10.rom > sudo rm ignoreme.txt > sudo flashrom -E -V> flashrom-erase-SST49LF016C.txt > sudo flashrom -w S10.rom > > But i think there might actually be more to testing erase, then just > erasing via the normal flashrom. > > Take a full picture of the board and note posible revision numbers. > > Try compiling the S50 code and flash the content to your bios. It seams > that there is no com port so you will need a USB debug device if you > want to debug the boot process. > Oh yeah, I forgot to ask; 'compile' how? Is there a good wiki page? > If it doesn't work then all you have to do is boot up another S10, pull > out it's bios (while the system is on), plug in the bad bios, and flash > your S10.rom image to it, and then place one of them in the other board. > > if your rom looks like this > http://www.flashrom.org/images/thumb/8/85/Plcc32_in_socket.jpg/180px-Plcc32… > then it is recomented to glue push pins on top of them, to pull them out > with out issues, using super glue. Like this > http://www.flashrom.org/images/thumb/b/b8/Pushpin_roms_2.jpg/800px-Pushpin_… > It is still posible to break off the push pin if you can't fit it in the > small computer when you are done. > > > -Anders > > > tor, 20 05 2010 kl. 20:20 +0200, skrev Oliver Schinagl: > >> Right, >> >> I saw on the wiki that the S50 was tested etc, so it should be "supported". >> >> The bios is socketed! I can take some foto's next week for the wiki if >> desired! >> >> I have attached several documents from the several commands. These >> commands where run on an Ubuntu 10.04 from a USB stick. It took about 10 >> minutes to start, but runs reasonable well :) >> >> Flashrom.txt lists flashrom -V; on a sidenote, since I have several of >> these terminals, and I can 'hotswap' I could test the erase thing? How >> would this work and how would I recover if it goes bad. I'm willing to >> try if you give me detailed instructions :) >> >> Superiotool didn't report anything interesting; there is no superio chip :) >> >> I also attached lspci -vvvxxx and dmesg aswell as cpuinfo >> >> To recap; I think it's an AMD Geode GX2 or LX, with an CS5536 'companion >> chip'. >> >> The audiochip isn't anything special; it's an ACL655 and the network is >> powerd by an RTL8100CL. >> >> >> What I'm hoping, is using someting like bayou to boot either whatever is >> stored on the local 'hdd' or boot an PXE image. USB would be handy too I >> suppose :) >> >> Thanks for your time again; >> >> Oliver >> >> >> On 05/20/2010 07:27 PM, anders(a)jenbo.dk wrote: >> >>> Can the BIOS be swapped (is it socketed), do you have a spare (or one >>> you fan borrow from motherboard) . >>> Is the board using a supported or documented SuperIO (use superiotool, >>> the manual, the we or your eyes to see what chip you have). >>> Is the southbridg supported. >>> Is the northbridg supported. >>> >>> Mvh Anders >>> >>> ----- Reply message ----- >>> Fra: "Oliver Schinagl"<oliver(a)schinagl.nl> >>> Dato: tor., maj 20, 2010 18:28 >>> Emne: [coreboot] Wyse S10 and coreboot >>> Til:<coreboot(a)coreboot.org> >>> >>> Hello all, >>> >>> I am very interested in starting to play with coreboot and use it on >>> some of my systems. I have been interested in coreboot and following it >>> for a few years now. >>> >>> I'll skip the chit chat and get straight to it. I got my hands on a few >>> Wyse S10 thinclients, and they work quite well, booting via PXE or USB. >>> Recently, I found some cheap Disk on Module 44pin 'ssd' and wanted to >>> try them out in the S10. >>> >>> Unforuntatly, I'm getting an error when trying to run someting from it; >>> that the IDE port has been disabled. >>> >>> Since getting a bios upgrade (which might not fix it) is a very tedious >>> task; i decided to look at coreboot. >>> >>> My question is, I suppose quite simple; Where do I start? >>> >>> Thanks, >>> >>> Oliver >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> http://www.coreboot.org/mailman/listinfo/coreboot >>> >>> >>> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot >> > > -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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coreboot May 2010