coreboot February 2010

coreboot@coreboot.org

61 participants
310 discussions

Fam10 breakage
by Myles Watson 01 Mar '10

01 Mar '10

Rev 5132 works for me on SimNOW with 1 fam10 processor. Current head gets stuck in an infinite loop setting fixed MTRRs. Any clues while I'm bisecting? Thanks, Myles

6 32

[PATCH] cbfs, smaller api, more types
by Stefan Reinauer 01 Mar '10

01 Mar '10

See patch

7 17

biostar TA690G AM2 and TA770 A2+
by sergio 01 Mar '10

01 Mar '10

Hello. I have two biostar mainboards on which I'd like to try coreboot. They are not in supported mainboards list, but northbridges, southbridges and super I/Os looks like be supported. The first mainboard is: vendor: biostar model: TA690G AM2 northbridge: AMD 690G (I'm not absolutely sure) southbridge: AMD SB600 (I'm not absolutely sure) cpu: AMD Athlon(tm) X2 Dual Core Processor BE-2300 Super I/O: "ITE IT8716F-S" this is written on the chip (superiotool says ITE IT8716F) BIOS device: PMC Pm49FL004T-33JCE (flashrom -V looks like can't detect bios, but flashrom -r says PMC Pm49FL004) url: http://www.biostar.com.tw/app/en/mb/content.php?S_ID=17 The second mainboard is: vendor: biostar model: TA770 A2+ northbridge: AMD 770 (I'm not absolutely sure) southbridge: AMD SB600 (I'm not absolutely sure) cpu: AMD Athlon(tm) 64 X2 Dual Core Processor 5200+ Super I/O: ITE IT8718F (from superiotool r5050) BIOS device: Winbond W25x80 url: http://www.biostar.com.tw/app/en/mb/content.php?S_ID=310 Both motherboards were successfully flashed several times with flashrom for original bios. Have I chance to run coreboot on this mainboards? -- sergio.

2 1

Re: [coreboot] Patch to add MSI MS-9652 support to CoreBoot
by tpearson＠raptorengineeringinc.com 01 Mar '10

01 Mar '10

Attached is a replacement MSI MS-9652 support patch with KConfig fixed and tested as working. Newconfig has been removed. Audio and 1394 have now been tested and work properly. Status of PCI/PCIe slot IRQ routing is unknown at this time, but presumed broken. Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- Timothy Pearson Raptor Engineering > Attached is a patch to add support for the MSI MS-9652 board to CoreBoot. > > The PCI routing tables and ACPI implementation are incomplete; I have all > the functionality I need at this time so I will probably not be fixing > them. > > The board boots and the following items work under the newconfig build > system > * Two quad core Opteron Barcelona processors (with previously sent patch) > * ECC DDR2 memory, all DIMM slots are functional > * Both on-board NIC cards, with factory MAC addresses being read properly > * Serial port > * PS2 keyboard/mouse > * All four on-board USB ports > * The flashrom utility, all functions > > What does not work > * PCI/PCIe slot IRQs > * ACPI > * SMP, without previously sent patch > > SeaBIOS/gPXE load properly and Linux boots up over PXE with no problems. > > An attempt was made to port the board to KConfig, however this port is > untested and may or may not function correctly. > > Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> > > --- > > Re-sending as requested, this time WITH the patch attached! ;-) > > Timothy Pearson > Raptor Engineering

3 2

[PATCH] Support for Intel Modular BIOS Interface support on i830
by Stefan Reinauer 01 Mar '10

01 Mar '10

See patch.

3 2

[PATCH]generic ssdt rules
by Patrick Georgi 01 Mar '10

01 Mar '10

Hi, attached patch unifies the ACPI_SSDTX_NUM handling. - define meaning for ACPI_SSDTX_NUM: highest ssdtX.asl to build - add rules that build either 4 or 5 ssdts (which is what exists in the tree now) - change ACPI_SSDTX_NUM to either 4 or 5 for boards that have ssdtX.asl files, according to the ssdtX.asl in there. - remove custom ssdt rules I checked the tree and didn't find any occurrence where the value of ACPI_SSDTX_NUM was used for something else than a test for >= 1, so changing the values (within this constraint) won't affect behaviour. No idea what "31" was supposed to be good for, but it definitely doesn't affect the build. There is no simple way to do "greater than" tests in gnu make that I found. One solution would be some recursive macro that adds ssdtX rules for x down to 2 (ssdt1 doesn't exist by convention), which seems to require building mathematical functions first, etc. That seemed to be overkill for the three uses of the variable (which isn't even globally defined) Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

2 1

[RFC+PATCH]mark deprecated kconfig options
by Patrick Georgi 28 Feb '10

28 Feb '10

Hi, Stefan asked me what we win if we move build behaviour from mainboard-specific Makefiles to mainboard-specific Kconfig files (eg. BOARD_HAS_FADT). I introduced these flags so I can rework the build system without too much risk of breaking boards at runtime. Several of the per-mainboard things can probably be moved to the southbridge code (see patch), but that would require functional testing. For moving build rules around, a build test is usually good enough. A config flag is also less flexible, and all the "complicated" logic is at a single place now (src/arch/i386/Makefile.inc mostly), instead of replicated several times at various boards. It's harder for such a flag to hide, or for developers to modify it in a way that leads to a multitude of similar-but-not-quite variants of the associated feature. To make it even more obvious which features should change (and how), I propose to add a new Kconfig file, included by the main src/Kconfig, at src/Kconfig.deprecated_options. The new Kconfig file will host the options that might go away once certain parts of the tree are refactored, and as such acts as an up-to-date TODO list of such things. As an example, I moved the options I recently created there, with documentation on what they do (help text) and how they could be eliminated (as comments). Once an option falls out of use, because all its users are refactored appropriately, it can be dropped there, and no todo list will be forgotten in the process. If it can be shown that deprecation candidates really need to exist, they can be moved to some permanent location. The list of options in the patch is not exhaustive - I'm quite sure that there are more of these that really belong into this list, but I wanted to pick a relatively safe set, so we can discuss the merit of the approach, instead of the actual selection of options to deprecate. Patch is Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

1 0

[commit] r5175 - in trunk/src: arch/i386 northbridge/via/vx800 southbridge/nvidia/ck804 southbridge/sis/sis966
by repository service 28 Feb '10

28 Feb '10

Author: oxygene Date: Sun Feb 28 21:56:42 2010 New Revision: 5175 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5175 Log: Use the romstraps build infrastructure created for "tinybootblock" (chipset_bootblock_inc and chipset_bootblock_lds) instead of using chipset specific rules for "bigbootblock" in the generic i386 Makefile. It also adds rules for the romstraps of * southbridge/nvidia/ck804 * southbridge/sis/sis966 * northbridge/via/vx800 for the benefit of both image layouts. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/arch/i386/Makefile.inc trunk/src/northbridge/via/vx800/Makefile.inc trunk/src/southbridge/nvidia/ck804/Makefile.inc trunk/src/southbridge/sis/sis966/Makefile.inc Modified: trunk/src/arch/i386/Makefile.inc ============================================================================== --- trunk/src/arch/i386/Makefile.inc Sun Feb 28 20:40:03 2010 (r5174) +++ trunk/src/arch/i386/Makefile.inc Sun Feb 28 21:56:42 2010 (r5175) @@ -154,22 +154,8 @@ endif ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y) -crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc -ldscripts += $(src)/southbridge/nvidia/ck804/romstrap.lds -endif -ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y) -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -ldscripts += $(src)/southbridge/nvidia/mcp55/romstrap.lds -endif -ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y) -crt0s += $(src)/southbridge/via/k8t890/romstrap.inc -ldscripts += $(src)/southbridge/via/k8t890/romstrap.lds -endif -ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y) -crt0s += $(src)/northbridge/via/vx800/romstrap.inc -ldscripts += $(src)/northbridge/via/vx800/romstrap.lds -endif +crt0s += $(chipset_bootblock_inc) +ldscripts += $(chipset_bootblock_lds) endif OPTION_TABLE_H:= Modified: trunk/src/northbridge/via/vx800/Makefile.inc ============================================================================== --- trunk/src/northbridge/via/vx800/Makefile.inc Sun Feb 28 20:40:03 2010 (r5174) +++ trunk/src/northbridge/via/vx800/Makefile.inc Sun Feb 28 21:56:42 2010 (r5175) @@ -25,3 +25,5 @@ driver-y += vx800_lpc.o driver-y += vx800_ide.o +chipset_bootblock_inc += $(src)/northbridge/via/vx800/romstrap.inc +chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.lds Modified: trunk/src/southbridge/nvidia/ck804/Makefile.inc ============================================================================== --- trunk/src/southbridge/nvidia/ck804/Makefile.inc Sun Feb 28 20:40:03 2010 (r5174) +++ trunk/src/southbridge/nvidia/ck804/Makefile.inc Sun Feb 28 21:56:42 2010 (r5175) @@ -14,3 +14,6 @@ obj-y += ck804_reset.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += ck804_fadt.o + +chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc +chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds Modified: trunk/src/southbridge/sis/sis966/Makefile.inc ============================================================================== --- trunk/src/southbridge/sis/sis966/Makefile.inc Sun Feb 28 20:40:03 2010 (r5174) +++ trunk/src/southbridge/sis/sis966/Makefile.inc Sun Feb 28 21:56:42 2010 (r5175) @@ -9,3 +9,6 @@ driver-y += sis966_pcie.o driver-y += sis966_aza.o obj-y += sis966_reset.o + +chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc +chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds

1 0

[PATCH]Avoid northbridge/southbridge specific rules in generic i386 code
by Patrick Georgi 28 Feb '10

28 Feb '10

Hi, attached patch makes "bigbootblock" use the romstraps build infrastructure created for "tinybootblock" (chipset_bootblock_inc and chipset_bootblock_lds) instead of using chipset specific rules in the generic i386 Makefile. It also adds rules for the romstraps of * southbridge/nvidia/ck804 * southbridge/sis/sis966 * northbridge/via/vx800 for the benefit of both image layouts. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

2 1

build service results for r5174
by coreboot information 28 Feb '10

28 Feb '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5174 to the coreboot repository. This caused the following changes: Change Log: disable AP_CODE_IN_CAR. The K8 code has an alternate code path to do the job, and it's not working anyways. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:serengeti_cheetah has been fixed Compilation of supermicro:h8dme has been fixed If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot February 2010