coreboot April 2009

coreboot@coreboot.org

69 participants
583 discussions

[v2] r4175 - in trunk/coreboot-v2/src/mainboard: dell/s1850 intel/jarrell msi/ms9282 supermicro/x6dai_g supermicro/x6dhe_g supermicro/x6dhe_g2 supermicro/x6dhr_ig supermicro/x6dhr_ig2
by svn＠coreboot.org 22 Apr '09

22 Apr '09

Author: stepan Date: 2009-04-22 14:35:57 +0200 (Wed, 22 Apr 2009) New Revision: 4175 Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/cmos.layout trunk/coreboot-v2/src/mainboard/intel/jarrell/cmos.layout trunk/coreboot-v2/src/mainboard/msi/ms9282/cmos.layout trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/cmos.layout trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/cmos.layout trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/cmos.layout trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/cmos.layout trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/cmos.layout Log: no duplicate names in cmos.layout allowed. (fixes a bunch of boards) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -42,7 +42,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/msi/ms9282/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9282/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/msi/ms9282/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -46,7 +46,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/cmos.layout =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/cmos.layout 2009-04-22 12:28:14 UTC (rev 4174) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/cmos.layout 2009-04-22 12:35:57 UTC (rev 4175) @@ -40,7 +40,7 @@ 728 256 h 0 user_data 984 16 h 0 check_sum # Reserve the extended AMD configuration registers -1000 24 r 0 reserved_memory +1000 24 r 0 amd_reserved_memory

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[flashrom]patch in Makefile
by stephan.guilloux＠free.fr 22 Apr '09

22 Apr '09

Hello, >From time to time, flashrom build produces some errors. CC1 or GCC complain about some missing file. It comes from the pciutils rules : steph-laptop:~/Work/Flashrom/flashrom> make pciutils Checking for pciutils and zlib... found. steph-laptop:~/Work/Flashrom/flashrom> make pciutils Checking for pciutils and zlib... found. steph-laptop:~/Work/Flashrom/flashrom> cc1: erreur: .test.c : Aucun fichier ou dossier de ce type make pciutils Checking for pciutils and zlib... found. steph-laptop:~/Work/Flashrom/flashrom> gcc: .test.c : Aucun fichier ou dossier de ce type Have a look to the .test.c compilation rule : @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) &>/dev/null && which is understood like @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) & >/dev/null && but not like @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) >/dev/null 2>&1 && which looks more to be what was expected, initially. Patch is below and attached. Make good use of it. Stephan. Signed-off-by: Stephan Guilloux <stephan.guilloux(a)free.fr> Index: flashrom-patch-Makefile/Makefile =================================================================== --- flashrom-patch-Makefile/Makefile (révision 4171) +++ flashrom-patch-Makefile/Makefile (copie de travail) @@ -65,7 +65,7 @@ echo "struct pci_access *pacc;"; \ echo "int main(int argc, char **argv)"; \ echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c ) - @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) &>/dev/null && \ + @$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) >/dev/null 2>&1 && \ echo "found." || ( echo "not found."; echo; \ echo "Please install pciutils-devel and zlib-devel."; \ echo "See README for more information."; echo; \

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[v2] r4174 - trunk/util/ectool
by svn＠coreboot.org 22 Apr '09

22 Apr '09

Author: uwe Date: 2009-04-22 14:28:14 +0200 (Wed, 22 Apr 2009) New Revision: 4174 Modified: trunk/util/ectool/Makefile trunk/util/ectool/ec.c trunk/util/ectool/ec.h trunk/util/ectool/ectool.c Log: Quick 'indent' run on ectool with some additional manual cosmetic fixes. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/ectool/Makefile =================================================================== --- trunk/util/ectool/Makefile 2009-04-22 12:14:39 UTC (rev 4173) +++ trunk/util/ectool/Makefile 2009-04-22 12:28:14 UTC (rev 4174) @@ -1,9 +1,9 @@ # # Makefile for ectool # -# Copyright (C) 2009 by coresystems GmbH -# written by Stefan Reinauer <stepan(a)coresystems.de> -# +# Copyright (C) 2009 by coresystems GmbH +# written by Stefan Reinauer <stepan(a)coresystems.de> +# # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or @@ -26,7 +26,7 @@ ectool: ec.o ectool.o $(CC) $(CFLAGS) -o $@ $^ - + clean: rm *.o ectool Modified: trunk/util/ectool/ec.c =================================================================== --- trunk/util/ectool/ec.c 2009-04-22 12:14:39 UTC (rev 4173) +++ trunk/util/ectool/ec.c 2009-04-22 12:28:14 UTC (rev 4174) @@ -5,8 +5,7 @@ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. + * published by the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -15,8 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <stdio.h> @@ -40,8 +38,8 @@ debug("."); } if (!timeout) { - printf("Timeout while sending command 0x%02x to EC!\n", - command); + printf("Timeout while sending command 0x%02x to EC!\n", + command); // return -1; } @@ -54,14 +52,13 @@ int timeout; timeout = 0x7ff; - while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0 + while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0 usleep(10); if ((timeout & 0xff) == 0) debug("."); } if (!timeout) { - printf("Timeout while sending data 0x%02x to EC!\n", - data); + printf("Timeout while sending data 0x%02x to EC!\n", data); // return -1; } @@ -83,7 +80,7 @@ uint8_t data; timeout = 0x7fff; - while (--timeout) { // Wait for OBF = 1 + while (--timeout) { // Wait for OBF = 1 if (inb(EC_SC) & EC_OBF) { break; } @@ -114,6 +111,6 @@ { send_ec_command(0x81); send_ec_data(addr); + return send_ec_data(data); } - Modified: trunk/util/ectool/ec.h =================================================================== --- trunk/util/ectool/ec.h 2009-04-22 12:14:39 UTC (rev 4173) +++ trunk/util/ectool/ec.h 2009-04-22 12:28:14 UTC (rev 4174) @@ -5,8 +5,7 @@ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. + * published by the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -15,35 +14,37 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _EC_H #define _EC_H + #include <stdint.h> + #define EC_DATA 0x62 #define EC_SC 0x66 /* EC_SC input */ -#define EC_SMI_EVT (1 << 6) // 1: SMI event pending -#define EC_SCI_EVT (1 << 5) // 1: SCI event pending -#define EC_BURST (1 << 4) // controller is in burst mode -#define EC_CMD (1 << 3) // 1: byte in data register is command - // 0: byte in data register is data -#define EC_IBF (1 << 1) // 1: input buffer full (data ready for ec) -#define EC_OBF (1 << 0) // 1: output buffer full (data ready for host) +#define EC_SMI_EVT (1 << 6) // 1: SMI event pending +#define EC_SCI_EVT (1 << 5) // 1: SCI event pending +#define EC_BURST (1 << 4) // controller is in burst mode +#define EC_CMD (1 << 3) // 1: byte in data register is command + // 0: byte in data register is data +#define EC_IBF (1 << 1) // 1: input buffer full (data ready for ec) +#define EC_OBF (1 << 0) // 1: output buffer full (data ready for host) + /* EC_SC output */ -#define RD_EC 0x80 // Read Embedded Controller -#define WR_EC 0x81 // Write Embedded Controller -#define BE_EC 0x82 // Burst Enable Embedded Controller -#define BD_EC 0x83 // Burst Disable Embedded Controller -#define QR_EC 0x84 // Query Embedded Controller +#define RD_EC 0x80 // Read Embedded Controller +#define WR_EC 0x81 // Write Embedded Controller +#define BE_EC 0x82 // Burst Enable Embedded Controller +#define BD_EC 0x83 // Burst Disable Embedded Controller +#define QR_EC 0x84 // Query Embedded Controller int send_ec_command(uint8_t command); int send_ec_data(uint8_t data); int send_ec_data_nowait(uint8_t data); uint8_t recv_ec_data(void); uint8_t ec_read(uint8_t addr); + #endif - Modified: trunk/util/ectool/ectool.c =================================================================== --- trunk/util/ectool/ectool.c 2009-04-22 12:14:39 UTC (rev 4173) +++ trunk/util/ectool/ectool.c 2009-04-22 12:28:14 UTC (rev 4174) @@ -5,8 +5,7 @@ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. + * published by the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -15,8 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <stdio.h> @@ -34,25 +32,25 @@ printf("ectool v%s -- ", ECTOOL_VERSION); printf("Copyright (C) 2008-2009 coresystems GmbH\n\n"); printf( - "This program is free software: you can redistribute it and/or modify\n" - "it under the terms of the GNU General Public License as published by\n" - "the Free Software Foundation, version 2 of the License.\n\n" - "This program is distributed in the hope that it will be useful,\n" - "but WITHOUT ANY WARRANTY; without even the implied warranty of\n" - "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" - "GNU General Public License for more details.\n\n" - "You should have received a copy of the GNU General Public License\n" - "along with this program. If not, see <http://www.gnu.org/licenses/>.\n\n"); + "This program is free software: you can redistribute it and/or modify\n" + "it under the terms of the GNU General Public License as published by\n" + "the Free Software Foundation, version 2 of the License.\n\n" + "This program is distributed in the hope that it will be useful,\n" + "but WITHOUT ANY WARRANTY; without even the implied warranty of\n" + "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" + "GNU General Public License for more details.\n\n" + "You should have received a copy of the GNU General Public License\n" + "along with this program. If not, see <http://www.gnu.org/licenses/>.\n\n"); } void print_usage(const char *name) { printf("usage: %s [-vh?V]\n", name); printf("\n" - " -v | --version: print the version\n" - " -h | --help: print this help\n\n" - " -V | --verbose: print debug information\n" - "\n"); + " -v | --version: print the version\n" + " -h | --help: print this help\n\n" + " -V | --verbose: print debug information\n" + "\n"); exit(1); } @@ -70,7 +68,7 @@ }; while ((opt = getopt_long(argc, argv, "vh?V", - long_options, &option_index)) != EOF) { + long_options, &option_index)) != EOF) { switch (opt) { case 'v': print_version(); @@ -94,11 +92,12 @@ } printf("EC RAM:\n"); - for (i=0; i < 0x100; i++) { - if ((i % 0x10) == 0) - printf ("\n%02x: ", i); + for (i = 0; i < 0x100; i++) { + if ((i % 0x10) == 0) + printf("\n%02x: ", i); printf("%02x ", ec_read(i)); } printf("\n\n"); + return 0; }

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build service results for r4172
by coreboot information 22 Apr '09

22 Apr '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4172 to the coreboot repository. This caused the following changes: Change Log: remove some style guide breaks and warnings from raminit_f_dqs.c Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of dell:s1850 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=s1850&vendor=d… Compilation of intel:jarrell is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=jarrell&vendor… Compilation of msi:ms9282 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=ms9282&vendor=… Compilation of supermicro:x6dai_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=x6dai_g&vendor… Compilation of supermicro:x6dhe_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=x6dhe_g&vendor… Compilation of supermicro:x6dhe_g2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=x6dhe_g2&vendo… Compilation of supermicro:x6dhr_ig is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=x6dhr_ig&vendo… Compilation of supermicro:x6dhr_ig2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4172&device=x6dhr_ig2&vend… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[v2] r4173 - trunk/coreboot-v2/util/nrv2b
by svn＠coreboot.org 22 Apr '09

22 Apr '09

Author: stepan Date: 2009-04-22 14:14:39 +0200 (Wed, 22 Apr 2009) New Revision: 4173 Modified: trunk/coreboot-v2/util/nrv2b/nrv2b.c Log: don't ignore return values (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/util/nrv2b/nrv2b.c =================================================================== --- trunk/coreboot-v2/util/nrv2b/nrv2b.c 2009-04-22 12:00:17 UTC (rev 4172) +++ trunk/coreboot-v2/util/nrv2b/nrv2b.c 2009-04-22 12:14:39 UTC (rev 4173) @@ -1265,6 +1265,9 @@ Error("Can't read"); } r = ucl_nrv2b_99_compress(in, in_len, out, &out_len, 0 ); + if (r != UCL_E_OK) { + Error("Error during compression."); + } #if UCLPACK_COMPAT tw = htonl(out_len); if (fwrite(&tw, sizeof(tw), 1, outfile) != 1)

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[v2] r4172 - trunk/coreboot-v2/src/northbridge/amd/amdk8
by svn＠coreboot.org 22 Apr '09

22 Apr '09

Author: stepan Date: 2009-04-22 14:00:17 +0200 (Wed, 22 Apr 2009) New Revision: 4172 Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f_dqs.c Log: remove some style guide breaks and warnings from raminit_f_dqs.c Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f_dqs.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f_dqs.c 2009-04-22 09:06:38 UTC (rev 4171) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/raminit_f_dqs.c 2009-04-22 12:00:17 UTC (rev 4172) @@ -1732,7 +1732,8 @@ wrmsr(TOP_MEM, msr); } -static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k){ +static void setup_mtrr_dqs(unsigned tom_k, unsigned tom2_k) +{ unsigned reg; msr_t msr; @@ -1762,7 +1763,8 @@ } -static void clear_mtrr_dqs(unsigned tom2_k){ +static void clear_mtrr_dqs(unsigned tom2_k) +{ msr_t msr; unsigned i; @@ -1825,21 +1827,28 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); #else -int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { +int s3_save_nvram_early(u32 dword, int size, int nvram_pos) +{ + return nvram_pos; } -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) { -die("No memory NVRAM loader for DQS data! Unable to restore memory state\n"); +int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) +{ + die("No memory NVRAM loader for DQS data! Unable to restore memory state\n"); + + return nvram_pos; /* Make GCC happy */ } #endif -static int save_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) { +static int save_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) +{ u32 dword = pci_read_config32_index_wait(dev, 0x98, index); return s3_save_nvram_early(dword, size, nvram_pos); } -static int load_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) { +static int load_index_to_pos(unsigned int dev, int size, int index, int nvram_pos) +{ u32 old_dword = pci_read_config32_index_wait(dev, 0x98, index); nvram_pos = s3_load_nvram_early(size, &old_dword, nvram_pos); @@ -1847,7 +1856,8 @@ return nvram_pos; } -static int dqs_load_MC_NVRAM_ch(unsigned int dev, int ch, int pos) { +static int dqs_load_MC_NVRAM_ch(unsigned int dev, int ch, int pos) +{ /* 30 bytes per channel */ ch *= 0x20; pos = load_index_to_pos(dev, 4, 0x00 + ch, pos); @@ -1865,7 +1875,8 @@ return pos; } -static int dqs_save_MC_NVRAM_ch(unsigned int dev, int ch, int pos) { +static int dqs_save_MC_NVRAM_ch(unsigned int dev, int ch, int pos) +{ /* 30 bytes per channel */ ch *= 0x20; pos = save_index_to_pos(dev, 4, 0x00 + ch, pos); @@ -1883,7 +1894,8 @@ return pos; } -static void dqs_save_MC_NVRAM(unsigned int dev) { +static void dqs_save_MC_NVRAM(unsigned int dev) +{ int pos = 0; u32 reg; printk_debug("DQS SAVE NVRAM: %x\n", dev); @@ -1894,7 +1906,8 @@ pos = s3_save_nvram_early(reg, 4, pos); } -static void dqs_restore_MC_NVRAM(unsigned int dev) { +static void dqs_restore_MC_NVRAM(unsigned int dev) +{ int pos = 0; u32 reg;

1 0

build service results for r4171
by coreboot information 22 Apr '09

22 Apr '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4171 to the coreboot repository. This caused the following changes: Change Log: argh... never redo parts of the original patch on the fly. This fixes the tree again. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of dell:s1850 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=s1850&vendor=d… Compilation of intel:jarrell is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=jarrell&vendor… Compilation of intel:xe7501devkit has been fixed Compilation of msi:ms9282 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=ms9282&vendor=… Compilation of supermicro:x6dai_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=x6dai_g&vendor… Compilation of supermicro:x6dhe_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=x6dhe_g&vendor… Compilation of supermicro:x6dhe_g2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=x6dhe_g2&vendo… Compilation of supermicro:x6dhr_ig is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=x6dhr_ig&vendo… Compilation of supermicro:x6dhr_ig2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4171&device=x6dhr_ig2&vend… Compilation of tyan:s2735 has been fixed If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

build service results for r4170
by coreboot information 22 Apr '09

22 Apr '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4170 to the coreboot repository. This caused the following changes: Change Log: * Allow coreboot to use the full 256 bytes of CMOS memory * Make functions out of the accessor macros in mc146818rtc.c * don't hide reserved cmos entries from coreboot, only from the user. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Build Log: Compilation of dell:s1850 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=s1850&vendor=d… Compilation of intel:jarrell is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=jarrell&vendor… Compilation of intel:xe7501devkit is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=xe7501devkit&v… Compilation of msi:ms9282 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=ms9282&vendor=… Compilation of supermicro:x6dai_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=x6dai_g&vendor… Compilation of supermicro:x6dhe_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=x6dhe_g&vendor… Compilation of supermicro:x6dhe_g2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=x6dhe_g2&vendo… Compilation of supermicro:x6dhr_ig is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=x6dhr_ig&vendo… Compilation of supermicro:x6dhr_ig2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=x6dhr_ig2&vend… Compilation of tyan:s2735 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4170&device=s2735&vendor=t… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r4169
by coreboot information 22 Apr '09

22 Apr '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4169 to the coreboot repository. This caused the following changes: Change Log: This patch unifies the socket_mPGA604_800Mhz and socket_mPGA604_533Mhz to a combined socket_mPGA604. No other sockets come with clock rates, and there is no difference in code, except for the number of microcode patches included in a build. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Build Log: Compilation of dell:s1850 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=s1850&vendor=d… Compilation of intel:jarrell has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=jarrell&vendor… Compilation of intel:xe7501devkit has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=xe7501devkit&v… Compilation of supermicro:x6dai_g has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=x6dai_g&vendor… Compilation of supermicro:x6dhe_g has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=x6dhe_g&vendor… Compilation of supermicro:x6dhe_g2 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=x6dhe_g2&vendo… Compilation of supermicro:x6dhr_ig has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=x6dhr_ig&vendo… Compilation of supermicro:x6dhr_ig2 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=x6dhr_ig2&vend… Compilation of tyan:s2735 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4169&device=s2735&vendor=t… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[v2] r4171 - trunk/coreboot-v2/src/cpu/intel/socket_mPGA604
by svn＠coreboot.org 22 Apr '09

22 Apr '09

Author: stepan Date: 2009-04-22 11:06:38 +0200 (Wed, 22 Apr 2009) New Revision: 4171 Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/chip.h trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/socket_mPGA604.c Log: argh... never redo parts of the original patch on the fly. This fixes the tree again. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/chip.h =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/chip.h 2009-04-22 09:03:08 UTC (rev 4170) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/chip.h 2009-04-22 09:06:38 UTC (rev 4171) @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops; +extern struct chip_operations cpu_intel_socket_mPGA604_ops; -struct cpu_intel_socket_mPGA604_800Mhz_config { +struct cpu_intel_socket_mPGA604_config { }; Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/socket_mPGA604.c =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/socket_mPGA604.c 2009-04-22 09:03:08 UTC (rev 4170) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/socket_mPGA604.c 2009-04-22 09:06:38 UTC (rev 4171) @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops = { +struct chip_operations cpu_intel_socket_mPGA604_ops = { CHIP_NAME("Socket mPGA604 CPU") };

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coreboot April 2009